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path: root/drivers/gpu/drm/amd/amdgpu
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2019-07-18drm/amdgpu: add pci DID for Arcturus GL-XL.Feifei Xu1-0/+4
Add device ids for Arcturus. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Le Ma <Le.Ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: assign fb_start/end in mmhub v9.4 interfaceLe Ma1-0/+7
Align with mmhub v1.0. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: add harvest support for ArcturusJames Zhu4-2/+77
Add VCN harvest support for Arcturus Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: add multiple instances support for ArcturusJames Zhu3-627/+737
Arcturus has dual-VCN. Need add multiple instances support for Arcturus. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: modify amdgpu_vcn to support multiple instancesJames Zhu7-197/+210
Arcturus has dual-VCN. Need Restruct amdgpu_device::vcn to support multiple vcns. There are no any logical changes here Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: add vcn nbio doorbell range setting for 2nd vcn instanceJames Zhu5-7/+21
add vcn nbio doorbell range setting for 2nd vcn instance Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu/: increase AMDGPU_MAX_RINGS to add 2nd vcn instanceJames Zhu1-1/+1
increase AMDGPU_MAX_RINGS to add 2nd vcn instance Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu/: add doorbell assignment for 2nd vcn instanceJames Zhu1-2/+7
add doorbell assignment for 2nd vcn instance Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu/: add ucodeID for 2nd vcn instanceJames Zhu1-0/+1
add ucodeID for 2nd vcn instance Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: correct ip for mmHDP_READ_CACHE_INVALIDATE register accessLe Ma1-1/+1
Use the proper IP index for HDP registers. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: set system aperture to cover whole FB region in mmhub v9.4Le Ma1-3/+2
In XGMI configuration, the FB region covers vram region from peer device, adjust system aperture to cover all of them Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: skip get/update xgmi topology info when no psp existsLe Ma1-22/+25
We don't currently have psp support for arcturus so provide a alternative mechanism in the meantime. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: enable the Doorbell support for VCN2.5Leo Liu2-12/+56
Including decode, encode, and JPEG decode rings Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: add vcn doorbell range function to nbio7.4 (v2)Leo Liu2-0/+24
To setup the aperture for VCN2.5 v2: setup vcn doorbells in vcn2.5 hw_init (Alex) Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: enable VCN2.5 on ArcturusLeo Liu2-0/+31
VCN is the video decode and encode engine on Arcturus Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu/VCN2.5: set JPEG decode ring functionsLeo Liu1-0/+78
Also reuse most of the JPEG2.0 decode ring functions Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: add JPEG2.5 HW start and stopLeo Liu1-0/+104
JPEG engine initialization and suspend sequences Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu/VCN2.5: set encode ring functionsLeo Liu1-0/+91
Also reuse most of the VCN2.0 encode ring functions Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu/VCN2.5: set decode ring functionsLeo Liu1-0/+78
Also reuse most of the VCN2.0 decode ring functions Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: add Arcturus to the VCN familyLeo Liu1-0/+5
including firmware support etc. Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: add VCN2.5 VCPU start and stopLeo Liu1-1/+466
HW engine initialization and suspend sequences. Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: add VCN2.5 basic supportsLeo Liu2-1/+416
i.e. basic VCN IP SW structures VCN is the video codec block on the GPU. Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu/VCN2: expose rings functionsLeo Liu2-46/+79
They can be reused by VCN2.x family Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu/VCN2: put IB internal registers offset to structureLeo Liu2-23/+47
So the ring functions can be shared with different VCN versions with different internal registers offsets Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: declare sdma firmware binary files for ArcturusLe Ma1-0/+8
So that they are properly picked up as a driver dependency. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: Clear build undefined warningJames Zhu1-0/+5
Add amdgpu_amdkfd_arcturus_get_functions stub when CONFIG_HSA_AMD is undefinded. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Yong Zhao <Yong.Zhao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: Enable xgmi support for ArcturusOak Zeng1-1/+1
xgmi is a high performance cross-GPU communication channel. Signed-off-by: Oak Zeng <Oak.Zeng@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: Hack xgmi topology info when there is no psp fwOak Zeng1-11/+16
This is only needed on emulation platform where psp fw might not be available, to hack xgmi topology info such as hive id and node id. v2: Add offset to hacked hive/node id v3: Don't use introduce new module parameter. Signed-off-by: Oak Zeng <Oak.Zeng@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: Set VM_L2_CNTL.PDE_FAULT_CLASSIFICATION to 0 for MMHUB 9.4Yong Zhao1-1/+1
Should be set to 0 for mmhub 9.4. Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdkfd: Implement kfd2kgd_calls for ArcturusOak Zeng6-109/+465
Arcturus shares most of the kfd2kgd_calls with gfx9. But due to SDMA register address change, it can't share SDMA related functions. Export gfx9 kfd2kgd_calls and implement SDMA related functions for Arcturus. Signed-off-by: Oak Zeng <Oak.Zeng@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdkfd: Support two MMHUBs when setting up page table base in KFDYong Zhao1-1/+7
2 mmhubs on arcturus. Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Signed-off-by: Oak Zeng <Oak.Zeng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdkfd: Expose function mmhub_v9_4_setup_vm_pt_regs() for kfd to useYong Zhao2-5/+19
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Signed-off-by: Oak Zeng <Oak.Zeng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18amd/amdkfd: Add ASIC ARCTURUS to kfdYong Zhao1-0/+1
Add initial support for ARCTURUS to kfd. Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Signed-off-by: Oak Zeng <Oak.Zeng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: Initialize asic functions for ArcturusOak Zeng1-0/+1
After cherry-picking doorbell rework changes from drm-next branch, Arcturus asic functions pointer need to be initialized to init doorbell index for Arcturus. Signed-off-by: Oak Zeng <Oak.Zeng@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: add paging queue support for 8 SDMA instances on ArcturusLe Ma1-11/+51
Properly enable all 8 instances for paging queue. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: correct programming of ih_chicken for ArcturusLe Ma1-1/+10
ih_chicken is a register that is not allowed to access by driver in the L0 security policy. psp bl need to enable field to allow driver to use physical bus address for ih ring on secure part. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Snow Zhang <snow.zhang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: add Arcturus chip_name for init sdma microcodeLe Ma1-0/+3
So we load the proper firmware for arcturus. Signed-off-by: Le Ma <le.ma@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: enable 8 SDMA instances for ArcturusLe Ma1-0/+2
All the 8 SDMA instances work fine on the latest Gopher build model. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Snow Zhang <Snow.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: correct Arcturus SDMA address space base indexLe Ma1-6/+6
Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: support sdma 2~7 doorbell range register offsetLe Ma1-3/+17
Update the doorbell range registers to support additional SDMA rings. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: skip all gfx ring settings for ArcturusLe Ma1-14/+25
Not needed on Arcturus. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: skip load cp gfx firmware for ArcturusLe Ma1-7/+12
Arcturus has no CPG component any more. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: optimize gfx9 init_microcode functionLe Ma1-94/+153
Split each type of firmware into single function for easy to maintain. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: add Arcturus gpu info firmwareLe Ma1-0/+4
Add GPU info firmware for Arcturus. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: skip pasid mapping for second mmhub on ArcturusLe Ma1-0/+4
There's no LUT register for second mmhub to convert pasid since it has no ATC. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: skip to get 3D engine clockgating state for ArcturusLe Ma1-8/+10
It's because Arcturus has not 3D engine. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: add to set rlc funcs for ArcturusLe Ma1-0/+1
Shared with other gfx9 parts so use the same functions. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: add number of mec for ArcturusLe Ma1-0/+1
MEC is the CP compute microcontroller. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: add gfx config for ArcturusLe Ma1-0/+10
Add Arcturus GFX config. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: add support for Arcturus firmwareLe Ma1-0/+10
Add support for Arcturus gfx firmwares. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-10-02 23:30:35 +0300