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path: root/drivers/gpu/drm/amd/amdgpu
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2016-05-05drm/amdgpu/atom: add support for new UNIPHYTransmitterContol cmd tableAlex Deucher1-1/+50
New uniphy transmitter setup table for elm/baf. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-05drm/amdgpu/atom: add support for new DIGxEncoderControl cmd tableAlex Deucher1-0/+42
New digital encoder setup table for elm/baf. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-05drm/amdgpu/atom: add support for new SetPixelClock tableAlex Deucher1-12/+41
New version of the SetPixelClock table for elm/baf. The new table calculates the pll dividers and handles spread spectrum calculations and setup. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-05drm/amdgpu/atom: add SetDCEClock helperAlex Deucher2-1/+46
New cmd table for ELM/BAF for setting the dispclock or dprefclock. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-05drm/amdgpu: bump the afmt limit for CZ, ST, PolarisAlex Deucher1-1/+1
Fixes array overflow on these chips. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2016-05-05drm/amdgpu: use defines for CRTCs and AMFT blocksAlex Deucher1-2/+2
Prerequiste for the next patch which ups the limits. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2016-05-05drm/amdgpu: add ELM/BAF DCE11 configs (v2)Alex Deucher1-1/+24
Add support for the display configuration on elm/baf. v2: add missing Stoney case Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-05drm/amdgpu: add ELM/BAF asic typesAlex Deucher1-0/+2
New asic types for ellesmere and baffin. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-05drm/amdgpu: remove sorting of CS BOsChristian König1-23/+0
Not needed any more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: group BOs by log2 of the size on the LRU v2Christian König2-2/+70
This allows us to have small BOs on the LRU before big ones. v2: fix of by one and list corruption bug Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: drop apply quirks for now.Dave Airlie1-15/+0
This isn't being used so drop it. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: fix error checking when reuse vmid on same ringChunming Zhou1-2/+2
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: only update last_flush when vmid doesn't have other new ownerChunming Zhou2-5/+11
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: double fence slotChunming Zhou1-2/+2
we introduced vmid fence, so one hw submission could produce two fences. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: enable sdma clockgating on STAlex Deucher1-1/+3
Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: enable sdma clockgating on CZAlex Deucher1-1/+3
Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu/sdma: rename fiji cg functionsAlex Deucher1-65/+39
They care common for all sdma 3.0 parts Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: enable gmc clockgating for STAlex Deucher1-1/+4
Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: enable gmc clockgating for CZAlex Deucher1-1/+4
Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu/vi: rename fiji cg functionsAlex Deucher1-12/+21
They can be used for other VI parts. Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: enable gfx clockgating for ST (v2)Alex Deucher1-1/+3
v2: just enable MGCG for now since CGCG causes hangs Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: enable gfx clockgating for CZAlex Deucher1-1/+9
Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu/gfx: rework fiji cg functions so they can be sharedAlex Deucher1-16/+202
They can be shared with other asics with minor modifications. Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: add a new set of rlc function pointersAlex Deucher1-0/+9
Different asics tend to have different ways to interact with the RLC. This just covers enter/exit of safe mode for updating CG and PG state, but could be extended to cover other RLC operations in the future if necessary. Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu/gfx: adjust gfx_v8_0_send_serdes_cmd for STAlex Deucher1-6/+17
Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu/gfx8: rename send_serdes_cmdAlex Deucher1-7/+7
So it can be shared with CZ/ST. Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu/gmc: add proper CG flags for fijiAlex Deucher2-5/+7
We were already enabling these CG features, this uses the standard interface for doing so. Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu/common: add proper CG flags for fijiAlex Deucher1-9/+13
We were already enabling these CG features, this uses the standard interface for doing so. Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu/sdma: add proper CG flags for fijiAlex Deucher2-3/+5
We were already enabling these CG features, this uses the standard interface for doing so. Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu/gfx: add proper CG flags for fijiAlex Deucher2-35/+56
We were already enabling these CG features, this uses the standard interface for doing so. Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/ttm: implement LRU add callbacks v2Christian König1-0/+2
This allows fine grained control for the driver where to add a BO into the LRU. v2: fix typo in comment Reviewed-by: Sinclair Yeh <syeh@vmware.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/ttm: remove use_ticket parameter from ttm_bo_reserveChristian König1-1/+1
Not used any more. Reviewed-by: Sinclair Yeh <syeh@vmware.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: fix the coding style in amdgpu_ring.cChristian König1-2/+3
No functional change. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: use the ring name for debugfs (v2)Christian König3-35/+25
Instead of hard coding just another name in the ring code. v2: squash in Tom's rebase fix Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: reduce the ring size for SDMAChristian König3-3/+3
Those are way too large. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: reduce the ring size for GFXChristian König2-4/+4
Those are way too large. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: use max_dw in ring_initChristian König10-22/+18
Instead of specifying the total ring size calculate that from the maximum number of dw a submission can have and the number of concurrent submissions. This fixes UVD with 8 concurrent submissions or more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amd: make a type-safe cgs_device struct. (v2)Dave Airlie3-56/+49
This is just a type-safety things to avoid everyone taking void *, it doesn't change anything. v2: agd5f: split out the dal changes into a separate patch. Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: handle more than 10 UVD sessions (v2)Arindam Nath5-18/+40
Change History -------------- v2: - Make firmware version check correctly. Firmware versions >= 1.80 should all support 40 UVD instances. - Replace AMDGPU_MAX_UVD_HANDLES with max_handles variable. v1: - The firmware can handle upto 40 UVD sessions. Signed-off-by: Arindam Nath <arindam.nath@amd.com> Signed-off-by: Ayyappa Chandolu <ayyappa.chandolu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amd: make some function-local tables static constNils Wallménius2-2/+2
These tables were initialized on stack on each call, avoid that and save a little bit of text size. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: Mark all instances of struct drm_info_list as constNils Wallménius8-10/+10
All these are compile time constand and the drm_debugfs_create/remove_files functions take a const pointer argument. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amd/scheduler: Mark amdgpu_sched_ops constNils Wallménius2-2/+2
This marks the struct amdgpu_sched_ops const and adjusts amd_sched_init to take a const pointer for the ops param. The ops member of struct amd_gpu_scheduler is also changed to const. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amd: Mark some tables as constNils Wallménius5-7/+7
This patch marks some compile-time constant tables 'const'. The tables marked in this patch are the low hanging fruit where little other changes were necesary to avoid casting away constness etc. Also mark some tables that are private to a file as static. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: reuse VMIDs already assigned to a processChristian König1-31/+46
If we don't need to flush we can easily use another VMID already assigned to the process. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: add a fence after the VM flushChristian König3-14/+35
This way we can track when the flush is done. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: use a sync object for VMID fences v2Christian König3-32/+132
v2: rebase & cleanup This way we can store more than one fence as user for each VMID. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> (v1) Reviewed-by: Chunming Zhou <david1.zhou@amd.com> (v1) Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: merge VM manager and VM context ID structureChristian König2-78/+78
No need to have two of them any more. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: Set PFLIP_SUBMITTED for crtc after address updateAndrey Grodzovsky1-3/+11
Also add some pflip debug prints. This change allows us to wait on pflip status until the new surface address is actually submitted to the register. This reverts ed3020e923240829dcdfd3343f6e91dc02c63775 drm/amdgpu: Move MMIO flip out of spinlocked region The original change assumed DAL will aquire locks inside DAL implemetion of page_flip callback which eventaully didn't happen. This moves the flip before status update which makes sense for the non-DAL code pathes as well. Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu: Use lockless gem BO free callbackDaniel Vetter1-1/+1
No dev->struct_mutex anywhere to be seen. Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1461691808-12414-11-git-send-email-daniel.vetter@ffwll.ch
2016-05-03drm/amdgpu: make sure vertical front porch is at least 1Alex Deucher1-0/+4
hw doesn't like a 0 value. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-13 07:50:57 +0300