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path: root/drivers/gpu/drm/amd/amdgpu
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2015-11-10drm/amdgpu: don't try to recreate sysfs entries on resumeAlex Deucher2-0/+6
commit c86f5ebfbd147d1a228ab89ee1658e18939bd7ad upstream. Fixes an error on resume caused by: fa022a9b65d2886486a022fd66b20c823cd76ad9 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-11-10drm/amdgpu: add missing dpm check for KV dpm late initAlex Deucher1-0/+3
commit 677c884ff6370add1360e2b9558285355ebe2b36 upstream. Skip dpm late init if dpm is disabled. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-10-27drm/amdgpu: Keep the pflip interrupts always enabled v7Michel Dänzer4-8/+84
commit f6c7aba47bcc0b1cc2085c8d8af80f8c02f28269 upstream. This fixes flickering issues caused by prematurely firing pflip interrupts. v2 (chk): add commit message, fix DCE V10/V11 and DM as well v3: Re-enable pflip interrupt wherever we re-enable a CRTC v4: Enable pflip interrupt in DAL as well v5: drop DAL changes for upstream v6: (agd): only enable interrupts on crtcs that exist v7: (agd): integrate suggestions from Michel Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-10-27drm/amdgpu: check before checking pci bridge registersAlex Deucher2-0/+6
commit e79d5c0870eedce94e5f5a2ffab30511e48fa144 upstream. Make sure we are not the root device before attempting to read the pcie bridge registers to check the pcie gen speeed. Fixes a crash when the device is passed through to a VM. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-10-27drm/amdgpu: fix num_crtc on CZAlex Deucher1-1/+1
commit 26d0c21db1fd1679fcf07863741c13ba5ce37a65 upstream. Hw only has 3 crtcs. copy paste typo. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-10-27drm/amdgpu: add pm sysfs files lateAlex Deucher3-10/+17
commit fa022a9b65d2886486a022fd66b20c823cd76ad9 upstream. They were added relatively early in the driver init process which meant that in some cases the driver was not finished initializing before external tools tried to use them which could result in a crash depending on the timing. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-10-23drm/amdgpu: Restore LCD backlight level on resumeAlex Deucher1-2/+1
commit 74b3112e95073b351e3b0b9799795bc76f8415fa upstream. Instead of only enabling the backlight (which seems to set it to max brightness), just re-set the current backlight level, which also takes care of enabling the backlight if necessary. Port of radeon commit: drm/radeon: Restore LCD backlight level on resume (>= R5xx) Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-10-23drm/amdgpu: Fix max_vblank_count value for current display enginesAlex Deucher1-1/+1
commit 5a6adfa20b622a273205e33b20c12332aa7eb724 upstream. The value was much too low, which could cause the userspace visible vblank counter to move backwards when the hardware counter wrapped around. Ported from radeon commit: b0b9bb4dd51f396dcf843831905f729e74b0c8c0 Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-10-23drm/amdgpu: make UVD handle checking more strictLeo Liu1-27/+41
commit 5146419e6feb99cfbc8dbf005dd2f62603e15efb upstream. Invalid messages can crash the hw otherwise Ported from radeon commit a1b403da70e038ca6c6c6fe434d1d873546873a3 Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-10-23drm/amdgpu: fix the UVD suspend sequence orderLeo Liu3-6/+6
commit 2bd188d0167227932be3cf5b033c0e600b01291f upstream. Fixes suspend issues with UVD. Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-10-23drm/amdgpu: Disable UVD PGLeo Liu1-1/+2
commit 1ee4478a26cf55c8f8a6219d7e99f2b48959394d upstream. This causes problems with multiple suspend/resume cycles. Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-10-23drm/amdgpu: fix overflow on 32bit systemsChristian König1-1/+1
commit b7d698d7fd7d132c6ebe56d230584f2cae6c94ee upstream. mem->start is a long, so this can overflow on 32bit systems. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-09-21drm/amdgpu: fix typo in dce10 watermark setupAlex Deucher1-1/+1
commit be9fd2e978939ab3e59ee4164fa0893e70359557 upstream. Using the wrong watermwark value for the secondary watermark. Copy paste typo. Noticed by Mykola. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-09-21drm/amdgpu: fix typo in dce11 watermark setupAlex Deucher1-1/+1
commit 99a092383794e07d60644b449a01656da112eb1f upstream. Using the wrong watermwark value for the secondary watermark. Copy paste typo. Noticed by Mykola. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-09-21drm/amdgpu: fix IH ring allocation for bus addresses (v2)Alex Deucher1-13/+7
commit 52293c67f1e7542a6dc61037d83c266e216bef27 upstream. Use pci_alloc_consistent rather than kzalloc since we need 256 byte aligned memory for the ring buffer. v2: fix copy paste typo in free function noticed by Jammy. bug: https://bugs.freedesktop.org/show_bug.cgi?id=91749 Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-09-21drm/amdgpu: Don't link train DisplayPort on HPD until we get the dpcdAlex Deucher1-0/+5
commit a887adadb7b9ef9eb4ee48e4ad575aefcfd1db14 upstream. This is a port of: DRM - radeon: Don't link train DisplayPort on HPD until we get the dpcd to amdgpu. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-09-21drm/amdgpu: fix one warning messageJammy Zhou1-1/+2
commit 21df89a5667de5fcd061753d3833e7dfcf5509d3 upstream. In function 'amdgpu_uvd_cs_pass2': warning: 'min_ctx_size' may be used uninitialized in this function buf_sizes[0x4] = min_ctx_size; ^ note: 'min_ctx_size' was declared here unsigned image_size, tmp, min_dpb_size, num_dpb_buffer, min_ctx_size; ^ Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-09-21drm/amdgpu/atom: Send out the full AUX addressAlex Deucher1-1/+2
commit e39daf2c63518a8ce92e3ad5caa04097524b3585 upstream. AUX addresses are 20 bits long. Send out the entire address instead of just the low 16 bits. Port of: drm/radeon/atom: Send out the full AUX address to amdgpu Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-08-12Revert "drm/amdgpu: Configure doorbell to maximum slots"Alex Deucher1-1/+1
This reverts commit 78ad5cdd21f0d614983fc397338944e797ec70b9. This commit breaks dpm and suspend/resume on CZ.
2015-08-12drm/amdgpu: add context buffer size check for HEVCBoyuan Zhang1-3/+14
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05drm/amdgpu: set fw_version and feature_version for smu fw loadingJammy Zhou3-21/+30
The fw_version and feature_verion should be set correctly when the firmwares are loaded by SMU on Tonga/Carrzio/Iceland Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05drm/amdgpu: add feature version for SDMA ucodeJammy Zhou5-1/+5
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05drm/amdgpu: add feature version for RLC and MEC v2Jammy Zhou4-5/+21
Expose feature version to user space for RLC/MEC/MEC2 ucode as well v2: fix coding style Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05drm/amdgpu: increment queue when iterating on this variable.Nicolas Iooss1-1/+1
gfx_v7_0_print_status contains a for loop on variable queue which does not update this variable between each iteration. This is bug is reported by clang while building allmodconfig LLVMLinux on x86_64: drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:5126:19: error: variable 'queue' used in loop condition not modified in loop body [-Werror,-Wloop-analysis] for (queue = 0; queue < 8; i++) { ^~~~~ Fix this by incrementing variable queue instead of i in this loop. Signed-off-by: Nicolas Iooss <nicolas.iooss_linux@m4x.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05drm/amdgpu: fix rb setting for CZAlex Deucher1-4/+1
Always set num_rbs to 2 for CZ. The 1 RB parts are often harvest configs. The will get sorted out in mesa when we program PA_SC_RASTER_CONFIG[_1]. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-07-29drm/amdgpu: add new parameter to seperate map and unmapmonk.liu1-3/+5
Signed-off-by: monk.liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-07-29drm/amdgpu: hdp_flush is not needed for inside IBmonk.liu1-8/+8
hdp flush is not needed for IBs that dispatched from kernel inside because there is no video memory host access Signed-off-by: monk.liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-07-29drm/amdgpu: different emit_ib for gfx and computemonk.liu2-22/+71
compute ring didn't use const engine byfar, so ignore CE things in compute routine Signed-off-by: monk.liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-07-29drm/amdgpu: information leak in amdgpu_info_ioctl()Dan Carpenter1-1/+1
We recently changed the drm_amdgpu_info_device struct so now there is a 4 byte hole at the end. We need to initialize it so we don't disclose secret information from the stack. Fixes: fa92754e9c47 ('drm/amdgpu: add VCE harvesting instance query') Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-07-29drm/amdgpu: clean up init sequence for failuresAlex Deucher3-19/+31
If we fail during device init, record what state each block is in so that we can tear down clearly. Fixes various problems on device init failure. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-07-23drm/amdgpu/cz/dpm: properly report UVD and VCE clock levelsAlex Deucher1-16/+45
VCE, UVD DPM work similarly to SCLK DPM. Report the current clock levels for UVD and VCE via debugfs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-07-23drm/amdgpu/cz: implement voltage validation properlyAlex Deucher1-7/+16
CZ uses a different set of registers compared to previous asics and supports separate NB and GFX planes. Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-07-23drm/amdgpu: add VCE harvesting instance queryLeo Liu1-0/+1
Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-07-23drm/amdgpu: implement VCE 3.0 harvesting support (v4)Alex Deucher2-0/+52
For boards with bad VCE blocks, only configure the working block. v2: use the harvest info for pipe setup v3: fix mask check as noted by Leo v4: add dGPU support Reviewed-by: Christian König <christian.koenig@amd.com> (v2) Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-07-23drm/amdgpu/dce10: Re-set VBLANK interrupt state when enabling a CRTCMichel Dänzer1-0/+4
This doesn't seem strictly necessary with Tonga right now, but that might change with future power management enhancements. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23drm/amdgpu/dce11: Re-set VBLANK interrupt state when enabling a CRTCMichel Dänzer1-0/+4
Something (ATOM BIOS?) seems to be clobbering the LB_INTERRUPT_MASK register while the CRTC is off, which caused e.g. glxgears or gnome-shell to hang after a modeset. Reviewed-and-Tested-by: Alex Deucher <alexander.deucher@amd.com> Tested-by: Sonny Jiang <sonny.jiang@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-16drm/amdgpu/dce8: Re-set VBLANK interrupt state when enabling a CRTCMichel Dänzer1-0/+4
Something (ATOM BIOS?) seems to be clobbering the LB_INTERRUPT_MASK register while the CRTC is off, which caused e.g. glxgears or gnome-shell to hang after a modeset. Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-07-16drm/amdgpu/cz: silence some dpm debug outputAlex Deucher1-3/+3
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-07-16drm/amdgpu/cz: store the forced dpm levelAlex Deucher1-0/+2
So the selected forced level shows up properly in sysfs. Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-07-16drm/amdgpu/cz: unforce dpm levels before forcing to low/highAlex Deucher1-1/+7
This is necessary to properly reset the min/max limits before clamping them otherwise we may get improper clamping depending on what what was the last forced level. Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-07-16drm/amdgpu: remove bogus check in gfx8 rb setupAlex Deucher1-4/+1
Always respect the harvest configuration as is. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-07-16drm/amdgpu: set proper index/data pair for smc regs on CZ (v2)Alex Deucher1-2/+33
v2: squash in later fix Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-07-16drm/amdgpu: disable the IP module if early_init returns -ENOENT (v2)Alex Deucher1-2/+7
If we run into a part with a harvest configuration where the entire IP block is unusable, just disable the IP block. v2: fix logic as noted by Christian Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-07-16drm/amdgpu: stop context leak in the error pathChristian König1-2/+6
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-07-16drm/amdgpu: validate the context id in the dependenciesChristian König1-1/+10
Just to make sure userspace don't send nonsense to the kernel. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-07-09drm/amdgpu: fix timeout calculationChristian König1-1/+1
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-07-08drm/amdgpu: Handle irqs only based on irq ring, not irq status regs.Mario Kleiner3-24/+42
This is a translation of the patch ... "drm/radeon: Handle irqs only based on irq ring, not irq status regs." ... for the vblank irq handling, to fix the same problem described in that patch on the new driver. Only compile tested due to lack of suitable hw. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> CC: Michel Dänzer <michel.daenzer@amd.com> CC: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-29drm/amdgpu: add flag to delay VM updatesChristian König1-3/+3
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-29drm/amdgpu: add optional dependencies to the CS IOCTL v2Christian König1-1/+58
v2: remove unrelated whitespace change, fix C comment Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-29drm/amdgpu: recreate fence from user seqChristian König3-9/+44
And use common fence infrastructure for the wait. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
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