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path: root/drivers/gpu/drm/amd/amdgpu/vi.c
AgeCommit message (Expand)AuthorFilesLines
2018-10-10drm/amdgpu: Change VI gfx/sdma/smu init sequenceRex Zhu1-12/+12
2018-08-21drm/amdgpu: access register without KIQYintian Tao1-2/+2
2018-07-13drm/amdgpu/vi: fix mixed up state in smu clockgating setupAlex Deucher1-6/+6
2018-05-15drm/amdgpu: add VEGAM support to viLeo Liu1-2/+29
2018-05-15drm/amdgpu: Add APU support in vi_set_vce_clocksRex Zhu1-6/+25
2018-05-15drm/amdgpu: Add APU support in vi_set_uvd_clocksRex Zhu1-11/+35
2018-04-11drm/amdgpu/vi: implement asic need_full_reset callbackAlex Deucher1-0/+22
2018-03-19drm/amdgpu: Delete dead code when early initRex Zhu1-5/+0
2018-03-15drm/amdgpu: Remove wrapper layer of smu ip functionsRex Zhu1-7/+6
2018-03-15drm/amdgpu: move getting pcie info to common codeAlex Deucher1-2/+0
2018-03-15drm/amdgpu: move firmware loading type setup to common codeAlex Deucher1-3/+0
2018-02-19drm/amdgpu: add optional ring to *_hdp callbacksChristian König1-6/+15
2018-02-19drm/amdgpu: add HDP asic callbacks for VIAlex Deucher1-0/+14
2018-02-06drm/amdgpu: re-enable CGCG on CZ and disable on STShirish S1-1/+1
2018-01-30drm/amdgpu: disable coarse grain clockgating for STShirish S1-1/+0
2017-12-20drm/amdgpu: use defines for mmBIF_IOV_FUNC_IDENTIFIER fieldsAlex Deucher1-4/+3
2017-12-20drm/amdgpu: only check mmBIF_IOV_FUNC_IDENTIFIER on tonga/fijiAlex Deucher1-8/+13
2017-12-18drm/amdgpu: rename amdgpu_get_pcie_infoAlex Deucher1-1/+1
2017-12-18drm/amdgpu: rename ip block helper functionsAlex Deucher1-66/+66
2017-12-18drm/amdgpu: rename amdgpu_pci_config_resetAlex Deucher1-1/+1
2017-12-18drm/amdgpu: rename amdgpu_program_register_sequenceAlex Deucher1-15/+15
2017-12-06drm/amdgpu: remove nonsense const u32 cast on ARRAY_SIZE resultChristian König1-5/+5
2017-10-09Merge branch 'drm-next-4.15-dc' of git://people.freedesktop.org/~agd5f/linux ...Dave Airlie1-0/+21
2017-10-06drm/amd/powerplay: move set_clockgating_by_smu to pp func tableRex Zhu1-8/+14
2017-09-27drm/amd/dc: Add dc display driver (v2)Harry Wentland1-0/+21
2017-08-16drm/amdgpu: Disable GFX PG on CZFelix Kuehling1-2/+1
2017-06-16Merge branch 'drm-next-4.13' of git://people.freedesktop.org/~agd5f/linux int...Dave Airlie1-127/+87
2017-05-25drm/amdgpu/virt: change the place of virt_init_settingXiangliang Yu1-5/+5
2017-05-25drm/amdgpu: drop support for per ASIC read registersChristian König1-41/+1
2017-05-25drm/amdgpu: drop support for untouched registersChristian König1-84/+84
2017-05-25Revert "drm/amd/amdgpu: Disable GFX_PG on Carrizo until compute issues solved"Alex Deucher1-1/+1
2017-05-16drm/amd: fix include notation and remove -Iinclude/drm flagMasahiro Yamada1-1/+1
2017-03-30drm/amdgpu: just disallow reading untouched registersChristian König1-6/+0
2017-03-30drm/amdgpu: use new flag to handle different firmware loading methodHuang Rui1-2/+2
2017-03-30drm/amdgpu: enable gfx/system/vce clockgating on Polars12.Rex Zhu1-1/+19
2017-03-30drm/amdgpu: enable GFX/UVD/VCE PG for BristolEric Huang1-1/+4
2017-03-30drm/amdgpu/vi: add missing error handling when setting uvd dclkAlex Deucher1-0/+2
2017-03-30drm/amdgpu/vi: remove duplicate CG flagsAlex Deucher1-2/+0
2017-03-30drm/amdgpu: remove unneeded conversions to boolAndrew F. Davis1-8/+8
2017-03-30drm/amdgpu: add asic callback to get memsize registerAlex Deucher1-0/+6
2017-03-30drm/amdgpu:cg & pg shouldn't active on VF deviceMonk Liu1-0/+6
2017-03-10drm/amd/amdgpu: Disable GFX_PG on Carrizo until compute issues solvedTom St Denis1-1/+1
2017-02-18drm/amd/amdgpu: post card if there is real hw resetting performedJim Qu1-0/+1
2017-01-27drm/amdgpu/vi: fix mailbox irq mistakeXiangliang Yu1-3/+3
2017-01-27drm/amdgpu/vi: add support virtualizationXiangliang Yu1-2/+32
2017-01-27drm/amdgpu/virt: use kiq to access registers (v2)Xiangliang Yu1-0/+3
2017-01-27drm/amdgpu: refine vce3.0 initialize.Rex Zhu1-1/+31
2017-01-27drm/amdgpu: add get clockgating_state method for vi commonHuang Rui1-0/+27
2017-01-27drm/amdgpu/vi: move virtualization detection forwardXiangliang Yu1-11/+13
2017-01-27drm/amdgpu/virt: rename fieldes of virtualization structureXiangliang Yu1-3/+3
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