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path: root/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
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2017-04-04drm/amdgpu: use a 64bit interval tree for VM management v2Christian König1-2/+2
This only makes a difference for 32-bit systems. The idea is to have a fixed virtual address space size with 4-level page tables and to minimize differences between 32 and 64-bit systems. v2: Update commit message. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-30drm/amdgpu: Don't touch PG&CG for SRIOV MMXiangliang Yu1-0/+6
For SRIOV, MM don't need to care about PG & CG, skip it. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-30drm/amdgpu: add initial uvd 7.0 support for vega10Leo Liu1-11/+41
Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-09drm/amdgpu: when dpm disabled, also can enable uvd cg/pg.Rex Zhu1-0/+9
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27drm/amd/amdgpu: remove the uncessary parameter for ib schedulerJunwei Zhang1-1/+1
Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27drm/amd/amdgpu: get maximum and used UVD handles (v4)Arindam Nath1-0/+25
Change History -------------- v4: Changes suggested by Emil, Christian - return -ENODATA for asics with unlimited sessions v3: changes suggested by Christian - Add a check for UVD IP block using AMDGPU_HW_IP_UVD query type. - Add a check for asic_type to be less than CHIP_POLARIS10 since starting Polaris, we support unlimited UVD instances. - Add kerneldoc style comment for amdgpu_uvd_used_handles(). v2: as suggested by Christian - Add a new query AMDGPU_INFO_NUM_HANDLES - Create a helper function to return the number of currently used UVD handles. - Modify the logic to count the number of used UVD handles since handles can be freed in non-linear fashion. v1: - User might want to query the maximum number of UVD instances supported by firmware. In addition to that, if there are multiple applications using UVD handles at the same time, he might also want to query the currently used number of handles. For this we add two variables max_handles and used_handles inside drm_amdgpu_info_hw_ip. So now an application (or libdrm) can use AMDGPU_INFO IOCTL with AMDGPU_INFO_HW_IP_INFO query type to get these values. Signed-off-by: Arindam Nath <arindam.nath@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-07drm/amd/amdgpu: add Polaris12 support (v3)Junwei Zhang1-0/+5
v2: agd: squash in various fixes v3: agd: squash in: drm/amdgpu: remove unnecessary smc sk firmware for polaris12 Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-23drm/amdgpu/uvd: reduce IB parsing overhead on UVD5+ (v2)Alex Deucher1-5/+10
UVD 5 and newer do not have the same placement limitations as older chips, so skip the first pass since it's just overhead on chips where we don't have to force placement. v2: fix inverted logic Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-23drm/amdgpu/uvd: consolidate code for fetching addr from ctxAlex Deucher1-12/+16
Same code duplicated in both functions. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-28Merge tag 'topic/drm-misc-2016-10-27' of ↵Dave Airlie1-13/+13
git://anongit.freedesktop.org/git/drm-intel into drm-next Pull request already again to get the s/fence/dma_fence/ stuff in and allow everyone to resync. Otherwise really just misc stuff all over, and a new bridge driver. * tag 'topic/drm-misc-2016-10-27' of git://anongit.freedesktop.org/git/drm-intel: drm/bridge: fix platform_no_drv_owner.cocci warnings drm/bridge: fix semicolon.cocci warnings drm: Print some debug/error info during DP dual mode detect drm: mark drm_of_component_match_add dummy inline drm/bridge: add Silicon Image SiI8620 driver dt-bindings: add Silicon Image SiI8620 bridge bindings video: add header file for Mobile High-Definition Link (MHL) interface drm: convert DT component matching to component_match_add_release() dma-buf: Rename struct fence to dma_fence dma-buf/fence: add an lockdep_assert_held() drm/dp: Factor out helper to distinguish between branch and sink devices drm/edid: Only print the bad edid when aborting drm/msm: add missing header dependencies drm/msm/adreno: move function declarations to header file drm/i2c/tda998x: mark symbol static where possible doc: add missing docbook parameter for fence-array drm: RIP mode_config->rotation_property drm/msm/mdp5: Advertize 180 degree rotation drm/msm/mdp5: Use per-plane rotation property
2016-10-25drm/amdgpu: improve parse_cs handling a bitChristian König1-0/+3
This way we can use parse_cs and still keep VM mode enabled. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-and-Tested by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25drm/amdgpu: remove adev pointer from struct amdgpu_bo v2Christian König1-1/+1
It's completely pointless to have two pointers to the device in the same structure. v2: rename function to amdgpu_ttm_adev, fix typos Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25drm/amdgpu: add AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS flag v3Christian König1-2/+4
Add a flag noting that a BO must be created using linear VRAM and set this flag on all in kernel users where appropriate. Hopefully I haven't missed anything. v2: add it in a few more places, fix CPU mapping. v3: rename to VRAM_CONTIGUOUS, fix typo in CS code. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Tested-by: Mike Lothian <mike@fireburn.co.uk> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25dma-buf: Rename struct fence to dma_fenceChris Wilson1-13/+13
I plan to usurp the short name of struct fence for a core kernel struct, and so I need to rename the specialised fence/timeline for DMA operations to make room. A consensus was reached in https://lists.freedesktop.org/archives/dri-devel/2016-July/113083.html that making clear this fence applies to DMA operations was a good thing. Since then the patch has grown a bit as usage increases, so hopefully it remains a good thing! (v2...: rebase, rerun spatch) v3: Compile on msm, spotted a manual fixup that I broke. v4: Try again for msm, sorry Daniel coccinelle script: @@ @@ - struct fence + struct dma_fence @@ @@ - struct fence_ops + struct dma_fence_ops @@ @@ - struct fence_cb + struct dma_fence_cb @@ @@ - struct fence_array + struct dma_fence_array @@ @@ - enum fence_flag_bits + enum dma_fence_flag_bits @@ @@ ( - fence_init + dma_fence_init | - fence_release + dma_fence_release | - fence_free + dma_fence_free | - fence_get + dma_fence_get | - fence_get_rcu + dma_fence_get_rcu | - fence_put + dma_fence_put | - fence_signal + dma_fence_signal | - fence_signal_locked + dma_fence_signal_locked | - fence_default_wait + dma_fence_default_wait | - fence_add_callback + dma_fence_add_callback | - fence_remove_callback + dma_fence_remove_callback | - fence_enable_sw_signaling + dma_fence_enable_sw_signaling | - fence_is_signaled_locked + dma_fence_is_signaled_locked | - fence_is_signaled + dma_fence_is_signaled | - fence_is_later + dma_fence_is_later | - fence_later + dma_fence_later | - fence_wait_timeout + dma_fence_wait_timeout | - fence_wait_any_timeout + dma_fence_wait_any_timeout | - fence_wait + dma_fence_wait | - fence_context_alloc + dma_fence_context_alloc | - fence_array_create + dma_fence_array_create | - to_fence_array + to_dma_fence_array | - fence_is_array + dma_fence_is_array | - trace_fence_emit + trace_dma_fence_emit | - FENCE_TRACE + DMA_FENCE_TRACE | - FENCE_WARN + DMA_FENCE_WARN | - FENCE_ERR + DMA_FENCE_ERR ) ( ... ) Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Acked-by: Sumit Semwal <sumit.semwal@linaro.org> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20161025120045.28839-1-chris@chris-wilson.co.uk
2016-09-30Merge branch 'drm-next-4.9' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie1-4/+4
into drm-next Some additional fixes for 4.9: - The rest of Christian's GTT rework which fixes a long standing bug in the GPUVM code among other things - Changes to the pci shutdown callbacks for certain hypervisors - Fix hpd interrupt storms on eDP panels which have the hpd interrupt enabled by the bios - misc cleanups and bug fixes * 'drm-next-4.9' of git://people.freedesktop.org/~agd5f/linux: (33 commits) drm/radeon: always apply pci shutdown callbacks drm/amdgpu: always apply pci shutdown callbacks (v2) drm/amdgpu: improve VM PTE trace points drm/amdgpu: fix GART_DEBUGFS define drm/amdgpu: free userptrs even if GTT isn't bound drm/amd/amdgpu: Various cleanups for DCEv6 drm/amdgpu: fix BO move offsets drm/amdgpu: fix amdgpu_move_blit on 32bit systems drm/amdgpu: fix gtt_mgr bo's offset drm/amdgpu: fix initializing the VM BO shadow drm/amdgpu: fix initializing the VM last eviction counter drm/amdgpu: cleanup VM shadow BO unreferencing drm/amdgpu: allocate GTT space for shadow VM page tables drm/amdgpu: rename all rbo variable to abo v2 drm/amdgpu: remove unused member from struct amdgpu_bo drm/amdgpu: add a custom GTT memory manager v2 drm/amdgpu/dce6: disable hpd on local panels drm/amdgpu/dce8: disable hpd on local panels drm/amdgpu/dce11: disable hpd on local panels drm/amdgpu/dce10: disable hpd on local panels ...
2016-09-28drm/amdgpu: rename all rbo variable to abo v2Christian König1-4/+4
Just to cleanup some radeon leftovers. sed -i "s/rbo/abo/g" drivers/gpu/drm/amd/amdgpu/*.c sed -i "s/rbo/abo/g" drivers/gpu/drm/amd/amdgpu/*.h v2: rebased Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-28Merge tag 'v4.8-rc8' into drm-nextDave Airlie1-1/+2
Linux 4.8-rc8 There was a lot of fallout in the imx/amdgpu/i915 drivers, so backmerge it now to avoid troubles. * tag 'v4.8-rc8': (1442 commits) Linux 4.8-rc8 fault_in_multipages_readable() throws set-but-unused error mm: check VMA flags to avoid invalid PROT_NONE NUMA balancing radix tree: fix sibling entry handling in radix_tree_descend() radix tree test suite: Test radix_tree_replace_slot() for multiorder entries fix memory leaks in tracing_buffers_splice_read() tracing: Move mutex to protect against resetting of seq data MIPS: Fix delay slot emulation count in debugfs MIPS: SMP: Fix possibility of deadlock when bringing CPUs online mm: delete unnecessary and unsafe init_tlb_ubc() huge tmpfs: fix Committed_AS leak shmem: fix tmpfs to handle the huge= option properly blk-mq: skip unmapped queues in blk_mq_alloc_request_hctx MIPS: Fix pre-r6 emulation FPU initialisation arm64: kgdb: handle read-only text / modules arm64: Call numa_store_cpu_info() earlier. locking/hung_task: Fix typo in CONFIG_DETECT_HUNG_TASK help text nvme-rdma: only clear queue flags after successful connect i2c: qup: skip qup_i2c_suspend if the device is already runtime suspended perf/core: Limit matching exclusive events to one PMU ...
2016-09-14drm/amdgpu: bind GTT on demandChristian König1-0/+4
We don't really need the GTT table any more most of the time. So bind it only on demand. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-14drm/amdgpu: free the BO in kernel by helper amdgpu_bo_free_kernel()Junwei Zhang1-12/+3
Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-24drm/amdgpu: use memcpy_to/fromio for UVD fw uploadChristian König1-5/+5
Also use the firmware size from the header instead of calculating it. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-24drm/amdgpu: switch UVD code to use UVD_NO_OP for paddingAlex Deucher1-2/+4
Replace packet2's with packet0 writes to UVD_NO_OP. The value written to UVD_NO_OP does not matter. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-24drm/amdgpu: add support for UVD_NO_OP registerAlex Deucher1-0/+1
Writes to this register are the preferred way to do NOPs. Bump the driver version as well. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-10drm/amdgpu: Fix memory trashing if UVD ring test failsJay Cornwall1-1/+2
fence_put was called on an uninitialized variable. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Jay Cornwall <jay@jcornwall.me> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-08drm/amdgpu: remove the check for sessions being closedLeo Liu1-8/+2
This will make clock and power gated when no block decoded, for example when paused during the playback. Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-08drm/amdgpu: user amdgpu_bo_create_kernel for the UVD BOChristian König1-28/+3
Saves us some code. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-29drm/amdgpu: enable UVD context buffer for older HWChristian König1-2/+26
Supported starting on certain FW versions. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-29drm/amdgpu: fix default UVD context sizeChristian König1-1/+1
Context buffers should be denied by default, not allowed. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-29drm/amdgpu: add a fence timeout for the IB tests v2Christian König1-10/+15
10ms should be enough for now. v2: fix some typos in CIK code Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-29drm/amdgpu: move UVD IB test into common code v2Christian König1-0/+35
Since we now raise the clocks from begin_use() we don't need a separate function for each hw generation any more. v2: remove unintentional lowering of the UVD clocks, fix typos for CIK hw. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-29drm/amdgpu: use begin/end_use for UVD power/clock gatingChristian König1-8/+7
This fixes turning power and clock on when it is actually needed. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-29Revert "drm/amd/powerplay: workaround issue that when uvd dpm disabled,"Rex Zhu1-4/+0
This reverts commit <2ded8c7f04825bc5cde2624f6aa83f1ff62672c0> As we enabled bypass mode for uvd on polaris10 when clockgating. so no need to set uvd clock manually. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Christian König<christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-27Merge branch 'drm-next-4.8' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie1-6/+5
into drm-next A few more patches for 4.8. Mostly bug fixes and some prep work for iceland powerplay support. I have a couple polaris patches and Edward's misc cleanups that require a merge with Linus'. I don't know if you are planning a merge anytime soon. [airlied: fixed up endian vs 32-bit change in ppatomctrl] * 'drm-next-4.8' of git://people.freedesktop.org/~agd5f/linux: (26 commits) drm/amdgpu: comment out unused defaults_bonaire_pro static const structures to fix the build drm/amdgpu: temporary comment out unused static const structures to fix the build drm/amdgpu: S3 resume fail on Polaris10 drm/amd/powerplay: add pp_tables_get_response_times function in process pptables drm/amd/powerplay: fix the incorrect return value drm/amd/powerplay: add atomctrl_get_voltage_evv function in ppatomctrl drm/amdgpu: add new definitions into ppsmc.h for iceland drm/amd/powerplay: add SMU register macro for future use drm/amdgpu: add ucode_start_address into cgs_firmware_info drm/amdgpu: no need load microcode at sdma if powerplay is enabled drm/amdgpu: rename smumgr to smum for dpm drm/amdgpu: disable GFX PG on CZ/BR/ST drivers: gpu: drm: amd: powerplay: hwmgr: Remove unused variable drm/amdgpu: return -ENOSPC when running out of UVD handles drm/amdgpu: trace need_flush in grab_vm as well drm/amdgpu: always signal all fences drm/amdgpu: check flush fence context instead of same ring v2 drm/radeon: support backlight control for UNIPHY3 drm/amdgpu: support backlight control for UNIPHY3 drm/amdgpu: remove usec timeout loop from IB tests ...
2016-07-14drm/amdgpu: return -ENOSPC when running out of UVD handlesChristian König1-1/+1
This is a minor interface change, but clearly won't break anything. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-14drm/amdgpu: cleanup hw reference handling in the IB testsChristian König1-1/+1
Reference should be taken when we make the assignment, not anywhere else. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-14drm/amdgpu: cleanup UVD coding styleChristian König1-4/+3
Cleanup 80 chars limit. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Alexandre Demers <alexandre.f.demers@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-29drm/amd/powerplay: workaround for UVD clock issueRex Zhu1-0/+4
workaround issue that when uvd dpm disabled, uvd clock remain high on polaris10. Manually turn off the clocks. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-09drm/amdgpu: fix uvd fini mem leakMonk Liu1-9/+10
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11amdgpu/uvd: separate context buffer from DPBSonny Jiang1-3/+59
Updated to handle latest UVD ucode. Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amd: cleanup remaining spaces and tabs v2Christian König1-3/+3
This is the result of running the following commands: find drivers/gpu/drm/amd/ -name "*.h" -exec sed -i 's/[ \t]\+$//' {} \; find drivers/gpu/drm/amd/ -name "*.c" -exec sed -i 's/[ \t]\+$//' {} \; find drivers/gpu/drm/amd/ -name "*.h" -exec sed -i 's/ \+\t/\t/' {} \; find drivers/gpu/drm/amd/ -name "*.c" -exec sed -i 's/ \+\t/\t/' {} \; v2: drop changes to DAL and internal headers Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: keep vm in job instead of ib (v2)Monk Liu1-1/+1
ib.vm is a legacy way to get vm, after scheduler implemented vm should be get from job, and all ibs from one job share the same vm, no need to keep ib.vm just move vm field to job. this patch as well add job as paramter to ib_schedule so it can get vm from job->vm. v2: agd: sqaush in: drm/amdgpu: check if ring emit_vm_flush exists in vm flush No vm flush on engines that don't support VM. bug: https://bugs.freedesktop.org/show_bug.cgi?id=95195 Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-09Merge tag 'v4.6-rc7' into drm-nextDave Airlie1-0/+5
Merge this back as we've built up a fair few conflicts, and I have some newer trees to pull in.
2016-05-05drm/amdgpu: code style refine.Rex Zhu1-1/+1
Whitespace fix. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: change ELM/BAF to Polaris10/Polaris11Flora Cui1-8/+8
Adjust to preferred code names. Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: add UVD support for ELM/BAFSonny Jiang1-0/+10
Ellesmere and Baffin are UVD 6.3 Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: handle more than 10 UVD sessions (v2)Arindam Nath1-8/+22
Change History -------------- v2: - Make firmware version check correctly. Firmware versions >= 1.80 should all support 40 UVD instances. - Replace AMDGPU_MAX_UVD_HANDLES with max_handles variable. v1: - The firmware can handle upto 40 UVD sessions. Signed-off-by: Arindam Nath <arindam.nath@amd.com> Signed-off-by: Ayyappa Chandolu <ayyappa.chandolu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-04-22amdgpu/uvd: add uvd fw version for amdgpuSonny Jiang1-0/+3
Was previously always hardcoded to 0. Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2016-04-14drm/amdgpu: when suspending, if uvd/vce was running. need to cancel delay work.Rex Zhu1-0/+2
fix the issue that when resume back, uvd/vce dpm was disabled and uvd/vce's performace dropped. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2016-04-05drm/amdgpu: save and restore the firwmware cache part when suspend resumeLeo Liu1-16/+11
Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-04-05drm/amdgpu: save and restore UVD context with suspend and resumeLeo Liu1-19/+26
and revert fix following it accordingly Revert "drm/amdgpu: stop trying to suspend UVD sessions v2" Revert "drm/amdgpu: fix the UVD suspend sequence order" Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-17drm/amdgpu: move ib.fence to job.fenceMonk Liu1-0/+1
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.39.0) at 2024-11-06 05:48:03 +0300