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path: root/drivers/gpu/drm/amd/amdgpu/amdgpu.h
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2015-08-25drm/amdgpu: remove v_seq handling from the scheduler v2Christian König1-1/+1
Simply not used any more. Only keep 32bit atomic for fence sequence numbering. v2: trivial rebase Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1) Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> (v1) Reviewed-by: Chunming Zhou <david1.zhou@amd.com> (v1)
2015-08-25drm/amdgpu: improve sa_bo->fence by kernel fenceChunming Zhou1-4/+4
Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-25drm/amdgpu: modify amdgpu_fence_wait_any() to amdgpu_fence_wait_multiple()Junwei Zhang1-3/+6
Rename the function and update the related code with this modified function. Add the new parameter of bool wait_all. If wait_all is true, it will return when all fences are signaled or timeout. If wait_all is false, it will return when any fence is signaled or timeout. Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-21drm/amdgpu: some clean up for cs_ioctlChunming Zhou1-8/+0
Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-21drm/amdgpu: abstract amdgpu_job for schedulerChunming Zhou1-1/+15
Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-17drm/amdgpu: wait on page directory changes. v2Bas Nieuwenhuizen1-0/+1
Pagetables can be moved and therefore the page directory update can be necessary for the current cs even if none of the the bo's are moved. In that scenario there is no fence between the sdma0 and gfx ring, so we add one. v2 (chk): rebased Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17drm/amdgpu: fix waiting for all fences before flippingChristian König1-1/+3
Otherwise we might see corruption. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17drm/amdgpu: remove amdgpu_fence_waitChristian König1-1/+0
It was just a wrapper for fence_wait anyway. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17drm/amdgpu: remove amdgpu_fence_signaledChristian König1-1/+0
The common kernel function does the same thing. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17drm/amd: add scheduler fence implementation (v2)Chunming Zhou1-0/+1
scheduler fence is based on kernel fence framework. v2: squash in Christian's build fix Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-17drm/amdgpu: use kernel submit helper in vmChunming Zhou1-14/+0
Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-17drm/amdgpu: merge amd_sched_entity and amd_context_entity v2Christian König1-3/+3
Avoiding a couple of casts. v2: rename c_entity to entity as well Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17drm/amdgpu: process sched job exactly triggered by fence signalChunming Zhou1-1/+1
Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-17drm/amdgpu: cleanup amdgpu_ctx inti/fini v2Christian König1-5/+4
Cleanup the kernel context handling. v2: rebased Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> (v1)
2015-08-17drm/amdgpu: cleanup ctx_mgr init/finiChristian König1-2/+2
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17drm/amdgpu: fix bo list handling in CSChristian König1-3/+2
We didn't initialized the mutex in the cloned bo list resulting in nice warnings from lockdep. Also fixes error handling in this function. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17drm/amdgpu: move sched job process from isr to fence callbackChunming Zhou1-1/+1
This way can avoid interrupt lost, and can process sched job exactly. Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17drm/amdgpu: add kernel fence in ib_submit_kernel_helperChunming Zhou1-1/+2
every sbumission should be able to get a fence. Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>
2015-08-17drm/amdgpu: use kernel fence for last_pt_updateChunming Zhou1-2/+2
Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>
2015-08-17drm/amdgpu: stop using addr to check for BO move v3Christian König1-5/+10
It is theoretically possible that a swapped out BO gets the same GTT address, but different backing pages while being swapped in. Instead just use another VA state to note updated areas. Ported from not upstream yet radeon commit with the same name. v2: fix some bugs in the original implementation found in the radeon code. v3: squash in VCE/UVD fix Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17drm/amdgpu: move wait_queue_head from adev to ring (v2)monk.liu1-1/+1
thus unnecessary wake up could be avoid between rings v2: move wait_queue_head to fence_drv from ring Signed-off-by: monk.liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17drm/amdgpu: new implement for fence_wait_any (v2)monk.liu1-3/+3
origninal method will sleep/schedule at the granurarity of HZ/2 and based on seq signal method, the new implement is based on kernel fance interface, no unnecessary schedule at all v2: replace logic of original amdgpu_fence_wait_any Signed-off-by: monk.liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17drm/amdgpu: add helper function for kernel submissionChunming Zhou1-0/+7
Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-17drm/amdgpu: fix seq in ctx_add_fenceChunming Zhou1-2/+1
if enabling scheduler, then the queued seq is assigned when pushing job before emitting job. Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-17drm/amdgpu: add amdgpu.sched_hw_submission optionJammy Zhou1-0/+1
This option can be used to specify the max number of submissions in the active HW queue. The default value is 2 now. Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17drm/amdgpu: add amdgpu.sched_jobs optionJammy Zhou1-0/+1
This option can be used to specify the max job number in the job queue, and it is 16 by default. Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17drm/amdgpu: protect fence_process from multiple contextChunming Zhou1-0/+1
fence_process may be called from kthread, user thread and interrupt context. it is possible to called concurrently, then will wake up fence queue multiple times. Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17drm/amdgpu: dispatch job for vmChunming Zhou1-0/+20
use kernel context to submit command for vm Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Christian K?nig <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17drm/amdgpu: add kernel ctx support (v2)Chunming Zhou1-0/+3
v2: rebase against kfd changes Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Christian K?nig <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17drm/amdgpu: prepare job before push to sw queue for pte ringChunming Zhou1-0/+1
user mode will still use pte ring as a normal ring. if the prepare job generates another command(update pte) on its ring in scheduler, then will kill scheduler which is going to waiting later job but pending running job. Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Christian K?nig <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17drm/amdgpu: make sure the fence is emitted before ring to get it.Chunming Zhou1-0/+2
Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Christian K?nig <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17drm/amdgpu: dispatch jobs in csChunming Zhou1-0/+1
BO validation is moved to scheduler except usrptr which must be validated in user process Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Christian K?nig <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17drm/amdgpu: add bo list copyChunming Zhou1-0/+3
Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Christian K?nig <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17drm/amdgpu: add backend implementation of gpu scheduler (v2)Chunming Zhou1-0/+8
v2: fix rebase breakage Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Christian K?nig <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17drm/amdgpu: add context entity initChunming Zhou1-0/+2
Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Christian K?nig <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17drm/amdgpu: add scheduler initializationAlex Deucher1-0/+4
1. Add kernel parameter option, default 0 2. Add scheduler initialization for amdgpu Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Acked-by: Christian K?nig <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17drm/amdgpu: merge amdgpu_family.h into amd_shared.h (v2)Jammy Zhou1-2/+1
Make the definitions common for all driver components v2: fix kfd Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17drm/amdgpu: fix UVD/VCE fence handlingChristian König1-2/+2
We need to return the sequence number to userspace even when we don't use user fences. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17drm/amdgpu: add fence suspend/resume functionsAlex Deucher1-0/+2
Added to: - handle draining the ring on suspend - properly enable/disable interrupts on suspend and resume Fix breakages from: commit 467ee3be53d240d08beed2e82a941e820c1ac323 Author: Chunming Zhou <david1.zhou@amd.com> Date: Mon Jun 1 14:14:32 2015 +0800 drm/amdgpu: always enable EOP interrupt v2 Tested-by: Audrey Grodzovsky <audrey.grodzovsky@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17drm/amdgpu: always enable EOP interrupt v2Chunming Zhou1-1/+0
v2 (chk): always enable EOP interrupt, independent of scheduler, remove now unused delayed_irq handling. Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17drm/amdgpu: rework vm_grab_id interfaceChristian König1-2/+2
This makes assigning VM IDs independent from the use of VM IDs. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17drm/amdgpu: remove amdgpu_fence_recreateChristian König1-2/+0
It's not used any more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17drm/amdgpu: add user fence context map v2Christian König1-0/+16
This is a prerequisite for the GPU scheduler to make the order of submission independent from the order of execution. v2: properly implement the locking Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17drm/amdgpu: deal with foreign fences in amdgpu_syncChristian König1-2/+2
This also requires some error handling from the callers of that function. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17drm/amdgpu: cleanup context structure v2Alex Deucher1-28/+22
The comment is misleading and incorrect, remove it. Printing the id is completely meaningless and this practice can cause a race conditions on command submission. The flags and hangs fields are completely unused. Give all fields a common indentation. v2: remove fpriv reference and unused flags as well, fix debug message. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17drm/amd: Add CGS interfacesChunming Zhou1-0/+8
CGS (Common Graphics Services) is an AMD cross component abstraction layer to designed to better encapsulate specific IP block drivers so different teams can effectively work on differnet IP block drivers independently. It provides a common interface for things like accessing registers, allocating GPU memory, and registering interrupt sources. The plan is to eventually move more and more IP drivers to this interface. The first user is the ACP IP driver. Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17Merge tag 'v4.2-rc7' into drm-nextDave Airlie1-1/+15
Linux 4.2-rc7 Backmerge master for i915 fixes
2015-08-05drm/amdgpu: add feature version for SDMA ucodeJammy Zhou1-0/+1
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05drm/amdgpu: add feature version for RLC and MEC v2Jammy Zhou1-0/+3
Expose feature version to user space for RLC/MEC/MEC2 ucode as well v2: fix coding style Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-07-29drm/amdgpu: clean up init sequence for failuresAlex Deucher1-1/+7
If we fail during device init, record what state each block is in so that we can tear down clearly. Fixes various problems on device init failure. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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