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path: root/drivers/gpu/drm/amd/amdgpu/amdgpu.h
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2015-08-17drm/amdgpu: stop using addr to check for BO move v3Christian König1-5/+10
It is theoretically possible that a swapped out BO gets the same GTT address, but different backing pages while being swapped in. Instead just use another VA state to note updated areas. Ported from not upstream yet radeon commit with the same name. v2: fix some bugs in the original implementation found in the radeon code. v3: squash in VCE/UVD fix Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17drm/amdgpu: move wait_queue_head from adev to ring (v2)monk.liu1-1/+1
thus unnecessary wake up could be avoid between rings v2: move wait_queue_head to fence_drv from ring Signed-off-by: monk.liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17drm/amdgpu: new implement for fence_wait_any (v2)monk.liu1-3/+3
origninal method will sleep/schedule at the granurarity of HZ/2 and based on seq signal method, the new implement is based on kernel fance interface, no unnecessary schedule at all v2: replace logic of original amdgpu_fence_wait_any Signed-off-by: monk.liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17drm/amdgpu: add helper function for kernel submissionChunming Zhou1-0/+7
Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-17drm/amdgpu: fix seq in ctx_add_fenceChunming Zhou1-2/+1
if enabling scheduler, then the queued seq is assigned when pushing job before emitting job. Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
2015-08-17drm/amdgpu: add amdgpu.sched_hw_submission optionJammy Zhou1-0/+1
This option can be used to specify the max number of submissions in the active HW queue. The default value is 2 now. Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17drm/amdgpu: add amdgpu.sched_jobs optionJammy Zhou1-0/+1
This option can be used to specify the max job number in the job queue, and it is 16 by default. Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17drm/amdgpu: protect fence_process from multiple contextChunming Zhou1-0/+1
fence_process may be called from kthread, user thread and interrupt context. it is possible to called concurrently, then will wake up fence queue multiple times. Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17drm/amdgpu: dispatch job for vmChunming Zhou1-0/+20
use kernel context to submit command for vm Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Christian K?nig <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17drm/amdgpu: add kernel ctx support (v2)Chunming Zhou1-0/+3
v2: rebase against kfd changes Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Christian K?nig <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17drm/amdgpu: prepare job before push to sw queue for pte ringChunming Zhou1-0/+1
user mode will still use pte ring as a normal ring. if the prepare job generates another command(update pte) on its ring in scheduler, then will kill scheduler which is going to waiting later job but pending running job. Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Christian K?nig <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17drm/amdgpu: make sure the fence is emitted before ring to get it.Chunming Zhou1-0/+2
Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Christian K?nig <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17drm/amdgpu: dispatch jobs in csChunming Zhou1-0/+1
BO validation is moved to scheduler except usrptr which must be validated in user process Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Christian K?nig <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17drm/amdgpu: add bo list copyChunming Zhou1-0/+3
Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Christian K?nig <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17drm/amdgpu: add backend implementation of gpu scheduler (v2)Chunming Zhou1-0/+8
v2: fix rebase breakage Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Christian K?nig <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17drm/amdgpu: add context entity initChunming Zhou1-0/+2
Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Christian K?nig <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17drm/amdgpu: add scheduler initializationAlex Deucher1-0/+4
1. Add kernel parameter option, default 0 2. Add scheduler initialization for amdgpu Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Acked-by: Christian K?nig <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17drm/amdgpu: merge amdgpu_family.h into amd_shared.h (v2)Jammy Zhou1-2/+1
Make the definitions common for all driver components v2: fix kfd Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17drm/amdgpu: fix UVD/VCE fence handlingChristian König1-2/+2
We need to return the sequence number to userspace even when we don't use user fences. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17drm/amdgpu: add fence suspend/resume functionsAlex Deucher1-0/+2
Added to: - handle draining the ring on suspend - properly enable/disable interrupts on suspend and resume Fix breakages from: commit 467ee3be53d240d08beed2e82a941e820c1ac323 Author: Chunming Zhou <david1.zhou@amd.com> Date: Mon Jun 1 14:14:32 2015 +0800 drm/amdgpu: always enable EOP interrupt v2 Tested-by: Audrey Grodzovsky <audrey.grodzovsky@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17drm/amdgpu: always enable EOP interrupt v2Chunming Zhou1-1/+0
v2 (chk): always enable EOP interrupt, independent of scheduler, remove now unused delayed_irq handling. Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17drm/amdgpu: rework vm_grab_id interfaceChristian König1-2/+2
This makes assigning VM IDs independent from the use of VM IDs. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17drm/amdgpu: remove amdgpu_fence_recreateChristian König1-2/+0
It's not used any more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17drm/amdgpu: add user fence context map v2Christian König1-0/+16
This is a prerequisite for the GPU scheduler to make the order of submission independent from the order of execution. v2: properly implement the locking Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17drm/amdgpu: deal with foreign fences in amdgpu_syncChristian König1-2/+2
This also requires some error handling from the callers of that function. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17drm/amdgpu: cleanup context structure v2Alex Deucher1-28/+22
The comment is misleading and incorrect, remove it. Printing the id is completely meaningless and this practice can cause a race conditions on command submission. The flags and hangs fields are completely unused. Give all fields a common indentation. v2: remove fpriv reference and unused flags as well, fix debug message. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17drm/amd: Add CGS interfacesChunming Zhou1-0/+8
CGS (Common Graphics Services) is an AMD cross component abstraction layer to designed to better encapsulate specific IP block drivers so different teams can effectively work on differnet IP block drivers independently. It provides a common interface for things like accessing registers, allocating GPU memory, and registering interrupt sources. The plan is to eventually move more and more IP drivers to this interface. The first user is the ACP IP driver. Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17Merge tag 'v4.2-rc7' into drm-nextDave Airlie1-1/+15
Linux 4.2-rc7 Backmerge master for i915 fixes
2015-08-05drm/amdgpu: add feature version for SDMA ucodeJammy Zhou1-0/+1
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05drm/amdgpu: add feature version for RLC and MEC v2Jammy Zhou1-0/+3
Expose feature version to user space for RLC/MEC/MEC2 ucode as well v2: fix coding style Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-07-29drm/amdgpu: clean up init sequence for failuresAlex Deucher1-1/+7
If we fail during device init, record what state each block is in so that we can tear down clearly. Fixes various problems on device init failure. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-07-23drm/amdgpu: implement VCE 3.0 harvesting support (v4)Alex Deucher1-0/+4
For boards with bad VCE blocks, only configure the working block. v2: use the harvest info for pipe setup v3: fix mask check as noted by Leo v4: add dGPU support Reviewed-by: Christian König <christian.koenig@amd.com> (v2) Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-07-20drm/amdgpu: Add H/W agnostic amdgpu <--> amdkfd interfaceOded Gabbay1-0/+3
This patch adds an interface file between amdgpu and amdkfd. This interface file is H/W agnostic, thus containing functions that operate the same for any AMD APU/GPU H/W generation. The functions in this interface mirror (some) of the functions in radeon_kfd.c (the radeon<-->amdkfd interface file). The main functions are: - amdgpu_amdkfd_init - initialize the amdkfd module - amdgpu_amdkfd_load_interface - load the H/W interface according to the currently probed device - amdgpu_amdkfd_device_probe - probe the device in amdkfd - amdgpu_amdkfd_device_init - initialize the device in amdkfd - amdgpu_amdkfd_interrupt - call the ISR of amdkfd - amdgpu_amdkfd_suspend - suspend callback from amdgpu - amdgpu_amdkfd_resume - resume callback from amdgpu This patch also modifies the relevant amdgpu files, to use this new interface. Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2015-06-29drm/amdgpu: recreate fence from user seqChristian König1-3/+2
And use common fence infrastructure for the wait. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-06-29drm/amdgpu: check VCE relocation buffer rangeChristian König1-0/+1
port of radeon commit 2fc5703abda201f138faf63bdca743d04dbf4b1a. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com>
2015-06-10drm/amdgpu: enable vce powergatingSonny Jiang1-0/+2
Enable VCE dpm and powergating. VCE dpm dynamically scales the VCE clocks on demand. Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-06-05drm/amdgpu: disable user fence interrupt (v2)Chunming Zhou1-2/+5
amdgpu submits both kernel and user fences, but just need one interrupt, disable user fence interrupt and don't effect user fence. v2: fix merge error Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-04drm/amdgpu: only support IBs in the buffer list (v2)Marek Olšák1-1/+0
amdgpu_cs_find_mapping doesn't work without all buffers being validated, so the TTM validation must be done first. v2: only use amdgpu_cs_find_mapping for UVD/VCE VM emulation Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-06-04drm/amdgpu: add vram_type and vram_bit_width for interface query (v2)Ken Wang1-1/+1
Track the type of vram on the board and provide a query for it. User mode drivers and tools want this information for determining bandwidth information and form informational purposes. v2: fix build when CI support is not enabled Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-06-04drm/amdgpu: add me/ce/pfp_feature_version interface queryKen Wang1-0/+3
Provide this information to usermode drivers. We were previously missing this info. Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-06-04drm/amdgpu add ce_ram_size for interface queryKen Wang1-0/+2
Add a query for the CE ram size. User mode drivers will want to use this to determine how much size of the cache on the CE. Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewd-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-06-04drm/amdgpu: remove mclk_lockChristian König1-2/+0
Not needed any more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-04drm/amdgpu: sync fence of clear_invalids (v2)monk.liu1-1/+1
bo_va may un-initialized, fix it. Signed-off-by: monk.liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>
2015-06-04drm/amdgpu: implement the allocation range (v3)Chunming Zhou1-1/+4
Pass a ttm_placement pointer to amdgpu_bo_create_restricted add min_offset to amdgpu_bo_pin_restricted. This makes it easier to allocate memory with address restrictions. With this patch we can also enable 2-ended allocation again. v2: fix rebase conflicts v3: memset placements before using Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-04drm/amdgpu: rename amdgpu_ip_funcs to amd_ip_funcs (v2)yanyang11-66/+9
The structure is renamed and moved to amd_shared.h to make the component independent. This makes it easier to add new components in the future. v2: fix include path Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: yanyang1 <young.yang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-04drm/amdgpu: drop AMDGPU_FENCE_SIGNALED_SEQChristian König1-3/+0
It's causing issues with VMID handling and comparing the fence value two times actually doesn't make handling faster. Port of radeon commit "d6d5c5b8364bcc4d52cddc68bcb0a330d2af20f3". Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com>
2015-06-04drm/amdgpu: recalculate VCE firmware BO sizeLeo Liu1-2/+0
Firmware required BO size changes in terms of ASIC family Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-06-04drm/amdgpu: add and implement the GPU reset status queryMarek Olšák1-3/+3
Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-06-04drm/amdgpu: rewording some left radeonsJammy Zhou1-1/+1
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-06-04drm/amdgpu: fix context switchChristian König1-4/+3
Properly protect the state and also handle submission failures. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com>
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