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path: root/drivers/gpio
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2017-11-08gpio: Move irqchip into struct gpio_irq_chipThierry Reding1-7/+7
In order to consolidate the multiple ways to associate an IRQ chip with a GPIO chip, move more fields into the new struct gpio_irq_chip. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-31gpio: mb86s70: Revert "Return error if requesting an already assigned gpio"Ard Biesheuvel1-5/+0
Commit fd9c963c5661 ("gpio: mb86s70: Return error if requesting an already assigned gpio") adds code that infers from the state of the GPIO Pin Function Register (PFR) whether a GPIO has been assigned already. This assumes that the pin functions are set to 'peripheral' when the driver is loaded, which is not guaranteed. Also, the GPIO layer is perfectly capable of keeping track of which GPIOs have been assigned already, so we shouldn't need this check in the first place. This reverts commit fd9c963c5661af3403e77e312c0d9941773b6c1b. Cc: Axel Lin <axel.lin@ingics.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-31gpio: mb86s7x: share with other SoCs as moduleArd Biesheuvel2-3/+7
In order to reuse this driver for the Socionext Synquacer SC2A11 SoC, which inherited this IP from Fujitsu, remove the ARCH_MB86S7X Kconfig dependency, and revert the changes that prevent it from being built as a module. This reverts commits d65aa4b67b4f47f303bdeaef1e4d42ef18e6b293 and d5610e514e92144d19bd5e39e5cf3804bbf85f3e. Cc: Geliang Tang <geliangtang@gmail.com> Cc: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> [Folded in module_platform_driver() fixup] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-31gpio: brcmstb: implement suspend/resume/shutdownDoug Berger1-50/+151
This commit corrects problems with the previous wake implementation by implementing suspend and resume power management operations and the driver shutdown operation. Wake masks are used to keep track of which GPIO should wake the device. On suspend the GPIO state is saved and the possible wakeup sources are explicitly unmasked in the hardware. Non-wakeup sources are explicitly masked so IRQCHIP_MASK_ON_SUSPEND is no longer necessary. The saved state of the GPIO is restored upon resume. It is important not to write to the GPIO status register since this has the effect of clearing bits. The status register is explicitly removed from the register save and restore to ensure this. The shutdown operation allows the hardware to be put into the same quiesced state as the suspend operation and removes the need for the reboot notifier. Unfortunately, there appears to be some confusion about whether a pending disabled wake interrupt should wake the system. If a wake capable interrupt is disabled using the default "lazy disable" behavior and it is triggered before the suspend_device_irq call the interrupt hardware will be acknowledged by mask_ack_irq and the IRQS_PENDING flag is added to its state. However, the IRQS_PENDING flag of wake interrupts is not checked to prevent the transition to suspend and the hardware has been acked which prevents its wakeup. If the lazy disabled interrupt is triggered after the call to suspend_device_irqs then the wakeup logic will abort the suspend. The irq_disable method is defined by this GPIO driver to prevent lazy disable so that the pending hardware state remains asserted allowing the hardware to wake and providing a consistent behavior. In addition, the IRQ_DISABLE_UNLAZY flag is set for the non-wake parent interrupt as a convenience to prevent the need to add code to the brcmstb_gpio_irq_handler to support "lazy disable" of the non-wake parent interrupt when it is disabled during suspend and resume. Chained interrupt parents are not normally disabled, but these GPIO devices have different parent interrupts for wake and non-wake handling. It is convenient to mask the non-wake parent when suspending to preserve the hardware state for proper wakeup accounting when the driver is resumed. Signed-off-by: Doug Berger <opendmb@gmail.com> Acked-by: Gregory Fong <gregory.0xf0@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-31gpio: brcmstb: consolidate interrupt domainsDoug Berger2-44/+146
The GPIOLIB IRQ chip helpers were very appealing, but badly broke the 1:1 mapping between a GPIO controller's device_node and its interrupt domain. When another device-tree node references a GPIO device as its interrupt parent, the irq_create_of_mapping() function looks for the irq domain of the GPIO device and since all bank irq domains reference the same GPIO device node it always resolves to the irq domain of the first bank regardless of which bank the number of the GPIO should resolve. This domain can only map hwirq numbers 0-31 so interrupts on GPIO above that can't be mapped by the device-tree. This commit effectively reverts the patch from Gregory Fong [1] that was accepted upstream and replaces it with a consolidated irq domain implementation with one larger interrupt domain per GPIO controller instance spanning multiple GPIO banks based on an earlier patch [2] also submitted by Gregory Fong. [1] https://patchwork.kernel.org/patch/6921561/ [2] https://patchwork.kernel.org/patch/6347811/ Fixes: 19a7b6940b78 ("gpio: brcmstb: Add interrupt and wakeup source support") Signed-off-by: Doug Berger <opendmb@gmail.com> Reviewed-by: Gregory Fong <gregory.0xf0@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-31gpio: brcmstb: correct the configuration of level interruptsDoug Berger1-2/+2
This commit corrects a bug when configuring the GPIO hardware for IRQ_TYPE_LEVEL_LOW and IRQ_TYPE_LEVEL_HIGH interrupt types. The hardware is now correctly configured to support those types. Fixes: 19a7b6940b78 ("gpio: brcmstb: Add interrupt and wakeup source support") Signed-off-by: Doug Berger <opendmb@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Gregory Fong <gregory.0xf0@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-31gpio: brcmstb: switch to handle_level_irq flowDoug Berger1-6/+12
Reading and writing the gpio bank status register each time a pending interrupt bit is serviced could cause new pending bits to be cleared without servicing the associated interrupts. By using the handle_level_irq flow instead of the handle_simple_irq flow we get proper handling of interrupt masking as well as acking of interrupts. The irq_ack method is added to support this. Fixes: 19a7b6940b78 ("gpio: brcmstb: Add interrupt and wakeup source support") Signed-off-by: Doug Berger <opendmb@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Gregory Fong <gregory.0xf0@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-31gpio: brcmstb: release the bgpio lock during irq handlersDoug Berger1-5/+16
The basic memory-mapped GPIO controller lock must be released before calling the registered GPIO interrupt handlers to allow the interrupt handlers to access the hardware. Examples of why a GPIO interrupt handler might want to access the GPIO hardware include an interrupt that is configured to trigger on rising and falling edges that needs to read the current level of the input to know how to respond, or an interrupt that causes a change in a GPIO output in the same bank. If the lock is not released before enterring the handler the hardware accesses will deadlock when they attempt to grab the lock. Since the lock is only needed to protect the calculation of unmasked pending interrupts create a dedicated function to perform this and hide the complexity. Fixes: 19a7b6940b78 ("gpio: brcmstb: Add interrupt and wakeup source support") Signed-off-by: Doug Berger <opendmb@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Gregory Fong <gregory.0xf0@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-31gpio: brcmstb: allow all instances to be wakeup sourcesDoug Berger1-7/+7
This commit allows a wakeup parent interrupt to be shared between instances. It also removes the redundant can_wake member of the private data structure by using whether the parent_wake_irq has been defined to indicate that the GPIO device can wake. Fixes: 19a7b6940b78 ("gpio: brcmstb: Add interrupt and wakeup source support") Signed-off-by: Doug Berger <opendmb@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Gregory Fong <gregory.0xf0@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-31gpio-adnp: Use common error handling code in adnp_gpio_dbg_show()Markus Elfring1-16/+13
Add a jump target so that a bit of exception handling can be better reused at the end of this function. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-31gpio-rcar: use devm_ioremap_resource()Sergei Shtylyov1-8/+6
Using devm_ioremap_resource() has several advantages over devm_ioremap(): - it checks the passed resource's validity; - it calls devm_request_mem_region() to check for the resource overlap; - it prints an error message in case of error. We can call devm_ioremap_resource() instead of devm_ioremap_nocache() as ioremap() and ioremap_nocache() are implemented identically on ARM. Doing this saves 2 LoCs and 80 bytes (AArch64 gcc 4.8.5). Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-30gpio-mmio: Use the new .get_multiple() callbackLinus Walleij1-3/+84
It is possible to read all lines of a generic MMIO GPIO chip with a single register read so support this if we are in native endianness. Add an especially quirky callback to read multiple lines for the variants that require you to read values from the output registers if and only if the line is set as output. We managed to do that with a maximum of two register reads, and just one read if the requested lines are all input or all output. Cc: Anton Vorontsov <anton@enomsg.org> Cc: Lukas Wunner <lukas@wunner.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-25gpio: mmio: Make pin2mask() a private businessLinus Walleij1-26/+19
The vtable call pin2mask() was introducing a vtable function call in every gpiochip callback for a generic MMIO GPIO chip. This was not exactly efficient. (Maybe link-time optimization could get rid of it, I don't know.) After removing all external calls into this API we can make it a boolean flag in the struct gpio_chip call and sink the function into the gpio-mmio driver yielding encapsulation and potential speedups. Cc: Anton Vorontsov <anton@enomsg.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-25gpio: mpc8xxx: Do not reverse bits using bgpioLinus Walleij1-6/+17
The MPC8xxx driver is always instantiating its generic GPIO functions with the flag BGPIOF_BIG_ENDIAN. This means "big-endian bit order" and means the bits representing the GPIO lines in the registers are reversed around 31 bits so line 0 is at bit 31 and so forth down to line 31 in bit 0. Instead of looping into the generic MMIO gpio to do the simple calculation of a bitmask, through a vtable call with two parameters likely using stack frames etc (unless the compiler optimize it) and obscuring the view for the programmer, let's just open-code what the call does. This likely executes faster, saves space and makes the code easier to read. Cc: Liu Gang <Gang.Liu@nxp.com> Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-25gpio: brcmstb: Do not use gc->pin2mask()Linus Walleij1-3/+3
The pin2mask() accessor only shuffles BIT ORDER in big endian systems, i.e. the bitstuffing is swizzled big endian so "bit 0" is bit 7 or bit 15 or bit 31 or so. The brcmstb only uses big endian BYTE ORDER which will be taken car of by the ->write_reg() callback. Just use BIT(offset) to assign the bit. Acked-by: Gregory Fong <gregory.0xf0@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-25gpio: grgpio: Do not use gc->pin2mask()Linus Walleij1-3/+3
The pin2mask() accessor only shuffles BIT ORDER in big endian systems, i.e. the bitstuffing is swizzled big endian so "bit 0" is bit 7 or bit 15 or bit 31 or so. The grgpio only uses big endian BYTE ORDER which will be taken car of by the ->write_reg() callback. Just use BIT(offset) to assign the bit. Acked-by: Andreas Larsson <andreas@gaisler.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-25gpio: loongson1: fix bgpio usageLinus Walleij1-4/+3
When no flags are given, the native endianness is used to access the MMIO registers, and the pin2mask() call can simply be converted to a BIT() call, as per the default pin2mask() implementation in gpio-mmio.c. Cc: Kelvin Cheung <keguang.zhang@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-25gpio: dwapb: fix bgpio usageLinus Walleij1-2/+2
The DW APB GPIO driver uses the generic GPIO library gpio-mmio, and initialize the flags as "false", which should be 0. When no flags are given, the native endianness is used to access the MMIO registers, and the pin2mask() call can simply be converted to a BIT() call, as per the default pin2mask() implementation in gpio-mmio.c. Acked-by: Alan Tull <atull@kernel.org> Acked-by: Hoan Tran <hotran@apm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-23gpio: uniphier: add UniPhier GPIO controller driverMasahiro Yamada3-0/+516
This GPIO controller is used on UniPhier SoC family. It also serves as an interrupt controller, but interrupt signals are just delivered to the parent irqchip without any latching or OR'ing. This type of hardware can be well described with hierarchy IRQ domain. One unfortunate thing for this device is that the interrupt mapping to the interrupt parent is not contiguous. I asked how DT can describe interrupt mapping between two irqchips [1], but I could not find a good solution (at least in the framework level). In fact, irqchip drivers using hierarchy domain generally hard-code the DT binding of their parent. After tackling on several approaches such as hard-code of hwirqs, irq_domain_push_irq(), I ended up with a vendor specific property. If we come up with a good idea to support this in the framework, we can migrate over to it, but we can live with a driver-level solution for now. [1] https://lkml.org/lkml/2017/7/6/758 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-20gpio: Fix loose spellingAndrew Jeffery3-6/+6
Literally. I expect "lose" was meant here, rather than "loose", though you could feasibly use a somewhat uncommon definition of "loose" to mean what would be meant by "lose": "Loose the hounds" for instance, as in "Release the hounds". Substituting in "value" for "hounds" gives "release the value", and makes some sense, but futher substituting back to loose gives "loose the value" which overall just seems a bit anachronistic. Instead, use modern, pragmatic English and save a character. Cc: Russell Currey <ruscur@russell.cc> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-19gpio: Add driver for Maxim MAX3191x industrial serializerLukas Wunner3-0/+503
The driver was developed for and tested with the MAX31913 built into the Revolution Pi by KUNBUS, but should work with all members of the MAX3191x family: MAX31910: low power MAX31911: LED drivers MAX31912: LED drivers + 2nd voltage monitor + low power MAX31913: LED drivers + 2nd voltage monitor MAX31953: LED drivers + 2nd voltage monitor + isolation MAX31963: LED drivers + 2nd voltage monitor + isolation + buck regulator Cc: Mathias Duckeck <m.duckeck@kunbus.de> Signed-off-by: Lukas Wunner <lukas@wunner.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-19gpiolib: clear irq handler and data in one goMartin Kaiser1-2/+2
Replace the two separate calls for clearing the irqchip's chained handler and its data with a single irq_set_chained_handler_and_data() call. Signed-off-by: Martin Kaiser <martin@kaiser.cx> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-19gpio: mark expected switch fall-throughsGustavo A. R. Silva3-2/+6
In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-19gpiolib: don't allow OPEN_DRAIN & OPEN_SOURCE flags for inputBartosz Golaszewski1-0/+6
OPEN_DRAIN and OPEN_SOURCE flags only affect the way we drive a GPIO line, so they only make sense for output mode. Just as we only allow input mode for event handle requests, don't allow passing open-drain and open-source flags for any other mode than explicit output. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-19gpiolib: only check line handle flags onceBartosz Golaszewski1-7/+7
There's no need to check the validity of handle request flags more than once, right after copying the data from user. Move the check out of the for loop and simplify the error path by bailing out before allocating any resources. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-19gpio: Introduce ->get_multiple callbackLukas Wunner2-11/+172
SPI-attached GPIO controllers typically read out all inputs in one go. If callers desire the values of multipe inputs, ideally a single readout should take place to return the desired values. However the current driver API only offers a ->get callback but no ->get_multiple (unlike ->set_multiple, which is present). Thus, to read multiple inputs, a full readout needs to be performed for every single value (barring driver-internal caching), which is inefficient. In fact, the lack of a ->get_multiple callback has been bemoaned repeatedly by the gpio subsystem maintainer: http://www.spinics.net/lists/linux-gpio/msg10571.html http://www.spinics.net/lists/devicetree/msg121734.html Introduce the missing callback. Add corresponding consumer functions such as gpiod_get_array_value(). Amend linehandle_ioctl() to take advantage of the newly added infrastructure. Update the documentation. Cc: Rojhalat Ibrahim <imr@rtschenk.de> Signed-off-by: Lukas Wunner <lukas@wunner.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-19gpio: gpio-dwapb: add optional resetAlan Tull1-0/+9
Some platforms require reset to be released to allow register access. Signed-off-by: Alan Tull <atull@kernel.org> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> [Added DT bindings oneliner for standard reset binding] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-08gpio: rcar: Use of_device_get_match_data() helperGeert Uytterhoeven1-6/+2
Use the of_device_get_match_data() helper instead of open coding. Note that the gpio-rcar driver is used with DT only, so there's always a valid match. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-04gpio: Alter semantics of *raw* operations to actually be rawLinus Walleij1-43/+47
Currently calls to: gpiod_direction_output_raw() gpiod_set_raw_value() gpiod_set_raw_array_value() gpiod_set_raw_value_cansleep() gpiod_set_raw_array_value_cansleep() Respect that we do not want to invert the value written, but will still apply special open drain/open source semantics if the line has an open drain/open source flag. It also forbids us from driving an output marked as an interrupt line. This does not fit with the function name and expected semantics. In the w1 host driver (for example) we need to handle a line as open drain but sometimes force it to pull up, which means we should be able to use the gpiod_set_raw_value() for this, but it currently does not work. There are also use cases where users actually want to drive a line used by an interrupt. This is what they should be expected to use the *raw* accessors for. I have looked over the current users of this API and they do not seem to be using the *raw* accessors with open drain or open source so let's augment this behaviour before we have users expecting the inconsistent semantic. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-04gpio: Get rid of _prefix and __prefixesLinus Walleij1-26/+26
The arbitrarily marking of a function with _ or __ is taking to mean "perform some inner core of the caller" or something like that. At other times, this syntax has a totally different meaning. I don't like this since it is unambious and unhelpful to people reading the code, so replace it with _commit() suffixes. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-09-22gpio: thunderx: remove unused .map() hook from irq_domain_opsMasahiro Yamada1-13/+0
This driver implements .alloc() hook, so .map() is not used. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Tested-by: David Daney <david.daney@cavium.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-09-21gpio: tb10x: Handle return value of devm_kasprintfArvind Yadav1-0/+3
devm_kasprintf() can fail here and we must check its return value. Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-09-21gpio: brcmstb: Handle return value of devm_kasprintfArvind Yadav1-0/+4
devm_kasprintf() can fail here and we must check its return value. Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-09-19gpio: dwapb: Add wakeup source supportHoan Tran1-1/+22
This patch supports irq_set_wake for dwapb gpio. It allows GPIOs to be configured as wakeup sources and wake the system from suspend. Signed-off-by: Hoan Tran <hotran@apm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-09-19gpio: xgene-sb: Tidy up fwnode usageRobin Murphy1-11/+2
Since f94277af03ea ("of/platform: Initialise dev->fwnode appropriately"), of_platform_device_create() already initialises dev->fwnode to that of the appropriate device_node, so within the driver we shouldn't need to care whether we probed via DT or ACPI. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-09-07Merge tag 'mfd-next-4.14' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd Pull MFD updates from Lee Jones: "New Drivers - RK805 Power Management IC (PMIC) - ROHM BD9571MWV-M MFD Power Management IC (PMIC) - Texas Instruments TPS68470 Power Management IC (PMIC) & LEDs New Device Support: - Add support for HiSilicon Hi6421v530 to hi6421-pmic-core - Add support for X-Powers AXP806 to axp20x - Add support for X-Powers AXP813 to axp20x - Add support for Intel Sunrise Point LPSS to intel-lpss-pci New Functionality: - Amend API to provide register layout; atmel-smc Fix-ups: - DT re-work; omap, nokia - Header file location change {I2C => MFD}; dm355evm_msp, tps65010 - Fix chip ID formatting issue(s); rk808 - Optionally register touchscreen devices; da9052-core - Documentation improvements; twl-core - Constification; rtsx_pcr, ab8500-core, da9055-i2c, da9052-spi - Drop unnecessary static declaration; max8925-i2c - Kconfig changes (missing deps and remove module support) - Slim down oversized licence statement; hi6421-pmic-core - Use managed resources (devm_*); lp87565 - Supply proper error checking/handling; t7l66xb Bug Fixes: - Fix counter duplication issue; da9052-core - Fix potential NULL deference issue; max8998 - Leave SPI-NOR write-protection bit alone; lpc_ich - Ensure device is put into reset during suspend; intel-lpss - Correct register offset variable size; omap-usb-tll" * tag 'mfd-next-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (61 commits) mfd: intel_soc_pmic: Differentiate between Bay and Cherry Trail CRC variants mfd: intel_soc_pmic: Export separate mfd-cell configs for BYT and CHT dt-bindings: mfd: Add bindings for ZII RAVE devices mfd: omap-usb-tll: Fix register offsets mfd: da9052: Constify spi_device_id mfd: intel-lpss: Put I2C and SPI controllers into reset state on suspend mfd: da9055: Constify i2c_device_id mfd: intel-lpss: Add missing PCI ID for Intel Sunrise Point LPSS devices mfd: t7l66xb: Handle return value of clk_prepare_enable mfd: Add ROHM BD9571MWV-M PMIC DT bindings mfd: intel_soc_pmic_chtwc: Turn Kconfig option into a bool mfd: lp87565: Convert to use devm_mfd_add_devices() mfd: Add support for TPS68470 device mfd: lpc_ich: Do not touch SPI-NOR write protection bit on Haswell/Broadwell mfd: syscon: atmel-smc: Add helper to retrieve register layout mfd: axp20x: Use correct platform device ID for many PEK dt-bindings: mfd: axp20x: Introduce bindings for AXP813 mfd: axp20x: Add support for AXP813 PMIC dt-bindings: mfd: axp20x: Add AXP806 to supported list of chips mfd: Add ROHM BD9571MWV-M MFD PMIC driver ...
2017-09-05Merge tag 'gpio-v4.14-1' of ↵Linus Torvalds42-315/+1333
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull GPIO updates from Linus Walleij: "This is the bulk of the GPIO changes for the v4.14 cycle. Not so much changes this time, phew. David Daney and Bartosz Golaszewski did all the really interesting work in infrastructure improvement across GPIO and IRQ core, hats off for them and to tglx and Marc Z for general help with these patch sets. Core changes: - Allow the GPIO irqchip to allocate IRQs dynamically. This is an important change on systems where only a restricted number of IRQs, lesser than the number of GPIO lines, can be utilized. Now we can allocate these on a first-come-first-served basis instead of hogging up valuable IRQ lines. - Serious fix-up of the kerneldoc documentation and inclusion into the kerneldoc builds. - Pulled in the IRQ simulator from the IRQ core tree and use this in the GPIO mockup driver for exhaustive testing of interrupt abilities. New drivers: - New driver for ThunderX and OCTEON-TX. This is especially interesting as it picks up improvements from the IRQ core that allow us to handle fasteoi ACKs upwards in a hierarchy when there are IRQ flag latches on several levels in a hierarchy. Very interesting work here. - New subdriver for Renesas R-Car r8a7745 (RZ/G1E). Misc: - Several fixes and improvements for Xilinx Zynq GPIO. - Support an enablement GPIO for the 74x164 GPIO. - Switch a bunch of chips to use devres to allocate irq descriptors. - A bunch of constification fixes" * tag 'gpio-v4.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (63 commits) gpio: mockup: remove unused variable gc gpio: pl061: constify amba_id Revert "gpiolib: request the gpio before querying its direction" gpio: twl6040: remove unneeded forward declaration gpio: zevio: make gpio_chip const gpio: add gpio_add_lookup_tables() to add several tables at once gpio: rcar: Add r8a7745 (RZ/G1E) support gpio: brcmstb: check return value of gpiochip_irqchip_add() MAINTAINERS: Add entry for THUNDERX GPIO Driver. gpio: Add gpio driver support for ThunderX and OCTEON-TX gpio: mockup: use irq_sim gpio: mxs: use devres for irq generic chip gpio: mxc: use devres for irq generic chip gpio: pch: use devres for irq generic chip gpio: ml-ioh: use devres for irq generic chip gpio: sta2x11: use devres for irq generic chip gpio: sta2x11: disallow unbinding the driver gpio: mxs: disallow unbinding the driver gpio: mxc: disallow unbinding the driver gpio: aspeed: Remove reference to clock name in debounce warning message ...
2017-09-04mfd: twl: Move header file out of I2C realmWolfram Sang1-1/+1
include/linux/i2c is not for client devices. Move the header file to a more appropriate location. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Acked-by: Jonathan Cameron <jic23@kernel.org> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Acked-by: Thierry Reding <thierry.reding@gmail.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Daniel Thompson <daniel.thompson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-08-31gpio: mockup: remove unused variable gcColin Ian King1-2/+0
The variable gc is assigned but never read and is redundant. Remove it. Cleans up clang warning: drivers/gpio/gpio-mockup.c:169:2: warning: Value stored to 'gc' is never read Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-08-31gpio: pl061: constify amba_idArvind Yadav1-1/+1
amba_id are not supposed to change at runtime. All functions working with const amba_id. So mark the non-const structs as const. Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-08-31Revert "gpiolib: request the gpio before querying its direction"Linus Walleij1-11/+0
This reverts commit 108d23e322a247d9f89ba2e2742520ead0944cc9. It turns out this causes a regression on the OMAP, Marvell and Renesas. Reported-by: Tony Lindgren <tony@atomide.com> Reported-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reported-by: Jacopo Mondi <jacopo@jmondi.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-08-23gpio: twl6040: remove unneeded forward declarationMasahiro Yamada1-2/+0
There is no reference to twl6040gpo_chip before its definition. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-08-23gpio: zevio: make gpio_chip constBhumika Goyal1-1/+1
Make this const as it is only used as a copy operation. Done using Coccinelle. Signed-off-by: Bhumika Goyal <bhumirks@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-08-23gpio: add gpio_add_lookup_tables() to add several tables at onceDmitry Torokhov1-0/+17
When converting legacy board to use gpiod API() there might be several lookup tables in board file, let's provide a way to register them all at once. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-08-22gpio: brcmstb: check return value of gpiochip_irqchip_add()Masahiro Yamada1-4/+5
Because gpiochip_irqchip_add() may fail, its return value should be checked. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Gregory Fong <gregory.0xf0@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-08-22gpio: Add gpio driver support for ThunderX and OCTEON-TXDavid Daney3-0/+649
Cavium ThunderX and OCTEON-TX are arm64 based SoCs. Add driver for the on-chip GPIO pins. Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-08-21gpio: mockup: use irq_simBartosz Golaszewski2-71/+8
Shrink the driver by removing the code dealing with dummy interrupts and replacing it with calls to the irq_sim API. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-08-21gpio: mxs: use devres for irq generic chipBartosz Golaszewski1-5/+9
Use resource managed variants of irq_alloc_generic_chip() and irq_setup_generic_chip(). Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-08-21gpio: mxc: use devres for irq generic chipBartosz Golaszewski1-5/+10
Use resource managed variants of irq_alloc_generic_chip() and irq_setup_generic_chip(). Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-08-21gpio: pch: use devres for irq generic chipBartosz Golaszewski1-5/+7
Use resource managed variants of irq_alloc_generic_chip() and irq_setup_generic_chip(). Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
generated by cgit v1.2.3 (git 2.39.0) at 2024-10-26 19:25:20 +0300