summaryrefslogtreecommitdiff
path: root/drivers/gpio/gpio-sifive.c
AgeCommit message (Collapse)AuthorFilesLines
2023-03-15gpio: sifive: drop of_match_ptr for ID tableKrzysztof Kozlowski1-1/+1
The driver can match only via the DT table so the table should be always used and the of_match_ptr does not have any sense (this also allows ACPI matching via PRP0001, even though it might not be relevant here). drivers/gpio/gpio-sifive.c:263:34: error: ‘sifive_gpio_match’ defined but not used [-Werror=unused-const-variable=] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-01-02gpio: sifive: Fix refcount leak in sifive_gpio_probeMiaoqian Lin1-0/+1
of_irq_find_parent() returns a node pointer with refcount incremented, We should use of_node_put() on it when not needed anymore. Add missing of_node_put() to avoid refcount leak. Fixes: 96868dce644d ("gpio/sifive: Add GPIO driver for SiFive SoCs") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2022-05-24gpio: sifive: Make the irqchip immutableGeert Uytterhoeven1-4/+10
Commit 6c846d026d49 ("gpio: Don't fiddle with irqchips marked as immutable") added a warning to indicate if the gpiolib is altering the internals of irqchips. Following this change the following warning is now observed for the sifive driver: gpio gpiochip1: (38001000.gpio-controller): not an immutable chip, please consider fixing it! Fix this by making the irqchip in the sifive driver immutable. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Damien Le Moal <damien.lemoal@opensource.wdc.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-04-25gpio: use raw spinlock for gpio chip shadowed dataSchspa Shi1-6/+6
In case of PREEMPT_RT, there is a raw_spinlock -> spinlock dependency as the lockdep report shows. __irq_set_handler irq_get_desc_buslock __irq_get_desc_lock raw_spin_lock_irqsave(&desc->lock, *flags); // raw spinlock get here __irq_do_set_handler mask_ack_irq dwapb_irq_ack spin_lock_irqsave(&gc->bgpio_lock, flags); // sleep able spinlock irq_put_desc_busunlock Replace with a raw lock to avoid BUGs. This lock is only used to access registers, and It's safe to replace with the raw lock without bad influence. [ 15.090359][ T1] ============================= [ 15.090365][ T1] [ BUG: Invalid wait context ] [ 15.090373][ T1] 5.10.59-rt52-00983-g186a6841c682-dirty #3 Not tainted [ 15.090386][ T1] ----------------------------- [ 15.090392][ T1] swapper/0/1 is trying to lock: [ 15.090402][ T1] 70ff00018507c188 (&gc->bgpio_lock){....}-{3:3}, at: _raw_spin_lock_irqsave+0x1c/0x28 [ 15.090470][ T1] other info that might help us debug this: [ 15.090477][ T1] context-{5:5} [ 15.090485][ T1] 3 locks held by swapper/0/1: [ 15.090497][ T1] #0: c2ff0001816de1a0 (&dev->mutex){....}-{4:4}, at: __device_driver_lock+0x98/0x104 [ 15.090553][ T1] #1: ffff90001485b4b8 (irq_domain_mutex){+.+.}-{4:4}, at: irq_domain_associate+0xbc/0x6d4 [ 15.090606][ T1] #2: 4bff000185d7a8e0 (lock_class){....}-{2:2}, at: _raw_spin_lock_irqsave+0x1c/0x28 [ 15.090654][ T1] stack backtrace: [ 15.090661][ T1] CPU: 4 PID: 1 Comm: swapper/0 Not tainted 5.10.59-rt52-00983-g186a6841c682-dirty #3 [ 15.090682][ T1] Hardware name: Horizon Robotics Journey 5 DVB (DT) [ 15.090692][ T1] Call trace: ...... [ 15.090811][ T1] _raw_spin_lock_irqsave+0x1c/0x28 [ 15.090828][ T1] dwapb_irq_ack+0xb4/0x300 [ 15.090846][ T1] __irq_do_set_handler+0x494/0xb2c [ 15.090864][ T1] __irq_set_handler+0x74/0x114 [ 15.090881][ T1] irq_set_chip_and_handler_name+0x44/0x58 [ 15.090900][ T1] gpiochip_irq_map+0x210/0x644 Signed-off-by: Schspa Shi <schspa@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Doug Berger <opendmb@gmail.com> Acked-by: Serge Semin <fancer.lancer@gmail.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-02-08gpio: sifive: use the correct register to read output valuesNiklas Cassel1-1/+1
Setting the output of a GPIO to 1 using gpiod_set_value(), followed by reading the same GPIO using gpiod_get_value(), will currently yield an incorrect result. This is because the SiFive GPIO device stores the output values in reg_set, not reg_dat. Supply the flag BGPIOF_READ_OUTPUT_REG_SET to bgpio_init() so that the generic driver reads the correct register. Fixes: 96868dce644d ("gpio/sifive: Add GPIO driver for SiFive SoCs") Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> [Bartosz: added the Fixes tag] Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2020-12-09Merge tag 'gpio-updates-for-v5.11' of ↵Linus Walleij1-4/+10
git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into devel gpio updates for v5.11-rc1 - several refactoring patches of the core gpiolib code - add support for NXP PCAL9554B/C to gpio-pca953x - allow probing mockup devices from device tree - refactoring and improvements to gpio-rcar - improvements to locking in gpio-tegra - code shrink in gpiolib devres - get the irq offset from device tree in gpio-sifive - major refactoring of gpio-exar - convert gpio-mvebu pwm access to regmap - create a new submenu for virtual GPIO drivers - fix clang fall-through warnings treewide - minor driver refactoring and tweaks sprinkled all over
2020-12-04gpio: sifive: Set affinity callback to parentLinus Walleij1-0/+11
This assigns the .irq_set_affinity to the parent callback. I assume the sifive GPIO can be used in systems with SMP. I used the pattern making the hirerarchy tolerant for missing parent as in Marc's earlier patches. Suggested-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Cc: Yash Shah <yash.shah@sifive.com> Cc: Wesley W. Terpstra <wesley@sifive.com> Link: https://lore.kernel.org/r/20201117213351.249668-1-linus.walleij@linaro.org
2020-11-18gpio: sifive: To get gpio irq offset from device tree dataGreentime Hu1-4/+10
We can get hwirq number of the gpio by its irq_data->hwirq so that we don't need to add more macros for different platforms. This patch is tested in SiFive Unleashed board and SiFive Unmatched board. Signed-off-by: Greentime Hu <greentime.hu@sifive.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2020-11-11gpio: sifive: Fix SiFive gpio probeDamien Le Moal1-1/+1
Fix the check on the number of IRQs to allow up to the maximum (32) instead of only the maximum minus one. Fixes: 96868dce644d ("gpio/sifive: Add GPIO driver for SiFive SoCs") Cc: stable@vger.kernel.org Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com> Link: https://lore.kernel.org/r/20201107081420.60325-10-damien.lemoal@wdc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-02-10gpio: sifive: fix static checker warningYash Shah1-3/+3
Typcasting "irq_state" leads to the below static checker warning: The fix is to declare "irq_state" as unsigned long instead of u32. drivers/gpio/gpio-sifive.c:97 sifive_gpio_irq_enable() warn: passing casted pointer '&chip->irq_state' to 'assign_bit()' 32 vs 64. Fixes: 96868dce644d ("gpio/sifive: Add GPIO driver for SiFive SoCs") Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Yash Shah <yash.shah@sifive.com> Link: https://lore.kernel.org/r/1580189061-14091-1-git-send-email-yash.shah@sifive.com Reviewed-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-01-20gpio/sifive: Add GPIO driver for SiFive SoCsYash Shah1-0/+252
Adds the GPIO driver for SiFive RISC-V SoCs. Signed-off-by: Wesley W. Terpstra <wesley@sifive.com> [Atish: Various fixes and code cleanup] Signed-off-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Yash Shah <yash.shah@sifive.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/1575976274-13487-6-git-send-email-yash.shah@sifive.com
generated by cgit v1.2.3 (git 2.39.0) at 2025-01-01 07:47:09 +0300