Age | Commit message (Expand) | Author | Files | Lines |
2021-07-13 | EDAC/amd64: Use DEVICE_ATTR helper macros | Dwaipayan Ray | 1 | -13/+8 |
2021-05-10 | x86/msr: Rename MSR_K8_SYSCFG to MSR_AMD64_SYSCFG | Brijesh Singh | 1 | -1/+1 |
2021-01-22 | EDAC/amd64: Issue probing messages only on properly detected hardware | Borislav Petkov | 1 | -7/+7 |
2020-12-28 | EDAC/amd64: Limit error injection functionality to supported hw | Borislav Petkov | 1 | -3/+5 |
2020-12-28 | EDAC/amd64: Merge error injection sysfs facilities | Borislav Petkov | 1 | -4/+231 |
2020-12-28 | EDAC/amd64: Merge sysfs debugging attributes setup code | Borislav Petkov | 1 | -6/+59 |
2020-12-28 | EDAC/amd64: Tone down messages about missing PCI IDs | Yazen Ghannam | 1 | -4/+4 |
2020-12-28 | EDAC/amd64: Do not load on family 0x15, model 0x13 | Borislav Petkov | 1 | -3/+7 |
2020-12-15 | Merge tag 'x86_cpu_for_v5.11' of git://git.kernel.org/pub/scm/linux/kernel/gi... | Linus Torvalds | 1 | -2/+2 |
2020-11-27 | EDAC/amd64: Fix PCI component registration | Borislav Petkov | 1 | -12/+14 |
2020-11-19 | x86/CPU/AMD: Remove amd_get_nb_id() | Yazen Ghannam | 1 | -2/+2 |
2020-10-26 | EDAC/amd64: Remove unneeded breaks | Tom Rix | 1 | -8/+0 |
2020-10-12 | Merge tag 'edac_updates_for_v5.10' of git://git.kernel.org/pub/scm/linux/kern... | Linus Torvalds | 1 | -0/+6 |
2020-10-09 | EDAC/amd64: Set proper family type for Family 19h Models 20h-2Fh | Yazen Ghannam | 1 | -0/+6 |
2020-08-24 | treewide: Use fallthrough pseudo-keyword | Gustavo A. R. Silva | 1 | -1/+1 |
2020-06-18 | EDAC/amd64: Read back the scrub rate PCI register on F15h | Borislav Petkov | 1 | -0/+2 |
2020-06-11 | Merge branch 'x86/entry' into ras/core | Thomas Gleixner | 1 | -1/+1 |
2020-05-29 | EDAC/amd64: Remove redundant assignment to variable ret in hw_info_get() | Colin Ian King | 1 | -1/+1 |
2020-05-22 | EDAC/amd64: Add AMD family 17h model 60h PCI IDs | Alexander Monakov | 1 | -0/+14 |
2020-04-14 | x86/mce/amd, edac: Remove report_gart_errors | Borislav Petkov | 1 | -8/+0 |
2020-03-24 | EDAC: Convert to new X86 CPU match macros | Thomas Gleixner | 1 | -7/+7 |
2020-01-27 | Merge branch 'ras-core-for-linus' of git://git.kernel.org/pub/scm/linux/kerne... | Linus Torvalds | 1 | -26/+36 |
2020-01-17 | EDAC/amd64: Do not warn when removing instances | Borislav Petkov | 1 | -3/+0 |
2020-01-16 | EDAC/amd64: Drop some family checks for newer systems | Yazen Ghannam | 1 | -26/+19 |
2020-01-16 | EDAC/amd64: Add family ops for Family 19h Models 00h-0Fh | Yazen Ghannam | 1 | -0/+17 |
2019-11-09 | EDAC/amd64: Get rid of the ECC disabled long message | Borislav Petkov | 1 | -16/+3 |
2019-11-06 | EDAC/amd64: Check for memory before fully initializing an instance | Yazen Ghannam | 1 | -3/+22 |
2019-11-06 | EDAC/amd64: Use cached data when checking for ECC | Yazen Ghannam | 1 | -12/+8 |
2019-11-06 | EDAC/amd64: Save max number of controllers to family type | Yazen Ghannam | 1 | -30/+14 |
2019-11-06 | EDAC/amd64: Gather hardware information early | Yazen Ghannam | 1 | -50/+51 |
2019-11-06 | EDAC/amd64: Make struct amd64_family_type global | Yazen Ghannam | 1 | -7/+5 |
2019-10-25 | EDAC/amd64: Set grain per DIMM | Yazen Ghannam | 1 | -0/+2 |
2019-09-07 | EDAC/amd64: Add PCI device IDs for family 17h, model 70h | Isaac Vaughn | 1 | -0/+13 |
2019-08-23 | EDAC/amd64: Support asymmetric dual-rank DIMMs | Yazen Ghannam | 1 | -3/+13 |
2019-08-23 | EDAC/amd64: Cache secondary Chip Select registers | Yazen Ghannam | 1 | -3/+20 |
2019-08-23 | EDAC/amd64: Decode syndrome before translating address | Yazen Ghannam | 1 | -7/+7 |
2019-08-23 | EDAC/amd64: Find Chip Select memory size using Address Mask | Yazen Ghannam | 1 | -44/+70 |
2019-08-23 | EDAC/amd64: Initialize DIMM info for systems with more than two channels | Yazen Ghannam | 1 | -14/+52 |
2019-08-23 | EDAC/amd64: Recognize DRAM device type ECC capability | Yazen Ghannam | 1 | -2/+12 |
2019-08-22 | EDAC/amd64: Support more than two controllers for chip selects handling | Yazen Ghannam | 1 | -55/+68 |
2019-05-21 | treewide: Add SPDX license identifier for more missed files | Thomas Gleixner | 1 | -0/+1 |
2019-04-25 | Revert "EDAC/amd64: Support more than two controllers for chip select handling" | Borislav Petkov | 1 | -59/+54 |
2019-03-27 | EDAC/amd64: Adjust printed chip select sizes when interleaved | Yazen Ghannam | 1 | -2/+29 |
2019-03-27 | EDAC/amd64: Support more than two controllers for chip select handling | Yazen Ghannam | 1 | -54/+59 |
2019-03-27 | EDAC/amd64: Recognize x16 symbol size | Yazen Ghannam | 1 | -11/+10 |
2019-03-27 | EDAC/amd64: Set maximum channel layer size depending on family | Yazen Ghannam | 1 | -1/+7 |
2019-03-27 | EDAC/amd64: Support more than two Unified Memory Controllers | Yazen Ghannam | 1 | -17/+30 |
2019-03-27 | EDAC/amd64: Use a macro for iterating over Unified Memory Controllers | Yazen Ghannam | 1 | -7/+10 |
2019-03-27 | EDAC/amd64: Add Family 17h Model 30h PCI IDs | Yazen Ghannam | 1 | -0/+13 |
2018-09-27 | EDAC, amd64: Add Hygon Dhyana support | Pu Wen | 1 | -1/+9 |