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path: root/drivers/dma/shdma.c
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2010-03-02dmaengine: shdma: extend .device_terminate_all() to record partial transferGuennadi Liakhovetski1-0/+16
This patch extends the .device_terminate_all() method of the shdma driver to return number of bytes transfered in the current descriptor. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-03-02dmaengine: shdma: add runtime PM support.Guennadi Liakhovetski1-0/+20
Provided platforms implement runtime PM, this disables the controller, when not in use. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-03-02dmaengine: shdma: separate DMA headers.Guennadi Liakhovetski1-30/+49
Separate SH DMA headers into ones, commonly used by both drivers, and ones, specific to each of them. This will make the future development of the dmaengine driver easier. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-03-02dmaengine: shdma: convert to platform device resourcesGuennadi Liakhovetski1-129/+189
The shdma dmaengine driver currently uses numerous macros to support various platforms, selected by ifdef's. Convert it to use platform device resources and lists of channel descriptors to specify register locations, interrupt numbers and other system-specific configuration variants. Unavoidably, we have to simultaneously convert all shdma users to provide those resources. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-03-02dmaengine: shdma: fix DMA error handling.Guennadi Liakhovetski1-36/+53
Present DMA error ISR in shdma.c is bogus, it locks the system hard in multiple ways. Fix it to abort all queued transactions on all channels on the affected controller and giving submitters a chance to get a DMA_ERROR status for aborted transactions. Afterwards further functionality is again possible without the need to re-load the driver. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-08sh: implement DMA_SLAVE capability in SH dmaengine driverGuennadi Liakhovetski1-48/+142
Tested to work with a SIU ASoC driver on sh7722 (migor). Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-08sh: fix Transfer Size calculation in both DMA driversGuennadi Liakhovetski1-1/+5
Both the original arch/sh/drivers/dma/dma-sh.c and the new SH dmaengine drivers do not take into account bits 3:2 of the Transfer Size field in the CHCR register, besides, bit-field defines set bit 2, but the mask only passes bits 1:0 through. TS_16BLK and TS_32BLK macros are bogus too. This patch fixes all these issues for sh7722 and sh7724, other CPUs stay unchanged and might need to be fixed too. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-08sh: prepare the DMA driver for slave functionalityGuennadi Liakhovetski1-68/+153
Slave DMA functionality uses scatter-gather arrays for data transfers, whereas memcpy just uses a single data buffer. This patch converts the current memcpy implementation in shdma.c to use scatter-gather, making it just a special case with one SG-element. This allows us to isolate descriptor list manipulations and locking into one function, thus reducing error chances. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-12-23Merge branch 'ioat' into fixesDan Williams1-7/+5
2009-12-17sh: fix DMA driver's descriptor chaining and cookie assignmentGuennadi Liakhovetski1-117/+207
The SH DMA driver wrongly assigns negative cookies to transfer descriptors, also, its chaining of partial descriptors is broken. The latter problem is usually invisible, because maximum transfer size per chunk is 16M, but if you artificially set this limit lower, the driver fails. Since cookies are also used in chunk management, both these problems are fixed in one patch. As side effects a possible memory leak, when descriptors are prepared, but not submitted, and multiple races have also been fixed. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Paul Mundt <lethal@linux-sh.org> Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2009-12-11sh: stylistic improvements for the DMA driverGuennadi Liakhovetski1-17/+17
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2009-12-11sh: DMA driver has to specify its alignment requirementsGuennadi Liakhovetski1-0/+2
The SH DMA driver by default uses 32-byte transfers, in this mode buffers and sizes have to be 32-byte aligned. Specifying this requirement also fixes Oopses with dmatest. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2009-11-22shdma: fix initialization error handlingDan Williams1-7/+5
1/ Error handling code following a kzalloc should free the allocated data. 2/ Report an error when no platform data is detected Both problems fixed by moving the platform data check before the allocation, and allows a goto to be killed. Reported-by: Julia Lawall <julia@diku.dk> Acked-by: Julia Lawall <julia@diku.dk> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2009-09-09dmaengine: sh: Add Support SuperH DMA Engine driverNobuhiro Iwamatsu1-0/+786
This supported all DMA channels, and it was tested in SH7722, SH7780, SH7785 and SH7763. This can not use with SH DMA API. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Reviewed-by: Matt Fleming <matt@console-pimps.org> Acked-by: Maciej Sosnowski <maciej.sosnowski@intel.com> Acked-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Dan Williams <dan.j.williams@intel.com>