Age | Commit message (Collapse) | Author | Files | Lines | |
---|---|---|---|---|---|
2019-04-26 | dmaengine: mediatek-cqdma: fix wrong register usage in mtk_cqdma_start | Shun-Chih Yu | 1 | -1/+1 | |
This patch fixes wrong register usage in the mtk_cqdma_start. The destination register should be MTK_CQDMA_DST2 instead. Fixes: b1f01e48df5a ("dmaengine: mediatek: Add MediaTek Command-Queue DMA controller for MT6765 SoC") Signed-off-by: Shun-Chih Yu <shun-chih.yu@mediatek.com> Cc: stable@vger.kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org> | |||||
2018-11-11 | dmaengine: mediatek: Add MediaTek Command-Queue DMA controller for MT6765 SoC | Shun-Chih Yu | 1 | -0/+951 | |
MediaTek Command-Queue DMA controller (CQDMA) on MT6765 SoC is dedicated to memory-to-memory transfer through queue based descriptor management. There are only 3 physical channels inside CQDMA, while the driver is extended to support 32 virtual channels for multiple dma users to issue dma requests onto the CQDMA simultaneously. Signed-off-by: Shun-Chih Yu <shun-chih.yu@mediatek.com> Signed-off-by: Vinod Koul <vkoul@kernel.org> |