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2020-09-11dmaengine: bcm2835: Drop local dma_parmsRobin Murphy1-3/+0
Since commit 9495b7e92f71 ("driver core: platform: Initialize dma_parms for platform devices"), struct platform_device already provides a dma_parms structure, so we can save allocating another one. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/116927330a4a66aac579ad38ddbc3b538cd9524c.1599164692.git.robin.murphy@arm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-12-26dmaengine: bcm2835: do not call vchan_vdesc_fini() with lock heldSascha Hauer1-4/+1
vchan_vdesc_fini() can't be called locked. Instead, call vchan_terminate_vdesc() which delays the freeing of the descriptor to vchan_synchronize(). Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.kernel.org/r/20191216105328.15198-2-s.hauer@pengutronix.de Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-09-18Merge tag 'dmaengine-5.4-rc1' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds1-1/+3
Pull dmaengine updates from Vinod Koul: - Move Dmaengine DT bindings to YAML and convert Allwinner to schema. - FSL dma device_synchronize implementation - DW split acpi and of helpers and updates to driver and support for Elkhart Lake - Move filter fn as private for omap-dma and edma drivers and improvements to these drivers - Mark expected switch fall-through in couple of drivers - Renames of shdma and nbpfaxi binding document - Minor updates to bunch of drivers * tag 'dmaengine-5.4-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (55 commits) dmaengine: ti: edma: Use bitmap_set() instead of open coded edma_set_bits() dmaengine: ti: edma: Only reset region0 access registers dmaengine: ti: edma: Do not reset reserved paRAM slots dmaengine: iop-adma.c: fix printk format warning dmaengine: stm32-dma: Use struct_size() helper dt-bindings: dmaengine: dma-common: Fix the dma-channel-mask property dmanegine: ioat/dca: Use struct_size() helper dmaengine: iop-adma: remove set but not used variable 'slots_per_op' dmaengine: dmatest: Add support for completion polling dmaengine: ti: omap-dma: Remove variable override in omap_dma_tx_status() dmaengine: ti: omap-dma: Remove 'Assignment in if condition' dmaengine: ti: edma: Remove 'Assignment in if condition' dmaengine: dw: platform: Split OF helpers to separate module dmaengine: dw: platform: Split ACPI helpers to separate module dmaengine: dw: platform: Move handle check to dw_dma_acpi_controller_register() dmaengine: dw: platform: Switch to acpi_dma_controller_register() dmaengine: dw: platform: Use devm_platform_ioremap_resource() dmaengine: dw: platform: Enable iDMA 32-bit on Intel Elkhart Lake dmaengine: dw: platform: Use struct dw_dma_chip_pdata dmaengine: dw: Export struct dw_dma_chip_pdata for wider use ...
2019-09-11dmaengine: bcm2835: Avoid accessing memory when copying zeroesLukas Wunner1-0/+19
The BCM2835 DMA controller is capable of synthesizing zeroes instead of copying them from a source address. The feature is enabled by setting the SRC_IGNORE bit in the Transfer Information field of a Control Block: "Do not perform source reads. In addition, destination writes will zero all the write strobes. This is used for fast cache fill operations." https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf The feature is only available on 8 of the 16 channels. The others are so-called "lite" channels with a limited feature set and performance. Enable the feature if a cyclic transaction copies from the zero page. This reduces traffic on the memory bus. A forthcoming use case is the BCM2835 SPI driver, which will cyclically copy from the zero page to the TX FIFO. The idea to use SRC_IGNORE was taken from an ancient GitHub conversation between Martin and Noralf: https://github.com/msperl/spi-bcm2835/issues/13#issuecomment-98180451 Tested-by: Nuno Sá <nuno.sa@analog.com> Tested-by: Noralf Trønnes <noralf@tronnes.org> Signed-off-by: Lukas Wunner <lukas@wunner.de> Acked-by: Vinod Koul <vkoul@kernel.org> Acked-by: Stefan Wahren <wahrenst@gmx.net> Acked-by: Martin Sperl <kernel@martin.sperl.org> Cc: Florian Kauer <florian.kauer@koalo.de> Link: https://lore.kernel.org/r/b2286c904408745192e4beb3de3c88f73e4a7210.1568187525.git.lukas@wunner.de Signed-off-by: Mark Brown <broonie@kernel.org>
2019-09-11dmaengine: bcm2835: Document struct bcm2835_dmadevLukas Wunner1-0/+6
Document the BCM2835 DMA driver's device data structure so that upcoming commits may add further members with proper kerneldoc. Tested-by: Nuno Sá <nuno.sa@analog.com> Tested-by: Noralf Trønnes <noralf@tronnes.org> Signed-off-by: Lukas Wunner <lukas@wunner.de> Acked-by: Vinod Koul <vkoul@kernel.org> Acked-by: Stefan Wahren <wahrenst@gmx.net> Acked-by: Martin Sperl <kernel@martin.sperl.org> Cc: Florian Kauer <florian.kauer@koalo.de> Link: https://lore.kernel.org/r/78648f80f67d97bb7beecc1b9be6b6e4a45bc1d8.1568187525.git.lukas@wunner.de Signed-off-by: Mark Brown <broonie@kernel.org>
2019-09-11dmaengine: bcm2835: Allow reusable descriptorsLukas Wunner1-0/+1
The DMA engine API requires DMA drivers to explicitly allow that descriptors are prepared once and reused multiple times. Only a single driver makes use of this functionality so far (pxa_dma.c, to speed up pxa_camera.c). We're about to add another use case for reusable descriptors in the BCM2835 SPI driver, so allow that in the BCM2835 DMA driver. Tested-by: Nuno Sá <nuno.sa@analog.com> Tested-by: Noralf Trønnes <noralf@tronnes.org> Signed-off-by: Lukas Wunner <lukas@wunner.de> Acked-by: Vinod Koul <vkoul@kernel.org> Acked-by: Stefan Wahren <wahrenst@gmx.net> Acked-by: Martin Sperl <kernel@martin.sperl.org> Cc: Florian Kauer <florian.kauer@koalo.de> Cc: Robert Jarzmik <robert.jarzmik@free.fr> Link: https://lore.kernel.org/r/bfc98a38225bbec4158440ad06cb9eee675e3e6f.1568187525.git.lukas@wunner.de Signed-off-by: Mark Brown <broonie@kernel.org>
2019-09-11dmaengine: bcm2835: Allow cyclic transactions without interruptLukas Wunner1-2/+10
The BCM2835 DMA driver currently requests an interrupt from the controller regardless whether or not the client has passed in the DMA_PREP_INTERRUPT flag. This causes unnecessary overhead for cyclic transactions which do not need an interrupt after each period. We're about to add such a use case, namely cyclic clearing of the SPI controller's RX FIFO, so amend the DMA driver to request an interrupt only if DMA_PREP_INTERRUPT was passed in. Ignore the period_len for such transactions and set it to the buffer length to make the driver's calculations work. Tested-by: Nuno Sá <nuno.sa@analog.com> Tested-by: Noralf Trønnes <noralf@tronnes.org> Signed-off-by: Lukas Wunner <lukas@wunner.de> Acked-by: Vinod Koul <vkoul@kernel.org> Acked-by: Stefan Wahren <wahrenst@gmx.net> Acked-by: Martin Sperl <kernel@martin.sperl.org> Cc: Florian Kauer <florian.kauer@koalo.de> Link: https://lore.kernel.org/r/73cf37be56eb4cbe6f696057c719f3a38cbaf26e.1568187525.git.lukas@wunner.de Signed-off-by: Mark Brown <broonie@kernel.org>
2019-07-22dmaengine: bcm2835: Print error in case setting DMA mask failsStefan Wahren1-1/+3
During enabling of the RPi 4, we found out that the driver doesn't provide a helpful error message in case setting DMA mask fails. So add one. Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Link: https://lore.kernel.org/r/1563297318-4900-1-git-send-email-wahrenst@gmx.net Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-05-09Merge tag 'dmaengine-5.2-rc1' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds1-1/+0
Pull dmaengine updates from Vinod Koul: - Updates to stm32 dma residue calculations - Interleave dma capability to axi-dmac and support for ZynqMP arch - Rework of channel assignment for rcar dma - Debugfs for pl330 driver - Support for Tegra186/Tegra194, refactoring for new chips and support for pause/resume - Updates to axi-dmac, bcm2835, fsl-edma, idma64, imx-sdma, rcar-dmac, stm32-dma etc - dev_get_drvdata() updates on few drivers * tag 'dmaengine-5.2-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (34 commits) dmaengine: tegra210-adma: restore channel status dmaengine: tegra210-dma: free dma controller in remove() dmaengine: tegra210-adma: add pause/resume support dmaengine: tegra210-adma: add support for Tegra186/Tegra194 Documentation: DT: Add compatibility binding for Tegra186 dmaengine: tegra210-adma: prepare for supporting newer Tegra chips dmaengine: at_xdmac: remove a stray bottom half unlock dmaengine: fsl-edma: Adjust indentation dmaengine: fsl-edma: Fix typo in Vybrid name dmaengine: stm32-dma: fix residue calculation in stm32-dma dmaengine: nbpfaxi: Use dev_get_drvdata() dmaengine: bcm-sba-raid: Use dev_get_drvdata() dmaengine: stm32-dma: Fix unsigned variable compared with zero dmaengine: stm32-dma: use platform_get_irq() dmaengine: rcar-dmac: Update copyright information dmaengine: imx-sdma: Only check ratio on parts that support 1:1 dmaengine: xgene-dma: fix spelling mistake "descripto" -> "descriptor" dmaengine: idma64: Move driver name to the header dmaengine: bcm2835: Drop duplicate capability setting. dmaengine: pl330: _stop: clear interrupt status ...
2019-04-26dmaengine: bcm2835: Drop duplicate capability setting.Michal Suchanek1-1/+0
Signed-off-by: Michal Suchanek <msuchanek@suse.de> Acked-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-04-23dmaengine: bcm2835: Avoid GFP_KERNEL in device_prep_slave_sgStefan Wahren1-1/+1
The commit af19b7ce76ba ("mmc: bcm2835: Avoid possible races on data requests") introduces a possible circular locking dependency, which is triggered by swapping to the sdhost interface. So instead of reintroduce the race condition again, we could also avoid this situation by using GFP_NOWAIT for the allocation of the DMA buffer descriptors. Reported-by: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Fixes: af19b7ce76ba ("mmc: bcm2835: Avoid possible races on data requests") Link: http://lists.infradead.org/pipermail/linux-rpi-kernel/2019-March/008615.html Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-03-12Merge branch 'topic/brcm' into for-linusVinod Koul1-61/+31
2019-02-04dmaengine: bcm2835: Drop outdated comment on supported transactionsLukas Wunner1-3/+0
Remove an outdated comment claiming the driver only supports cyclic transactions. The driver has been supporting other transaction types for more than two years. Signed-off-by: Lukas Wunner <lukas@wunner.de> Cc: Frank Pavlic <f.pavlic@kunbus.de> Cc: Martin Sperl <kernel@martin.sperl.org> Cc: Florian Meier <florian.meier@koalo.de> Tested-by: Stefan Wahren <stefan.wahren@i2se.com> Acked-by: Florian Kauer <florian.kauer@koalo.de> Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-02-04dmaengine: bcm2835: Drop gratuitous list deletionLukas Wunner1-10/+0
The BCM2835 DMA driver deletes a channel from a list upon termination without having added it to a list first. Moreover that operation is protected by a spinlock which isn't taken anywhere else. These appear to be remnants of an older version of the driver which accidentally got mainlined. Remove the dead code. Signed-off-by: Lukas Wunner <lukas@wunner.de> Cc: Frank Pavlic <f.pavlic@kunbus.de> Cc: Martin Sperl <kernel@martin.sperl.org> Cc: Florian Meier <florian.meier@koalo.de> Tested-by: Stefan Wahren <stefan.wahren@i2se.com> Acked-by: Florian Kauer <florian.kauer@koalo.de> Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-02-04dmaengine: bcm2835: Enforce control block alignmentLukas Wunner1-1/+5
Per section 4.2.1.1 of the BCM2835 ARM Peripherals spec, control blocks "must start at a 256 bit aligned address": https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf This rule is currently satisfied only by accident because struct bcm2835_dma_cb has a size of 256 bit and the DMA pool API happens to allocate blocks consecutively. It seems safer to be explicit and tell the DMA pool allocator about the required alignment. Signed-off-by: Lukas Wunner <lukas@wunner.de> Cc: Frank Pavlic <f.pavlic@kunbus.de> Cc: Martin Sperl <kernel@martin.sperl.org> Cc: Florian Meier <florian.meier@koalo.de> Tested-by: Stefan Wahren <stefan.wahren@i2se.com> Acked-by: Florian Kauer <florian.kauer@koalo.de> Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-02-04dmaengine: bcm2835: Return void from abort of transactionsLukas Wunner1-3/+2
bcm2835_dma_abort() returns an int but bcm2835_dma_terminate_all() (its sole caller) does not evaluate the return value. Change the return type to void. Signed-off-by: Lukas Wunner <lukas@wunner.de> Cc: Frank Pavlic <f.pavlic@kunbus.de> Cc: Martin Sperl <kernel@martin.sperl.org> Cc: Florian Meier <florian.meier@koalo.de> Tested-by: Stefan Wahren <stefan.wahren@i2se.com> Acked-by: Florian Kauer <florian.kauer@koalo.de> Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-02-04dmaengine: bcm2835: Fix abort of transactionsLukas Wunner1-32/+9
There are multiple issues with bcm2835_dma_abort() (which is called on termination of a transaction): * The algorithm to abort the transaction first pauses the channel by clearing the ACTIVE flag in the CS register, then waits for the PAUSED flag to clear. Page 49 of the spec documents the latter as follows: "Indicates if the DMA is currently paused and not transferring data. This will occur if the active bit has been cleared [...]" https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf So the function is entering an infinite loop because it is waiting for PAUSED to clear which is always set due to the function having cleared the ACTIVE flag. The only thing that's saving it from itself is the upper bound of 10000 loop iterations. The code comment says that the intention is to "wait for any current AXI transfer to complete", so the author probably wanted to check the WAITING_FOR_OUTSTANDING_WRITES flag instead. Amend the function accordingly. * The CS register is only read at the beginning of the function. It needs to be read again after pausing the channel and before checking for outstanding writes, otherwise writes which were issued between the register read at the beginning of the function and pausing the channel may not be waited for. * The function seeks to abort the transfer by writing 0 to the NEXTCONBK register and setting the ABORT and ACTIVE flags. Thereby, the 0 in NEXTCONBK is sought to be loaded into the CONBLK_AD register. However experimentation has shown this approach to not work: The CONBLK_AD register remains the same as before and the CS register contains 0x00000030 (PAUSED | DREQ_STOPS_DMA). In other words, the control block is not aborted but merely paused and it will be resumed once the next DMA transaction is started. That is absolutely not the desired behavior. A simpler approach is to set the channel's RESET flag instead. This reliably zeroes the NEXTCONBK as well as the CS register. It requires less code and only a single MMIO write. This is also what popular user space DMA drivers do, e.g.: https://github.com/metachris/RPIO/blob/master/source/c_pwm/pwm.c Note that the spec is contradictory whether the NEXTCONBK register is writeable at all. On the one hand, page 41 claims: "The value loaded into the NEXTCONBK register can be overwritten so that the linked list of Control Block data structures can be dynamically altered. However it is only safe to do this when the DMA is paused." On the other hand, page 40 specifies: "Only three registers in each channel's register set are directly writeable (CS, CONBLK_AD and DEBUG). The other registers (TI, SOURCE_AD, DEST_AD, TXFR_LEN, STRIDE & NEXTCONBK), are automatically loaded from a Control Block data structure held in external memory." Fixes: 96286b576690 ("dmaengine: Add support for BCM2835") Signed-off-by: Lukas Wunner <lukas@wunner.de> Cc: stable@vger.kernel.org # v3.14+ Cc: Frank Pavlic <f.pavlic@kunbus.de> Cc: Martin Sperl <kernel@martin.sperl.org> Cc: Florian Meier <florian.meier@koalo.de> Cc: Clive Messer <clive.m.messer@gmail.com> Cc: Matthias Reichl <hias@horus.com> Tested-by: Stefan Wahren <stefan.wahren@i2se.com> Acked-by: Florian Kauer <florian.kauer@koalo.de> Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-02-04dmaengine: bcm2835: Fix interrupt race on RTLukas Wunner1-15/+18
If IRQ handlers are threaded (either because CONFIG_PREEMPT_RT_BASE is enabled or "threadirqs" was passed on the command line) and if system load is sufficiently high that wakeup latency of IRQ threads degrades, SPI DMA transactions on the BCM2835 occasionally break like this: ks8851 spi0.0: SPI transfer timed out bcm2835-dma 3f007000.dma: DMA transfer could not be terminated ks8851 spi0.0 eth2: ks8851_rdfifo: spi_sync() failed The root cause is an assumption made by the DMA driver which is documented in a code comment in bcm2835_dma_terminate_all(): /* * Stop DMA activity: we assume the callback will not be called * after bcm_dma_abort() returns (even if it does, it will see * c->desc is NULL and exit.) */ That assumption falls apart if the IRQ handler bcm2835_dma_callback() is threaded: A client may terminate a descriptor and issue a new one before the IRQ handler had a chance to run. In fact the IRQ handler may miss an *arbitrary* number of descriptors. The result is the following race condition: 1. A descriptor finishes, its interrupt is deferred to the IRQ thread. 2. A client calls dma_terminate_async() which sets channel->desc = NULL. 3. The client issues a new descriptor. Because channel->desc is NULL, bcm2835_dma_issue_pending() immediately starts the descriptor. 4. Finally the IRQ thread runs and writes BCM2835_DMA_INT to the CS register to acknowledge the interrupt. This clears the ACTIVE flag, so the newly issued descriptor is paused in the middle of the transaction. Because channel->desc is not NULL, the IRQ thread finalizes the descriptor and tries to start the next one. I see two possible solutions: The first is to call synchronize_irq() in bcm2835_dma_issue_pending() to wait until the IRQ thread has finished before issuing a new descriptor. The downside of this approach is unnecessary latency if clients desire rapidly terminating and re-issuing descriptors and don't have any use for an IRQ callback. (The SPI TX DMA channel is a case in point.) A better alternative is to make the IRQ thread recognize that it has missed descriptors and avoid finalizing the newly issued descriptor. So first of all, set the ACTIVE flag when acknowledging the interrupt. This keeps a newly issued descriptor running. If the descriptor was finished, the channel remains idle despite the ACTIVE flag being set. However the ACTIVE flag can then no longer be used to check whether the channel is idle, so instead check whether the register containing the current control block address is zero and finalize the current descriptor only if so. That way, there is no impact on latency and throughput if the client doesn't care for the interrupt: Only minimal additional overhead is introduced for non-cyclic descriptors as one further MMIO read is necessary per interrupt to check for idleness of the channel. Cyclic descriptors are sped up slightly by removing one MMIO write per interrupt. Fixes: 96286b576690 ("dmaengine: Add support for BCM2835") Signed-off-by: Lukas Wunner <lukas@wunner.de> Cc: stable@vger.kernel.org # v3.14+ Cc: Frank Pavlic <f.pavlic@kunbus.de> Cc: Martin Sperl <kernel@martin.sperl.org> Cc: Florian Meier <florian.meier@koalo.de> Cc: Clive Messer <clive.m.messer@gmail.com> Cc: Matthias Reichl <hias@horus.com> Tested-by: Stefan Wahren <stefan.wahren@i2se.com> Acked-by: Florian Kauer <florian.kauer@koalo.de> Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-01-07dmaengine: bcm2835: Use struct_size() in kzalloc()Gustavo A. R. Silva1-2/+1
One of the more common cases of allocation size calculations is finding the size of a structure that has a zero-sized array at the end, along with memory for some number of elements for that array. For example: struct foo { int stuff; void *entry[]; }; instance = kzalloc(sizeof(struct foo) + sizeof(void *) * count, GFP_KERNEL); Instead of leaving these open-coded and prone to type mistakes, we can now use the new struct_size() helper: instance = kzalloc(struct_size(instance, entry, count), GFP_KERNEL); This code was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
2018-11-11dmaengine: bcm2835: Switch to SPDX identifierStefan Wahren1-10/+1
Adopt the SPDX license identifier headers to ease license compliance management. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Vinod Koul <vkoul@kernel.org>
2018-11-11dmaengine: bcm2835: make license text and module license matchStefan Wahren1-1/+1
The license text is specifying GPL v2 or later but the MODULE_LICENSE is set to GPL v2 which means GNU Public License v2 only. So choose the license text as the correct one. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Acked-by: Florian Kauer <florian.kauer@koalo.de> Acked-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Vinod Koul <vkoul@kernel.org>
2018-10-07dmaengine: bcm2835: remove dma_slave_config direction usageVinod Koul1-8/+0
dma_slave_config direction was marked as deprecated quite some time back, remove the usage from this driver so that the field can be removed Acked-by: Scott Branden <scott.branden@broadcom.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
2017-12-04dmaengine: bcm2835-dma: Use vchan_terminate_vdesc() instead of desc_freePeter Ujfalusi1-1/+9
To avoid race with vchan_complete, use the race free way to terminate running transfer. Implement the device_synchronize callback to make sure that the terminated descriptor is freed. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Eric Anholt <eric@anholt.net> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-03-06dmaengine: bcm2835: Fix cyclic DMA period splittingMatthias Reichl1-1/+4
The code responsible for splitting periods into chunks that can be handled by the DMA controller missed to update total_len, the number of bytes processed in the current period, when there are more chunks to follow. Therefore total_len was stuck at 0 and the code didn't work at all. This resulted in a wrong control block layout and audio issues because the cyclic DMA callback wasn't executing on period boundaries. Fix this by adding the missing total_len update. Signed-off-by: Matthias Reichl <hias@horus.com> Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Tested-by: Clive Messer <clive.messer@digitaldreamtime.co.uk> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-07-01dmaengine: bcm2835: fix 64-bit warningArnd Bergmann1-2/+3
When building this driver on arm64, we get a harmless type mismatch warning: drivers/dma/bcm2835-dma.c: In function 'bcm2835_dma_fill_cb_chain_with_sg': include/linux/kernel.h:743:17: warning: comparison of distinct pointer types lacks a cast (void) (&_min1 == &_min2); \ ^ drivers/dma/bcm2835-dma.c:409:21: note: in expansion of macro 'min' cb->cb->length = min(len, max_len); This changes the type of the 'len' variable to size_t, which avoids the problem. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Fixes: 388cc7a281c0 ("dmaengine: bcm2835: add slave_sg support to bcm2835-dma") Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-06-08dmaengine: bcm2835: fix unexported functionBen Dooks1-1/+1
The bcm2835_dma_prep_dma_memcpy() function is not exported outside the driver, so make it static to avoid the following warning: drivers/dma/bcm2835-dma.c:616:32: warning: symbol 'bcm2835_dma_prep_dma_memcpy' was not declared. Should it be static? Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-05-02dmaengine: bcm2835: fix typo/added newline in legacy-mode warning messageMartin Sperl1-1/+1
Fix typo in warning message that there is no "interrupt-names" property defined in the device-tree and legacy-mode is used. Also added newline to end of message. Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Reported-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-04-19dmaengine: bcm2835: use platform_get_irq_bynameMartin Sperl1-14/+63
Use platform_get_irq_byname to allow for correct mapping of interrupts to dma channels. The currently implemented device tree is unfortunately implemented with the wrong assumption, that each dma-channel has its own dma channel, but dma-irq 11 is handling dma-channel 11-14 and dma-irq 12 is actually a "catch all" interrupt. So here we use the byname variant and require that interrupts are explicitly named via the interrupts-name property in the device tree. The use of shared interrupts is also implemented. As a side-effect this means we can now use dma channels 12, 13 and 14 in a correct manner - also testing shows that onl using channels 11 to 14 for spi and i2s works perfectly (when playing some video) Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Acked-by: Eric Anholt <eric@anholt.net> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-04-15dmaengine: bcm2835: add dma_memcopy support to bcm2835-dmaMartin Sperl1-1/+35
Also added check for an error condition in bcm2835_dma_create_cb_chain that showed up during development of this patch. Tested using dmatest for all enabled channels. Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-04-15dmaengine: bcm2835: add slave_sg support to bcm2835-dmaMartin Sperl1-5/+108
Add slave_sg support to bcm2835-dma using shared allocation code for bcm2835_desc and DMA-control blocks already used by dma_cyclic. Note that bcm2835_dma_callback had to get modified to support both modes of operation (cyclic and non-cyclic). Tested using: * Hifiberry I2S card (using cyclic DMA) * fb_st7735r SPI-framebuffer (using slave_sg DMA via spi-bcm2835) playing BigBuckBunny for audio and video. Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-04-15dmaengine: bcm2835: limit max length based on channel typeMartin Sperl1-3/+26
The bcm2835 dma system has 2 basic types of dma-channels: * "normal" channels * "light" channels Lite channels are limited in several aspects: * internal data-structure is 128 bit (not 256) * does not support BCM2835_DMA_TDMODE (2D) * DMA length register is limited to 16 bit. so 0-65535 (not 0-65536 as mentioned in the official datasheet) * BCM2835_DMA_S/D_IGNORE are not supported The detection of the type of mode is implemented by looking at the LITE bit in the DEBUG register for each channel. This allows automatic detection. Based on this the maximum block size is set to (64K - 4) or to 1G and this limit is honored during generation of control block chains. The effect is that when a LITE channel is used more control blocks are used to do the same transfer (compared to a normal channel). As there are several sources/target DREQS that are 32 bit wide we need to have the transfer to be a multiple of 4 as this would break the transfer otherwise. This is why the limit of (64K - 4) was chosen over the alternative of (64K - 4K). Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-04-15dmaengine: bcm2835: move controlblock chain generation into separate methodMartin Sperl1-96/+198
In preparation of adding slave_sg functionality this patch moves the generation/allocation of bcm2835_desc and the building of the corresponding DMA-control-block chain from bcm2835_dma_prep_dma_cyclic into the newly created method bcm2835_dma_create_cb_chain. Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-04-15dmaengine: bcm2835: move cyclic member from bcm2835_chan into bcm2835_descMartin Sperl1-3/+3
In preparation to consolidating code we move the cyclic member into the bcm_2835_desc structure. Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-04-15dmaengine: bcm2835: add additional defines for DMA-registersMartin Sperl1-8/+49
Add additional defines describing the DMA registers as well as adding some more documentation to those registers. Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-04-15dmaengine: bcm2835: remove unnecessary masking of dma channelsMartin Sperl1-9/+0
The original patch contained 3 dma channels that were masked out. These - as far as research and discussions show - are a artefacts remaining from the downstream legacy dma-api. Right now down-stream still includes a legacy api used only in a single (downstream only) driver (bcm2708_fb) that requires 2D DMA for speedup (DMA-channel 0). Formerly the sd-card support driver also was using this legacy api (DMA-channel 2), but since has been moved over to use dmaengine directly. The DMA-channel 3 is already masked out in the devicetree in the default property "brcm,dma-channel-mask = <0x7f35>;" So we can remove the whole masking of DMA channels. Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-04-15dmaengine: bcm2835: set residue_granularity fieldMartin Sperl1-0/+1
bcm2835-dma supports residue reporting at burst level but didn't report this via the residue_granularity field. See also: https://github.com/raspberrypi/linux/commit/b015555327afa402f70ddc86e3632f59df1cd9d7 for the downstream patch. Signed-off-by: Matthias Reichl <hias@horus.com> Signed-off-by: Noralf Trønnes <noralf@tronnes.org> Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-12-05dmaengine: bcm2835-dma: Convert to use DMA poolPeter Ujfalusi1-24/+54
f93178291712 dmaengine: bcm2835-dma: Fix memory leak when stopping a running transfer Fixed the memleak, but introduced another issue: the terminate_all callback might be called with interrupts disabled and the dma_free_coherent() is not allowed to be called when IRQs are disabled. Convert the driver to use dma_pool_* for managing the list of control blocks for the transfer. Fixes: f93178291712 ("dmaengine: bcm2835-dma: Fix memory leak when stopping a running transfer") Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Tested-by: Matthias Reichl <hias@horus.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-03-30dmaengine: bcm2835-dma: Fix memory leak when stopping a running transferPeter Ujfalusi1-0/+1
The vd->node is removed from the lists when the transfer started so the vchan_get_all_descriptors() will not find it. This results memory leak. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-12-22dmaengine: bcm2835: Declare slave capabilities for the generic codeMaxime Ripard1-12/+3
Now that the generic slave caps code can make use of the device assigned capabilities, instead of relying on a callback to be implemented. Make use of this code. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-12-22dmaengine: bcm2835: Split device_controlMaxime Ripard1-23/+8
Split the device_control callback of the Broadcom BCM2835 DMA driver to make use of the newly introduced callbacks, that will eventually be used to retrieve slave capabilities. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-12-22dmaengine: Make the destination abbreviation coherentMaxime Ripard1-1/+1
The dmaengine header abbreviates destination as at least two different strings. Make a coherent use of a single one. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-11-06dmaengine: Remove .owner field for driverKiran Padwal1-1/+0
There is no need to init .owner field. Based on the patch from Peter Griffin <peter.griffin@linaro.org> "mmc: remove .owner field for drivers using module_platform_driver" This patch removes the superflous .owner field for drivers which use the module_platform_driver API, as this is overriden in platform_driver_register anyway." Signed-off-by: Kiran Padwal <kiran.padwal@smartplayin.com> [for nvidia] Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-11-06dmaengine: bcm2835: Remove chancnt affectationsMaxime Ripard1-2/+0
chanctnt is already filled by dma_async_device_register, which uses the channel list to know how much channels there is. Since it's already filled, we can safely remove it from the drivers' probe function. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-08-04dmaengine: Remove the context argument to the prep_dma_cyclic operationLaurent Pinchart1-1/+1
The argument is always set to NULL and never used. Remove it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-01-20dmaengine: Add DMA_PRIVATE to BCM2835 driverFlorian Meier1-0/+1
Without DMA_PRIVATE the driver is not able to allocate more than one channel. Since it uses dma_get_any_slave_channel that calls private_candidate, the second allocation fails at /* some channels are already publicly allocated */ Maybe it should be fixed in the core, but at least this fixes the bug. Signed-off-by: Florian Meier <florian.meier@koalo.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-01-07dmaengine: Add support for BCM2835Florian Meier1-0/+706
Add support for DMA controller of BCM2835 as used in the Raspberry Pi. Currently it only supports cyclic DMA. Signed-off-by: Florian Meier <florian.meier@koalo.de> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
generated by cgit v1.2.3 (git 2.39.0) at 2024-12-13 22:38:18 +0300