kernel/linux.git - Linux kernel stable tree (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2023-02-11	cxl/memdev: Fix endpoint port removal	Dan Williams	3	-26/+35
2023-02-09	cxl/mem: Correct full ID range allocation	Davidlohr Bueso	1	-1/+1
2023-02-07	Merge branch 'for-6.3/cxl-events' into cxl/next	Dan Williams	6	-1/+1141
2023-02-07	Merge branch 'for-6.3/cxl' into cxl/next	Dan Williams	12	-126/+313
2023-02-07	cxl/region: Fix passthrough-decoder detection	Dan Williams	1	-2/+2
2023-02-07	cxl/region: Fix null pointer dereference for resetting decoder	Fan Ni	1	-3/+5
2023-01-31	cxl/pci: Fix irq oneshot expectations	Dan Williams	1	-1/+2
2023-01-30	cxl/pci: Set the device timestamp	Jonathan Cameron	3	-0/+40
2023-01-30	cxl/mbox: Add missing parameter to docs.	Jonathan Cameron	1	-0/+1
2023-01-28	cxl/mbox: Fix Payload Length check for Get Log command	Robert Richter	1	-3/+22
2023-01-27	driver core: make struct bus_type.uevent() take a const *	Greg Kroah-Hartman	4	-8/+8
2023-01-27	driver core: make struct device_type.devnode() take a const *	Greg Kroah-Hartman	1	-1/+1
2023-01-27	cxl/mem: Trace Memory Module Event Record	Ira Weiny	3	-0/+182
2023-01-27	cxl/mem: Trace DRAM Event Record	Ira Weiny	3	-0/+127
2023-01-27	cxl/mem: Trace General Media Event Record	Ira Weiny	3	-2/+170
2023-01-27	cxl/mem: Wire up event interrupts	Davidlohr Bueso	4	-10/+240
2023-01-27	cxl: fix spelling mistakes	Randy Dunlap	4	-4/+4
2023-01-27	cxl/mbox: Add debug messages for enabled mailbox commands	Robert Richter	1	-1/+2
2023-01-27	cxl/mem: Read, trace, and clear events on driver load	Ira Weiny	5	-1/+392
2023-01-26	cxl/pmem: Fix nvdimm unregistration when cxl_pmem driver is absent	Dan Williams	3	-39/+28
2023-01-26	cxl/port: Link the 'parent_dport' in portX/ and endpointX/ sysfs	Dan Williams	1	-0/+29
2023-01-26	cxl/region: Clarify when a cxld->commit() callback is mandatory	Dan Williams	1	-2/+17
2023-01-25	cxl/pci: Show opcode in debug messages when sending a command	Robert Richter	1	-1/+1
2023-01-09	cxl: fix cxl_report_and_clear() RAS UE addr mis-assignment	Dave Jiang	1	-2/+5
2023-01-06	cxl/region: Only warn about cpu_cache_invalidate_memregion() once	Davidlohr Bueso	1	-1/+1
2023-01-05	cxl/pci: Move tracepoint definitions to drivers/cxl/core/	Dan Williams	7	-111/+234
2022-12-09	cxl/region: Fix memdev reuse check	Fan Ni	1	-1/+1
2022-12-07	cxl/pci: Remove endian confusion	Dan Williams	1	-4/+3
2022-12-07	cxl/pci: Add some type-safety to the AER trace points	Dan Williams	1	-2/+2
2022-12-07	cxl/security: Drop security command ioctl uapi	Dan Williams	1	-17/+0
2022-12-07	cxl/mbox: Add variable output size validation for internal commands	Dan Williams	2	-9/+16
2022-12-07	cxl/mbox: Enable cxl_mbox_send_cmd() users to validate output size	Dan Williams	4	-62/+126
2022-12-07	cxl/security: Fix Get Security State output payload endian handling	Dan Williams	1	-1/+5
2022-12-06	cxl: update names for interleave ways conversion macros	Dave Jiang	4	-16/+16
2022-12-06	cxl: update names for interleave granularity conversion macros	Dave Jiang	4	-14/+15
2022-12-06	cxl/acpi: Warn about an invalid CHBCR in an existing CHBS entry	Robert Richter	1	-1/+2
2022-12-05	cxl/acpi: Fail decoder add if CXIMS for HBIG is missing	Alison Schofield	1	-0/+5
2022-12-05	cxl/region: Fix spelling mistake "memergion" -> "memregion"	Colin Ian King	1	-1/+1
2022-12-05	cxl/regs: Fix sparse warning	Dan Williams	1	-1/+1
2022-12-05	Merge branch 'for-6.2/cxl-xor' into for-6.2/cxl	Dan Williams	3	-8/+149
2022-12-05	Merge branch 'for-6.2/cxl-aer' into for-6.2/cxl	Dan Williams	9	-149/+324
2022-12-05	Merge branch 'for-6.2/cxl-security' into for-6.2/cxl	Dan Williams	9	-3/+332
2022-12-05	cxl/port: Add RCD endpoint port enumeration	Dan Williams	4	-8/+44
2022-12-05	cxl/mem: Move devm_cxl_add_endpoint() from cxl_core to cxl_mem	Dan Williams	5	-49/+47
2022-12-04	cxl/acpi: Support CXL XOR Interleave Math (CXIMS)	Alison Schofield	3	-8/+149
2022-12-04	cxl/pci: Add callback to log AER correctable error	Dave Jiang	1	-0/+20
2022-12-04	cxl/pci: Add (hopeful) error handling support	Dan Williams	4	-0/+141
2022-12-04	cxl/pci: add tracepoint events for CXL RAS	Dave Jiang	1	-0/+2
2022-12-04	cxl/pci: Find and map the RAS Capability Structure	Dan Williams	3	-0/+34
2022-12-04	cxl/pci: Prepare for mapping RAS Capability Structure	Dan Williams	3	-12/+31