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path: root/drivers/clocksource/time-lpc32xx.c
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2017-06-14clocksource/drivers: Rename CLOCKSOURCE_OF_DECLARE to TIMER_OF_DECLAREDaniel Lezcano1-1/+1
The CLOCKSOURCE_OF_DECLARE macro is used widely for the timers to declare the clocksource at early stage. However, this macro is also used to initialize the clockevent if any, or the clockevent only. It was originally suggested to declare another macro to initialize a clockevent, so in order to separate the two entities even they belong to the same IP. This was not accepted because of the impact on the DT where splitting a clocksource/clockevent definition does not make sense as it is a Linux concept not a hardware description. On the other side, the clocksource has not interrupt declared while the clockevent has, so it is easy from the driver to know if the description is for a clockevent or a clocksource, IOW it could be implemented at the driver level. So instead of dealing with a named clocksource macro, let's use a more generic one: TIMER_OF_DECLARE. The patch has not functional changes. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2016-06-28clocksources: Switch back to the clksrc tableDaniel Lezcano1-1/+1
All the clocksource drivers's init function are now converted to return an error code. CLOCKSOURCE_OF_DECLARE is no longer used as well as the clksrc-of table. Let's convert back the names: - CLOCKSOURCE_OF_DECLARE_RET => CLOCKSOURCE_OF_DECLARE - clksrc-of-ret => clksrc-of Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> For exynos_mct and samsung_pwm_timer: Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> For arch/arc: Acked-by: Vineet Gupta <vgupta@synopsys.com> For mediatek driver: Acked-by: Matthias Brugger <matthias.bgg@gmail.com> For the Rockchip-part Acked-by: Heiko Stuebner <heiko@sntech.de> For STi : Acked-by: Patrice Chotard <patrice.chotard@st.com> For the mps2-timer.c and versatile.c changes: Acked-by: Liviu Dudau <Liviu.Dudau@arm.com> For the OXNAS part : Acked-by: Neil Armstrong <narmstrong@baylibre.com> For LPC32xx driver: Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com> For Broadcom Kona timer change: Acked-by: Ray Jui <ray.jui@broadcom.com> For Sun4i and Sun5i: Acked-by: Chen-Yu Tsai <wens@csie.org> For Meson6: Acked-by: Carlo Caione <carlo@caione.org> For Keystone: Acked-by: Santosh Shilimkar <ssantosh@kernel.org> For NPS: Acked-by: Noam Camus <noamca@mellanox.com> For bcm2835: Acked-by: Eric Anholt <eric@anholt.net>
2016-06-28clocksource/drivers/time-lpc32xx: Convert init function to return errorDaniel Lezcano1-5/+7
The init functions do not return any error. They behave as the following: - panic, thus leading to a kernel crash while another timer may work and make the system boot up correctly or - print an error and let the caller unaware if the state of the system Change that by converting the init functions to return an error conforming to the CLOCKSOURCE_OF_RET prototype. Proper error handling (rollback, errno value) will be changed later case by case, thus this change just return back an error or success in the init function. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
2016-02-25clocksource/drivers/lpc32xx: Support timer-based ARM delayEzequiel Garcia1-0/+12
This commit implements the ARM timer-based delay timer for the LPC32xx, LPC18xx, LPC43xx family of SoCs. Also, add a dependency to restrict compiling this driver for the ARM architecture. Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Joachim Eastwood <manabian@gmail.com> Tested-by: Joachim Eastwood <manabian@gmail.com>
2016-02-25clocksource/drivers/lpc32xx: Support periodic modeEzequiel Garcia1-5/+34
This commit adds the support for periodic mode. This is done by not setting the MR0S (Stop on TnMR0) bit on MCR, thus allowing interrupts to be periodically generated on MR0 matches. In order to do this, move the initial configuration that is specific to the one-shot mode to set_state_oneshot(). Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Joachim Eastwood <manabian@gmail.com> Tested-by: Joachim Eastwood <manabian@gmail.com>
2016-02-25clocksource/drivers/lpc32xx: Don't use the prescaler counter for clockeventsEzequiel Garcia1-9/+8
This commit switches the clockevents one-shot current implementation to avoid using the prescaler counter. The clockevents timer currently uses MR0=1, PR=ticks; and after this commit is uses MR0=ticks, PR=0. While using the prescaler with PR=1 works fine in one-shot mode, it seems it doesn't work as expected in periodic mode. By using the only match channel register (MR0) for the timer we make the periodic mode introduction easier, and consistent with one-shot mode. Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Joachim Eastwood <manabian@gmail.com> Tested-by: Joachim Eastwood <manabian@gmail.com>
2015-12-16clocksource/drivers/lpc32: Correct pr_err() output formatVladimir Zapolskiy1-2/+2
If by some reason timerclk is not available, both clockevent and clocksource initializations correctly exit, but output of errno to kernel log buffer may be confusing: lpc32xx_clk_init: failed to map system control block registers lpc32xx_clocksource_init: clock get failed (4294966779) lpc32xx_clockevent_init: clock get failed (4294966779) Use signed integer output in the correspondent pr_err() string formats: lpc32xx_clocksource_init: clock get failed (-517) lpc32xx_clockevent_init: clock get failed (-517) Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-06-02clocksource/drivers/lpc32xx: Add the lpc32xx timer driverJoachim Eastwood1-0/+272
Add support for using the NXP LPC timer as clocksource and clock event. These timers are present on many NXP devices including LPC32xx, LPC17xx, LPC18xx and LPC43xx. The timer has a 32-bit timer counter register with a programmable 32-bit prescaler. It supports up to 4 compare match values with interrupt generation and reset/stop timer counter action. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Acked-by: Arnd Bergmann <arnd@arndb.de>