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path: root/drivers/clk
AgeCommit message (Expand)AuthorFilesLines
2018-12-05clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for all audio module clocksChen-Yu Tsai1-3/+3
2018-12-05clk: sunxi-ng: a33: Use sigma-delta modulation for audio PLLChen-Yu Tsai1-13/+24
2018-12-05clk: meson: add clk-input helper functionJerome Brunet3-0/+50
2018-12-04clk: Add kerneldoc to managed of-provider interfacesMatti Vaittinen1-0/+15
2018-12-04clk: renesas: r8a77995: Simplify PLL3 multiplier/dividerGeert Uytterhoeven1-2/+2
2018-12-04clk: renesas: r8a77995: Add missing CPEX clockGeert Uytterhoeven1-1/+2
2018-12-04clk: renesas: r8a77995: Remove non-existent SSP clocksGeert Uytterhoeven1-1/+0
2018-12-04clk: renesas: r8a77995: Remove non-existent VIN5-7 module clocksGeert Uytterhoeven1-3/+0
2018-12-04clk: renesas: r8a77995: Correct parent clock of DUGeert Uytterhoeven1-2/+2
2018-12-04clk: renesas: r8a77990: Correct parent clock of DUTakeshi Kihara1-2/+2
2018-12-04clk: renesas: r8a77970: Add CPEX clockGeert Uytterhoeven1-0/+1
2018-12-04clk: renesas: r8a77965: Add CPEX clockGeert Uytterhoeven1-0/+1
2018-12-04clk: renesas: r8a7796: Add CPEX clockGeert Uytterhoeven1-0/+1
2018-12-04clk: renesas: r8a7795: Add CPEX clockGeert Uytterhoeven1-0/+1
2018-12-04clk: renesas: r8a774a1: Add CPEX clockGeert Uytterhoeven1-0/+1
2018-12-04clk: sunxi-ng: h3: Allow parent change for ve clockJernej Skrabec1-1/+1
2018-12-04clk: sunxi-ng: add support for suniv F1C100s SoCMesih Kilinc4-0/+581
2018-12-04clk: meson: Mark some things staticStephen Boyd2-6/+6
2018-12-03clk: imx: add imx7ulp clk driverA.s. Dong2-0/+221
2018-12-03clk: imx: implement new clk_hw based APIsA.s. Dong2-0/+84
2018-12-03clk: imx: make mux parent strings constA.s. Dong3-9/+13
2018-12-03clk: imx: add imx7ulp composite clk supportA.s. Dong3-0/+94
2018-12-03clk: imx: add pfdv2 supportA.s. Dong3-1/+208
2018-12-03clk: imx: add pllv4 supportA.s. Dong3-0/+188
2018-12-03clk: fractional-divider: add CLK_FRAC_DIVIDER_ZERO_BASED flag supportA.s. Dong1-0/+10
2018-12-03clk: imx: add gatable clock divider supportA.s. Dong3-0/+226
2018-12-03clk: imx: Add SCCG PLL typeLucas Stach3-1/+267
2018-12-03clk: imx: Add fractional PLL output clockLucas Stach3-0/+236
2018-12-03clk: imx: Add clock driver for i.MX8MQ CCMAbel Vesa3-0/+626
2018-12-03clk: imx: Add imx composite clockAbel Vesa3-0/+195
2018-12-03clk: qcom: Fix MSM8998 resetsJeffrey Hugo1-19/+19
2018-12-03clk: zynqmp: Off by one in zynqmp_is_valid_clock()Dan Carpenter1-1/+1
2018-12-03clk: mmp: Off by one in mmp_clk_add()Dan Carpenter1-1/+1
2018-12-03clk: mvebu: Off by one bugs in cp110_of_clk_get()Dan Carpenter1-2/+2
2018-12-03clk: qcom: Add lpass clock controller driver for SDM845Taniya Das4-0/+224
2018-12-03clk: sunxi-ng: h3/h5: Fix CSI_MCLK parentChen-Yu Tsai1-1/+1
2018-12-03clk: meson: meson8b: add the read-only video clock treesMartin Blumenstingl2-10/+782
2018-12-03clk: meson: meson8b: add the fractional divider for vid_pll_dcoMartin Blumenstingl2-0/+6
2018-12-03clk: meson: meson8b: fix the offset of vid_pll_dco's N valueMartin Blumenstingl1-1/+1
2018-11-30clk: qcom: msm8916: Additional clock rates for spiLoic Poulain1-0/+4
2018-11-30clk: mediatek: Drop more __init markings for driver probeStephen Boyd1-2/+2
2018-11-30clk: mediatek: Drop __init from mtk_clk_register_cpumuxes()Stephen Boyd1-4/+4
2018-11-30clk: stm32mp1: drop pointless static qualifier in stm32_register_hw_clk()YueHaibing1-1/+1
2018-11-30clk: mediatek: add clock support for MT7629 SoCRyder Lee5-0/+1064
2018-11-30clk: sunxi-ng: r40: Force LOSC parent to RTC LOSC outputChen-Yu Tsai1-0/+11
2018-11-30clk: renesas: Mark rza2_cpg_clk_register staticStephen Boyd1-1/+1
2018-11-29clk: tegra: Change to use DEFINE_SHOW_ATTRIBUTE macroYangtao Li1-11/+1
2018-11-29clk: nomadik: Change to use DEFINE_SHOW_ATTRIBUTE macroYangtao Li1-13/+3
2018-11-29clk: qcom: gpu_cc_gmu_clk_src has 5 parents, not 6Douglas Anderson1-1/+1
2018-11-28Merge branch 'clk-protected-binding' into clk-fixesStephen Boyd1-0/+18