kernel/linux.git - Linux kernel stable tree (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2018-07-26	Merge tag 'samsung-drivers-exynos5440-4.19' of https://git.kernel.org/pub/scm...	Olof Johansson	2	-168/+0
2018-07-26	clk: actions: Add S700 SoC clock support	Saravanan Sekar	3	-0/+613
2018-07-26	clk: actions: Add missing REGMAP_MMIO dependency	Saravanan Sekar	1	-0/+1
2018-07-26	clk: uniphier: add clock frequency support for SPI	Kunihiko Hayashi	2	-0/+17
2018-07-26	clk: uniphier: add more USB3 PHY clocks	Masahiro Yamada	1	-9/+17
2018-07-26	clk: uniphier: add NAND 200MHz clock	Masahiro Yamada	1	-7/+17
2018-07-26	clk: tegra: make sdmmc2 and sdmmc4 as sdmmc clocks	Peter De-Schrijver	3	-15/+12
2018-07-25	clk: tegra: Add sdmmc mux divider clock	Peter De-Schrijver	3	-0/+278
2018-07-25	clk: tegra: Refactor fractional divider calculation	Peter De Schrijver	4	-25/+52
2018-07-25	clk: tegra: Fix includes required by fence_udelay()	Aapo Vienamo	1	-0/+1
2018-07-25	clk: imx6sll: fix missing of_node_put()	Nicholas Mc Guire	1	-0/+1
2018-07-25	clk: imx6ul: fix missing of_node_put()	Nicholas Mc Guire	1	-0/+1
2018-07-25	clk: imx: add ocram_s clock for i.mx6sx	Anson Huang	1	-0/+1
2018-07-25	clk: mvebu: armada-37xx-periph: Fix wrong return value in get_parent	Gregory CLEMENT	1	-3/+0
2018-07-25	clk: clk-fixed-factor: Clear OF_POPULATED flag in case of failure	Rajan Vaja	1	-1/+8
2018-07-25	clk: core: Potentially free connection id	Mikko Perttunen	1	-0/+3
2018-07-25	clk: qcom: Update SPDX headers for common files	Taniya Das	8	-84/+13
2018-07-24	clk: samsung: Remove support for Exynos5440	Krzysztof Kozlowski	2	-168/+0
2018-07-16	clk: qcom: clk-rpmh: Add QCOM RPMh clock driver	Taniya Das	3	-0/+339
2018-07-11	clk: aspeed: Support HPLL strapping on ast2400	Joel Stanley	1	-13/+29
2018-07-11	ARM: 8776/1: clkdev: Remove duplicated negative index check from __of_clk_get()	Geert Uytterhoeven	1	-3/+0
2018-07-10	clk: ti: dra7: Add clkctrl clock data for the mcan clocks	Faiz Abbas	1	-0/+1
2018-07-09	clk: imx7d: add IMX7D_MU_ROOT_CLK	Oleksij Rempel	1	-0/+1
2018-07-09	clk: mvebu: armada-37xx-periph: switch to SPDX license identifier	Gregory CLEMENT	1	-4/+1
2018-07-09	clk: mvebu: armada-37xx-periph: Fix switching CPU rate from 300Mhz to 1.2GHz	Gregory CLEMENT	1	-0/+38
2018-07-09	clk: meson: add gen_clk	Jerome Brunet	4	-3/+135
2018-07-09	clk: meson: gxbb: remove HHI_GEN_CLK_CTNL duplicate definition	Jerome Brunet	1	-1/+0
2018-07-09	clk: meson-axg: add clocks required by pcie driver	Yixun Lan	2	-1/+150
2018-07-09	clk: meson: remove unused clk-audio-divider driver	Jerome Brunet	3	-119/+1
2018-07-09	clk: meson: stop rate propagation for audio clocks	Jerome Brunet	1	-9/+7
2018-07-09	clk: meson: axg: add the audio clock controller driver	Jerome Brunet	4	-0/+982
2018-07-09	clk: meson: add axg audio sclk divider driver	Jerome Brunet	3	-1/+252
2018-07-09	Merge remote-tracking branch 'clk/clk-core-duty-cycle' into next/drivers	Jerome Brunet	1	-5/+194
2018-07-09	clk: meson: add triple phase clock driver	Jerome Brunet	4	-0/+94
2018-07-09	clk: meson: add clk-phase clock driver	Jerome Brunet	3	-0/+72
2018-07-09	clk: meson: clean-up meson clock configuration	Jerome Brunet	1	-9/+5
2018-07-09	clk: meson: remove obsolete register access	Jerome Brunet	2	-69/+4
2018-07-09	clk: tegra: emc: Avoid out-of-bounds bug	Dmitry Osipenko	1	-1/+1
2018-07-09	clk: tegra: Mark Memory Controller clock as critical	Dmitry Osipenko	1	-2/+3
2018-07-09	clk: tegra: Make vde a child of pll_c3	Thierry Reding	1	-1/+1
2018-07-09	clk: tegra: Make vic03 a child of pll_c3	Thierry Reding	1	-0/+1
2018-07-09	clk: tegra: bpmp: Don't crash when a clock fails to register	Mikko Perttunen	1	-3/+9
2018-07-08	clk: rockchip: fix clk_i2sout parent selection bits on rk3399	Alberto Panizzo	1	-1/+1
2018-07-07	clk: qcom: Move frequency table macro to common file	Taniya Das	14	-26/+2
2018-07-07	clk: imx51-imx53: Include sizes.h to silence compile errors	Stephen Boyd	1	-0/+1
2018-07-07	clk: imx51-imx53: Annotate critical clocks as CLK_IS_CRITICAL	Fabio Estevam	1	-29/+14
2018-07-06	clk: imx6sll: add GPIO LPCGs	Anson Huang	1	-0/+6
2018-07-06	clk: aspeed: Fix SDCLK name	Lei YU	1	-1/+1
2018-07-06	clk: pxa: export 32kHz PLL	Robert Jarzmik	3	-8/+12
2018-07-06	clk: aspeed: Mark bclk (PCIe) and dclk (VGA) as critical	Joel Stanley	1	-2/+2