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path: root/drivers/clk/zte
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2017-02-10clk: zte: add i2s clocks for zx296718Baoyou Xie1-0/+4
The i2s related clock support is missing from the existing zx296718 clock driver. This patch adds it, so that the upstream ZX I2S driver can work out. Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org> Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-01-10clk: zte: add audio clocks for zx296718Jun Nie3-0/+275
The audio related clock support is missing from the existing zx296718 clock driver. Let's add it, so that the upstream ZX SPDIF driver can work for HDMI audio support. Signed-off-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> [sboyd@codeaurora.org: Staticize some more structures] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-01-10clk: zx296718: do not panic on failureShawn Guo1-9/+18
Instead of using panic, we should give an error message and return error code when of_clk_add_hw_provider() call fails. Since we have error prompt for failures, the "init over" pr_info output isn't really necessary but becomes a debug noise. So let's clean it up along the way. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-09-24clk: zx296718: register driver earlier with core_initcallShawn Guo1-1/+5
Clock driver should be registered with an earlier initcall than module_init which is used by most of client device drivers. Otherwise, probing of these client drivers will likely be deferred due to that calls into clk API will return -EPROBE_DEFER. Deferred probing is not a problem for most subsystems, but could bring some side effect for particular subsystem, like display. On ZX296718 platform, we get Linux logo and boot log lost from display device, just because the DRM/KMS driver gets -EPROBE_DEFER from devm_clk_get() call. Let's use core_initcall (qcom and a few other clk drivers use that) for driver registration to avoid those unnecessary -EPROBE_DEFER and get rid of the side effect with ZX296718 display system. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-09-17clk: zx: fix pointer case warningsArnd Bergmann1-10/+10
The zx296718 clock driver has a creative way of assigning the register values for each clock, by initializing an __iomem pointer to an offset and then later adding the base (from ioremap) on top with a cast to u64. This fail on all 32-bit architectures during compile testing: drivers/clk/zte/clk-zx296718.c: In function 'top_clocks_init': drivers/clk/zte/clk-zx296718.c:554:35: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast] zx296718_pll_clk[i].reg_base += (u64)reg_base; drivers/clk/zte/clk-zx296718.c:579:29: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast] drivers/clk/zte/clk-zx296718.c:592:31: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast] It would be nice to avoid all the casts, but I decided to simply shut up the warnings by changing the type from u64 to uintptr_t, which does the right thing in practice. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Fixes: ca0233285a93 ("clk: zx: register ZX296718 clocks") Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-09-17clk: zx296718: use builtin_platform_driver to simplify the codeWei Yongjun1-5/+1
Use the builtin_platform_driver() macro to make the code simpler. Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-09-14clk: zx: register ZX296718 clocksJun Nie3-0/+1050
The ZX296718 clocks are statically listed and registered. More clock will be added later. Signed-off-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-09-14clk: zx: reform pll config info to ease code extensionJun Nie2-9/+16
Add power down bit and pll lock bit in pll config structure to ease new SoC support. Signed-off-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-04-16clk: zte: Remove CLK_IS_ROOTStephen Boyd1-2/+1
This flag is a no-op now. Remove usage of the flag. Cc: Jun Nie <jun.nie@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28clk: zx: Constify parent names in clock init dataJun Nie1-20/+20
The array of parent names can be made as array of const pointers to const strings. Signed-off-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28clk: zx: Add audio and GPIO clock for zx296702Jun Nie1-2/+90
Add SPDIF/I2S and GPIO clock for zx296702 Signed-off-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-28clk: zx: Add audio div clock method for zx296702Jun Nie3-3/+149
Add SPDIF/I2S divider clock method for zx296702 Signed-off-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-06-12clk: zx: add clock support to zx296702Jun Nie4-0/+863
It adds a clock driver for zx296702 SoC to register the clock tree to Common Clock Framework. All the clocks of bus topology and some the peripheral clocks are ready with this commit. Some missing leaf clocks for peripherals will be added later when needed. Signed-off-by: Jun Nie <jun.nie@linaro.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kevin Hilman <khilman@linaro.org>