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path: root/drivers/clk/tegra/clk-tegra210.c
AgeCommit message (Expand)AuthorFilesLines
2016-04-28clk: tegra: Fix pllre Tegra210 and add pll_re_out1Rhyland Klein1-2/+14
2016-04-28clk: tegra: Add sor_safe clockThierry Reding1-0/+4
2016-04-28clk: tegra: dpaux and dpaux1 are fixed factor clocksThierry Reding1-0/+8
2016-04-28clk: tegra: Add dpaux1 clockThierry Reding1-0/+1
2016-04-28clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLsAndrew Bresticker1-0/+58
2016-02-02clk: tegra: Fix sparse warnings for functions not declared as staticJon Hunter1-17/+19
2016-02-02clk: tegra: Fix sparse warning for pll_mJon Hunter1-1/+1
2016-02-02clk: tegra: Use definition for pll_u override bitJon Hunter1-1/+1
2016-02-02clk: tegra: Fix warning caused by pll_u failing to lockJon Hunter1-2/+0
2016-02-02clk: tegra: Fix clock sources for Tegra210 EMCJon Hunter1-1/+2
2016-02-02clk: tegra: Add the APB2APE audio clock on Tegra210Jon Hunter1-0/+1
2016-02-02clk: tegra: Fix pllx dyn step calculationRhyland Klein1-5/+5
2016-02-02clk: tegra: Fix naming of MISC registersRhyland Klein1-18/+18
2016-01-25clk: tegra: Remove improper flags for lock_enableRhyland Klein1-28/+14
2015-12-17clk: tegra: Add support for Tegra210 clocksRhyland Klein1-0/+2852