index
:
kernel/linux.git
linux-2.6.11.y
linux-2.6.12.y
linux-2.6.13.y
linux-2.6.14.y
linux-2.6.15.y
linux-2.6.16.y
linux-2.6.17.y
linux-2.6.18.y
linux-2.6.19.y
linux-2.6.20.y
linux-2.6.21.y
linux-2.6.22.y
linux-2.6.23.y
linux-2.6.24.y
linux-2.6.25.y
linux-2.6.26.y
linux-2.6.27.y
linux-2.6.28.y
linux-2.6.29.y
linux-2.6.30.y
linux-2.6.31.y
linux-2.6.32.y
linux-2.6.33.y
linux-2.6.34.y
linux-2.6.35.y
linux-2.6.36.y
linux-2.6.37.y
linux-2.6.38.y
linux-2.6.39.y
linux-3.0.y
linux-3.1.y
linux-3.10.y
linux-3.11.y
linux-3.12.y
linux-3.13.y
linux-3.14.y
linux-3.15.y
linux-3.16.y
linux-3.17.y
linux-3.18.y
linux-3.19.y
linux-3.2.y
linux-3.3.y
linux-3.4.y
linux-3.5.y
linux-3.6.y
linux-3.7.y
linux-3.8.y
linux-3.9.y
linux-4.0.y
linux-4.1.y
linux-4.10.y
linux-4.11.y
linux-4.12.y
linux-4.13.y
linux-4.14.y
linux-4.15.y
linux-4.16.y
linux-4.17.y
linux-4.18.y
linux-4.19.y
linux-4.2.y
linux-4.20.y
linux-4.3.y
linux-4.4.y
linux-4.5.y
linux-4.6.y
linux-4.7.y
linux-4.8.y
linux-4.9.y
linux-5.0.y
linux-5.1.y
linux-5.10.y
linux-5.11.y
linux-5.12.y
linux-5.13.y
linux-5.14.y
linux-5.15.y
linux-5.16.y
linux-5.17.y
linux-5.18.y
linux-5.19.y
linux-5.2.y
linux-5.3.y
linux-5.4.y
linux-5.5.y
linux-5.6.y
linux-5.7.y
linux-5.8.y
linux-5.9.y
linux-6.0.y
linux-6.1.y
linux-6.10.y
linux-6.11.y
linux-6.12.y
linux-6.2.y
linux-6.3.y
linux-6.4.y
linux-6.5.y
linux-6.6.y
linux-6.7.y
linux-6.8.y
linux-6.9.y
linux-rockchip-6.1.y
linux-rockchip-6.5.y
linux-rolling-lts
linux-rolling-stable
master
Linux kernel stable tree (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
drivers
/
clk
/
tegra
/
clk-tegra114.c
Age
Commit message (
Expand
)
Author
Files
Lines
2018-12-15
clk: tegra: Fix maximum audio sync clock for Tegra124/210
Jon Hunter
1
-1
/
+8
2018-05-18
clk: tegra: Add quirk for getting CDEV1/2 clocks on Tegra20
Dmitry Osipenko
1
-1
/
+1
2018-03-12
clk: tegra: Specify VDE clock rate
Dmitry Osipenko
1
-0
/
+1
2018-03-12
clk: tegra: Mark HCLK, SCLK and EMC as critical
Dmitry Osipenko
1
-2
/
+1
2017-10-19
clk: tegra: Use tegra_clk_register_periph_data()
Thierry Reding
1
-3
/
+1
2017-03-20
clk: tegra: Add CEC clock
Peter De Schrijver
1
-0
/
+1
2016-08-24
clk: tegra: remove TEGRA_PLL_USE_LOCK for PLLD/PLLD2
Vince Hsu
1
-2
/
+2
2016-06-30
clk: tegra: Initialize UTMI PLL when enabling PLLU
Andrew Bresticker
1
-154
/
+2
2016-04-28
clk: tegra: Special-case mipi-cal parent on Tegra114
Thierry Reding
1
-1
/
+5
2016-03-03
clk: tegra: Remove CLK_IS_ROOT
Stephen Boyd
1
-2
/
+1
2015-11-20
clk: tegra: pll: Update PLLM handling
Danny Huang
1
-1
/
+2
2015-11-20
clk: tegra: pll: Fix _pll_ramp_calc_pll logic and _calc_dynamic_ramp_rate
Rhyland Klein
1
-51
/
+71
2015-11-20
clk: tegra: pll: Don't unconditionally set LOCK flags
Rhyland Klein
1
-10
/
+13
2015-11-20
clk: tegra: Constify pdiv-to-hw mappings
Thierry Reding
1
-4
/
+4
2015-11-18
clk: tegra: Format tables consistently
Thierry Reding
1
-136
/
+137
2015-11-18
clk: tegra: Miscellaneous coding style cleanups
Thierry Reding
1
-6
/
+6
2015-11-18
clk: tegra: Fix 26 MHz oscillator frequency
Thierry Reding
1
-1
/
+1
2015-10-20
clk: tegra: Modify tegra_audio_clk_init to accept more plls
Rhyland Klein
1
-1
/
+7
2015-07-20
clk: tegra: Properly include clk.h
Stephen Boyd
1
-2
/
+0
2015-04-10
clk: tegra: Use generic tegra_osc_clk_init() on Tegra114
Thierry Reding
1
-31
/
+3
2015-04-10
clk: tegra: Various whitespace cleanups
Thierry Reding
1
-1
/
+1
2015-02-02
clk: tegra: Define PLLD_DSI and remove dsia(b)_mux
Mark Zhang
1
-2
/
+8
2014-11-26
clk: tegra: Implement memory-controller clock
Thierry Reding
1
-1
/
+6
2014-06-25
clk: tegra: fix vi_sensor clocks on Tegra124
Peter De Schrijver
1
-1
/
+30
2014-05-23
clk: tegra: Initialize xusb clocks
Andrew Bresticker
1
-1
/
+6
2014-05-23
clk: tegra: Fix xusb_hs_src clock hierarchy
Andrew Bresticker
1
-10
/
+5
2014-02-17
clk: tegra: fix sdmmc clks on Tegra1x4
Andrew Bresticker
1
-4
/
+4
2013-12-12
clk: tegra: implement a reset driver
Stephen Warren
1
-1
/
+2
2013-11-26
clk: tegra: Initialize DSI low-power clocks
Thierry Reding
1
-0
/
+2
2013-11-26
clk: tegra: add FUSE clock device
Alexandre Courbot
1
-0
/
+1
2013-11-26
clk: tegra114: Initialize clocks needed for HDMI
Mikko Perttunen
1
-0
/
+2
2013-11-26
clk: tegra: introduce common gen4 super clock
Peter De Schrijver
1
-74
/
+2
2013-11-26
clk: tegra: move PMC, fixed clocks to common files
Peter De Schrijver
1
-74
/
+1
2013-11-26
clk: tegra: move periph clocks to common file
Peter De Schrijver
1
-574
/
+17
2013-11-26
clk: tegra: move audio clk to common file
Peter De Schrijver
1
-208
/
+182
2013-11-26
clk: tegra: add clkdev registration infra
Peter De Schrijver
1
-159
/
+163
2013-11-26
clk: tegra: move fields to tegra_clk_pll_params
Peter De Schrijver
1
-31
/
+43
2013-11-26
clk: tegra: use pll_ref as the pll_e parent
Peter De Schrijver
1
-1
/
+2
2013-11-26
clk: tegra: move some PLLC and PLLXC init to clk-pll.c
Peter De Schrijver
1
-89
/
+20
2013-11-26
clk: tegra: common periph_clk_enb_refcnt and clks
Peter De Schrijver
1
-41
/
+16
2013-11-26
clk: tegra: simplify periph clock data
Peter De Schrijver
1
-235
/
+141
2013-11-26
clk: tegra114: Rename gr_2d/gr_3d to gr2d/gr3d
Thierry Reding
1
-4
/
+4
2013-11-26
clk: tegra: Set the clk parent of host1x to pll_p
Andrew Chew
1
-0
/
+1
2013-11-26
clk: tegra: add TEGRA_DIVIDER_ROUND_UP for periph clks
Peter De Schrijver
1
-24
/
+29
2013-11-25
clk: tegra: Set the clock parent of gr2d/gr3d to pll_c2
Mark Zhang
1
-0
/
+3
2013-11-25
clk: tegra: Fix vde/2d/3d clock src offset
Mark Zhang
1
-10
/
+3
2013-11-25
clk: tegra: Correct sbc mux width & parent
Mark Zhang
1
-6
/
+6
2013-11-25
clk: tegra: replace enum tegra114_clk by binding header
Peter De Schrijver
1
-233
/
+198
2013-09-10
Merge tag 'clk-for-linus-3.12' of git://git.linaro.org/people/mturquette/linux
Linus Torvalds
1
-13
/
+25
2013-08-19
clk: add CLK_SET_RATE_NO_REPARENT flag
James Hogan
1
-12
/
+24
[next]