| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2021-06-28 | clk: st: clkgen-pll: embed soc clock outputs within compatible data | Alain Volmat | 1 | -14/+106 |
| 2021-06-28 | clk: st: clkgen-pll: remove unused variable of struct clkgen_pll | Alain Volmat | 1 | -1/+0 |
| 2021-02-11 | clk: st: clkgen-pll: Demote unpopulated kernel-doc header | Lee Jones | 1 | -2/+1 |
| 2019-09-06 | clk: st: clkgen-pll: remove unused variable 'st_pll3200c32_407_a0' | YueHaibing | 1 | -13/+0 |
| 2019-05-30 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 | Thomas Gleixner | 1 | -6/+1 |
| 2018-12-11 | clk: st: Remove usage of CLK_IS_BASIC | Stephen Boyd | 1 | -1/+1 |
| 2018-06-13 | treewide: kzalloc() -> kcalloc() | Kees Cook | 1 | -1/+1 |
| 2016-09-17 | drivers: clk: st: Simplify clock binding of STiH4xx platforms | Gabriel Fernandez | 1 | -34/+29 |
| 2016-09-17 | drivers: clk: st: Remove stih415-416 clock support | Gabriel Fernandez | 1 | -419/+0 |
| 2016-06-30 | clk: st: clkgen-pll: Detect critical clocks | Lee Jones | 1 | -10/+17 |
| 2015-10-09 | drivers: clk: st: Correct the pll-type for A9 for stih418 | Gabriel Fernandez | 1 | -0/+194 |
| 2015-10-09 | drivers: clk: st: PLL rate change implementation for DVFS | Gabriel Fernandez | 1 | -10/+211 |
| 2015-10-09 | drivers: clk: st: Support for enable/disable in Clockgen PLLs | Gabriel Fernandez | 1 | -1/+59 |
| 2015-09-17 | drivers: clk: st: Rename st_pll3200c32_407_c0_x into st_pll3200c32_cx_x | Gabriel Fernandez | 1 | -6/+6 |
| 2015-08-25 | clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw) | Stephen Boyd | 1 | -4/+4 |
| 2015-07-28 | Merge branch 'cleanup-clk-h-includes' into clk-next | Stephen Boyd | 1 | -0/+1 |
| 2015-07-20 | clk: st: Include clk.h | Stephen Boyd | 1 | -0/+1 |
| 2015-07-06 | drivers: clk: st: Add CLK_GET_RATE_NOCACHE flag to clocks | Pankaj Dev | 1 | -1/+1 |
| 2015-05-15 | clk: st: Silence sparse warnings | Stephen Boyd | 1 | -5/+5 |
| 2015-04-01 | clk: constify of_device_id array | Fabian Frederick | 1 | -2/+2 |
| 2014-07-29 | clk: st: STiH407: Support for clockgenA9 | Gabriel FERNANDEZ | 1 | -0/+16 |
| 2014-07-29 | clk: st: STiH407: Support for clockgenC0 | Gabriel FERNANDEZ | 1 | -0/+32 |
| 2014-07-29 | clk: st: STiH407: Support for clockgenA0 | Gabriel FERNANDEZ | 1 | -0/+16 |
| 2014-07-29 | clk: st: use static const for clkgen_pll_data tables | Gabriel FERNANDEZ | 1 | -16/+14 |
| 2014-05-28 | clk: st: Terminate of match table | Stephen Boyd | 1 | -0/+1 |
| 2014-05-24 | clk: st: Fix memory leak | Valentin Ilie | 1 | -1/+3 |
| 2014-03-26 | clk: st: Support for ClockGenA9/DDR/GPU | Gabriel FERNANDEZ | 1 | -0/+139 |
| 2014-03-26 | clk: st: Support for PLLs inside ClockGenA(s) | Gabriel FERNANDEZ | 1 | -0/+559 |
