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path: root/drivers/clk/socfpga/clk-s10.c
AgeCommit message (Expand)AuthorFilesLines
2020-05-27clk: socfpga: stratix10: use new parent data schemeDinh Nguyen1-29/+131
2020-02-13clk: socfpga: stratix10: simplify parameter passingDinh Nguyen1-25/+4
2019-06-26clk: socfpga: stratix10: fix divider entry for the emac clocksDinh Nguyen1-2/+2
2019-06-26clk: socfpga: stratix10: add additional clocks needed for the NAND IPDinh Nguyen1-1/+5
2019-01-15clk: socfpga: stratix10: fix naming convention for the fixed-clocksDinh Nguyen1-10/+10
2018-07-06clk: socfpga: stratix10: fix the sdmmc_free_clk muxDinh Nguyen1-1/+1
2018-07-06clk: socfpga: stratix10: fix the parents of mpu_free_clkDinh Nguyen1-1/+6
2018-05-16clk: socfpga: stratix10: suppress unbinding platform's clock driverDinh Nguyen1-0/+1
2018-05-16clk: socfpga: stratix10: use platform driver APIsDinh Nguyen1-22/+17
2018-04-06clk: socfpga: stratix10: add clock driver for Stratix10 platformDinh Nguyen1-0/+345