Age | Commit message (Collapse) | Author | Files | Lines | |
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2014-02-25 | clk: shmobile: div6: use proper description in kernel doc | Wolfram Sang | 1 | -1/+1 | |
These variable clocks have nothing to do with MSTP gating, probably a copy&paste leftover. Signed-off-by: Wolfram Sang <wsa@sang-engineering.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> | |||||
2013-12-13 | clk: shmobile: Add DIV6 clock support | Laurent Pinchart | 1 | -0/+185 | |
DIV6 clocks are divider gate clocks controlled through a single register. The divider is expressed on 6 bits, hence the name, and can take values from 1/1 to 1/64. Those clocks are found on Renesas ARM SoCs. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> |