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path: root/drivers/clk/samsung
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2014-01-29Merge tag 'clk-for-linus-3.14-part2' of git://git.linaro.org/people/mike.turq...Linus Torvalds1-1/+1
2014-01-24Merge tag 'clk-for-linus-3.14-part1' of git://git.linaro.org/people/mike.turq...Linus Torvalds5-1164/+1282
2014-01-24Merge tag 'fixes-nc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/g...Linus Torvalds1-1/+2
2014-01-20Merge branch 'for-next' into for-linusTakashi Iwai1-2/+2
2014-01-18clk: samsung: Remove unneeded semicolonSachin Kamat1-1/+1
2014-01-08clk: exynos-audss: add support for Exynos 5420Andrew Bresticker1-7/+33
2014-01-08clk: exynos5250: add clock ID for div_pcm0Andrew Bresticker1-1/+1
2014-01-08clk: exynos-audss: allow input clocks to be specified in device treeAndrew Bresticker1-5/+20
2014-01-08clk: exynos-audss: convert to platform deviceAndrew Bresticker1-16/+88
2014-01-08clk: exynos5440: replace clock ID private enums with IDs from DT headerAndrzej Hajda1-47/+34
2014-01-08clk: exynos5420: replace clock ID private enums with IDs from DT headerAndrzej Hajda1-339/+309
2014-01-08clk: exynos5250: replace clock ID private enums with IDs from DT headerAndrzej Hajda1-295/+264
2014-01-08clk: exynos4: replace clock ID private enums with IDs from DT headerAndrzej Hajda1-455/+402
2014-01-08clk: exynos5250: register APLL rate tableAndrew Bresticker1-1/+24
2013-12-30clk: exynos5250: Add CLK_SET_RATE_PARENT flag to mout_apllSachin Kamat1-1/+2
2013-12-30clk: samsung: exynos5250: Fix parents of gate clocks from MFC domainTomasz Figa1-3/+5
2013-12-30clk: samsung: exynos5250: Correct parent list of audio muxesTomasz Figa1-3/+3
2013-12-30clk: samsung: exynos5250: Add missing unpopulated mux parentsTomasz Figa1-4/+12
2013-12-30clk: samsung: exynos5250: Fix parent of gate clocks from DISP1 domainTomasz Figa1-6/+8
2013-12-30clk: samsung: exynos5250: Fix parents of gate clocks from GSCL domainTomasz Figa1-8/+17
2013-12-30clk: samsung: exynos5250: Make names of mux and div clocks consistentTomasz Figa1-122/+123
2013-12-30clk: samsung: exynos5250: Sort definitions by registers and bitfieldTomasz Figa1-102/+188
2013-12-30Merge branch 'samsung-fixes' into samsung-next-baseTomasz Figa3-11/+15
2013-12-30clk: exynos: File scope reg_save array should depend on PM_SLEEPKrzysztof Kozlowski1-5/+5
2013-12-30clk: samsung: exynos5250: Add CLK_IGNORE_UNUSED flag for the sysreg clockAbhilash Kesavan1-1/+2
2013-12-30clk: samsung: exynos5250: Add MDMA0 clocksAbhilash Kesavan1-1/+4
2013-12-30clk: samsung: exynos5250: Fix ACP gate register offsetAbhilash Kesavan1-1/+1
2013-12-30clk: exynos5250: fix sysmmu_mfc{l,r} gate clocksAndrew Bresticker1-2/+2
2013-12-30clk: samsung: exynos4: Correct SRC_MFC registerSeung-Woo Kim1-1/+1
2013-12-21clk: samsung: exynos4: Fix definition of div_mmc_pre4 dividerTomasz Figa1-1/+2
2013-12-04clk: exynos5420: fix cpll clock register offsetsChander Kashyap1-2/+2
2013-11-24clk: samsung: s3c64xx: Remove clock aliases of old DMA driverTomasz Figa1-2/+0
2013-11-24clk: samsung: s3c64xx: Add aliases for DMA clocksTomasz Figa1-0/+2
2013-09-17ARM: S3C64XX: Migrate clock handling to Common Clock FrameworkTomasz Figa1-2/+0
2013-09-10Merge tag 'clk-for-linus-3.12' of git://git.linaro.org/people/mturquette/linuxLinus Torvalds11-508/+1702
2013-09-07clk: samsung: exynos5250: Simplify registration of PLL rate tablesTomasz Figa1-10/+2
2013-09-07clk: samsung: exynos4: Register PLL rate tables for Exynos4x12Tomasz Figa1-0/+49
2013-09-07clk: samsung: exynos4: Register PLL rate tables for Exynos4210Tomasz Figa1-0/+45
2013-09-07clk: samsung: exynos4: Reorder registration of mout_vpllsrcTomasz Figa1-1/+7
2013-09-07clk: samsung: pll: Add support for rate configuration of PLL46xxTomasz Figa2-1/+135
2013-09-07clk: samsung: pll: Use new registration method for PLL46xxTomasz Figa3-65/+14
2013-09-07clk: samsung: pll: Add support for rate configuration of PLL45xxTomasz Figa2-1/+119
2013-09-07clk: samsung: pll: Use new registration method for PLL45xxTomasz Figa3-62/+20
2013-09-07clk: samsung: exynos4: Rename exynos4_plls to exynos4x12_pllsTomasz Figa1-3/+3
2013-09-07clk: samsung: exynos4: Remove checks for DT nodeTomasz Figa1-7/+4
2013-09-07clk: samsung: exynos4: Remove unused static clkdev aliasesTomasz Figa1-184/+172
2013-09-07clk: samsung: Modify _get_rate() helper to use __clk_lookup()Tomasz Figa3-9/+7
2013-09-07clk: samsung: exynos4: Use separate aliases for cpufreq related clocksTomasz Figa1-8/+27
2013-08-30clk/exynos5420: assign dout_pixel id to pixel clock dividerRahul Sharma1-1/+4
2013-08-30clk/exynos5420: add hdmi mux to change parents in hdmi driverRahul Sharma1-1/+4