Age | Commit message (Expand) | Author | Files | Lines |
2018-10-19 | Merge branch 'clk-renesas' into clk-next | Stephen Boyd | 18 | -168/+1333 |
2018-10-19 | Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next | Stephen Boyd | 10 | -28/+28 |
2018-09-29 | clk: renesas: Convert to SPDX identifiers | Kuninori Morimoto | 21 | -89/+25 |
2018-09-28 | clk: renesas: r7s9210: Add SPI clocks | Chris Brandt | 1 | -0/+3 |
2018-09-26 | clk: renesas: r7s9210: Move table update to separate function | Chris Brandt | 1 | -45/+50 |
2018-09-26 | clk: renesas: r7s9210: Convert some clocks to early | Chris Brandt | 1 | -6/+26 |
2018-09-26 | clk: renesas: cpg-mssr: Add early clock support | Chris Brandt | 2 | -21/+89 |
2018-09-25 | clk: renesas: r8a77970: Add TPU clock | Sergei Shtylyov | 1 | -0/+1 |
2018-09-25 | clk: renesas: r8a77990: Fix incorrect PLL0 divider in comment | Geert Uytterhoeven | 1 | -2/+2 |
2018-09-19 | clk: renesas: cpg-mssr: Add r8a774c0 support | Fabrizio Castro | 5 | -0/+299 |
2018-09-19 | clk: renesas: r8a7743: Add r8a7744 support | Biju Das | 3 | -2/+18 |
2018-09-11 | clk: renesas: cpg-mssr: Add R7S9210 support | Chris Brandt | 5 | -12/+277 |
2018-09-11 | clk: renesas: r8a77970: Add TMU clocks | Sergei Shtylyov | 1 | -0/+5 |
2018-09-11 | clk: renesas: r8a77970: Add CMT clocks | Sergei Shtylyov | 1 | -0/+4 |
2018-09-11 | clk: renesas: r9a06g032: Fix UART34567 clock rate | Phil Edworthy | 1 | -1/+2 |
2018-09-03 | clk: renesas: r8a77970: Add SD0H/SD0 clocks for SDHI | Sergei Shtylyov | 2 | -2/+67 |
2018-09-03 | clk: renesas: r8a77980: Add CMT clocks | Sergei Shtylyov | 1 | -0/+4 |
2018-08-31 | clk: renesas: r8a77990: Add missing I2C7 clock | Geert Uytterhoeven | 1 | -0/+1 |
2018-08-31 | clk: renesas: use SPDX identifier for Renesas drivers | Wolfram Sang | 8 | -32/+8 |
2018-08-30 | clk: Convert to using %pOFn instead of device_node.name | Rob Herring | 10 | -28/+28 |
2018-08-28 | clk: renesas: r8a77965: Add FDP clock | Hoan Nguyen An | 1 | -0/+1 |
2018-08-27 | clk: renesas: cpg-mssr: Add r8a774a1 support | Biju Das | 5 | -0/+336 |
2018-08-27 | clk: renesas: r8a77965: Add SATA clock | Takeshi Kihara | 1 | -0/+1 |
2018-08-27 | clk: renesas: r8a77980: Add RCLK for watchdog timer | Geert Uytterhoeven | 1 | -0/+4 |
2018-08-27 | clk: renesas: rcar-gen3: Add support for mode pin clock selection | Geert Uytterhoeven | 2 | -10/+13 |
2018-08-27 | clk: renesas: r8a77995: Correct RCLK handling | Geert Uytterhoeven | 1 | -2/+10 |
2018-08-27 | clk: renesas: r8a77990: Correct RCLK handling | Geert Uytterhoeven | 1 | -2/+10 |
2018-08-27 | clk: renesas: rcar-gen3: Add support for RCKSEL clock selection | Geert Uytterhoeven | 2 | -4/+26 |
2018-08-27 | clk: renesas: cpg-mssr: Add support for fixed rate clocks | Geert Uytterhoeven | 2 | -0/+8 |
2018-08-27 | clk: renesas: r8a77980: Add OSC predivider configuration and clock | Geert Uytterhoeven | 1 | -11/+13 |
2018-08-27 | clk: renesas: r8a77965: Add OSC EXTAL predivider configuration | Geert Uytterhoeven | 1 | -33/+33 |
2018-08-27 | clk: renesas: r8a7796: Add OSC EXTAL predivider configuration | Geert Uytterhoeven | 1 | -33/+33 |
2018-08-27 | clk: renesas: r8a7795: Add OSC EXTAL predivider configuration | Geert Uytterhoeven | 1 | -33/+33 |
2018-08-27 | clk: renesas: rcar-gen3: Add support for OSC EXTAL predivider | Geert Uytterhoeven | 2 | -0/+11 |
2018-08-27 | clk: renesas: rcar-gen3: Rename rint to .r | Geert Uytterhoeven | 3 | -3/+6 |
2018-06-25 | clk: renesas: Renesas R9A06G032 clock driver | Michel Pollet | 3 | -0/+900 |
2018-06-19 | clk: renesas: r8a7795: Add CCREE clock | Gilad Ben-Yossef | 1 | -0/+1 |
2018-06-19 | clk: renesas: r8a7795: Add CR clock | Geert Uytterhoeven | 1 | -0/+1 |
2018-06-13 | treewide: kzalloc() -> kcalloc() | Kees Cook | 4 | -4/+4 |
2018-06-09 | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl... | Linus Torvalds | 14 | -6/+578 |
2018-06-07 | Merge tag 'printk-for-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/... | Linus Torvalds | 1 | -4/+5 |
2018-06-05 | clk: renesas: cpg-mssr: Stop using printk format %pCr | Geert Uytterhoeven | 1 | -4/+5 |
2018-05-09 | clk: renesas: cpg-mssr: Add support for R-Car E3 | Yoshihiro Shimoda | 5 | -0/+302 |
2018-04-16 | clk: renesas: rcar-gen2: Centralize quirks handling | Geert Uytterhoeven | 1 | -4/+16 |
2018-04-16 | clk: renesas: r8a77980: Correct parent clock of PCIEC0 | Geert Uytterhoeven | 1 | -1/+1 |
2018-04-16 | clk: renesas: r8a7794: Fix LB clock divider | Geert Uytterhoeven | 1 | -1/+1 |
2018-04-16 | clk: renesas: r8a7792: Fix LB clock divider | Geert Uytterhoeven | 1 | -1/+1 |
2018-04-16 | clk: renesas: r8a7791/r8a7793: Fix LB clock divider | Geert Uytterhoeven | 1 | -1/+1 |
2018-04-16 | clk: renesas: r8a7745: Fix LB clock divider | Geert Uytterhoeven | 1 | -1/+1 |
2018-04-16 | clk: renesas: r8a7743: Fix LB clock divider | Geert Uytterhoeven | 1 | -1/+1 |