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path: root/drivers/clk/renesas
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2016-12-27clk: renesas: r8a7796: Add MSIOF controller clocksHiromitsu Yamasaki1-0/+5
2016-12-27clk: renesas: r8a7796: Add CAN FD peripheral clockChris Paterson1-0/+1
2016-12-27clk: renesas: r8a7796: Add CANFD clockChris Paterson1-0/+1
2016-12-27clk: renesas: r8a7796: Add CAN peripheral clockChris Paterson1-0/+2
2016-12-22clk: renesas: mstp: Support 8-bit registers for r7s72100Chris Brandt1-5/+22
2016-11-10clk: renesas: cpg-mssr: Add R8A7745 supportSergei Shtylyov5-0/+268
2016-11-10clk: renesas: cpg-mssr: Add R8A7743 supportSergei Shtylyov5-0/+279
2016-11-10clk: renesas: cpg-mssr: Add common R-Car Gen2 supportSergei Shtylyov2-0/+414
2016-11-07clk: renesas: r8a7795: Fix HDMI parent clockTakeshi Kihara1-1/+1
2016-11-07clk: renesas: r8a7796: Add VIN clocksNiklas Söderlund1-0/+8
2016-11-07clk: renesas: r8a7796: Add CSI2 clocksNiklas Söderlund1-0/+4
2016-11-02Merge branch 'rcar-rst' into clk-renesas-for-v4.10Geert Uytterhoeven7-51/+59
2016-11-02clk: renesas: rcar-gen2: Remove obsolete rcar_gen2_clocks_init()Geert Uytterhoeven1-7/+0
2016-11-02clk: renesas: r8a7779: Remove obsolete r8a7779_clocks_init()Geert Uytterhoeven1-9/+0
2016-11-02clk: renesas: r8a7778: Remove obsolete r8a7778_clocks_init()Geert Uytterhoeven1-13/+0
2016-11-02clk: renesas: rcar-gen3-cpg: Remove obsolete rcar_gen3_read_mode_pins()Geert Uytterhoeven2-18/+0
2016-11-02clk: renesas: r8a7796: Obtain mode pin values from R-Car RST driverGeert Uytterhoeven1-1/+7
2016-11-02clk: renesas: r8a7795: Obtain mode pin values from R-Car RST driverGeert Uytterhoeven1-1/+7
2016-11-02clk: renesas: rcar-gen2: Obtain mode pin values using RST driverGeert Uytterhoeven1-0/+25
2016-11-02clk: renesas: r8a7779: Obtain mode pin values from R-Car RST driverGeert Uytterhoeven1-2/+7
2016-11-02clk: renesas: r8a7778: Obtain mode pin values using R-Car RST driverGeert Uytterhoeven1-0/+13
2016-11-02clk: renesas: r8a7796: Add DU and LVDS clocksLaurent Pinchart1-0/+4
2016-11-02clk: renesas: r8a7796: Add VSP clocksLaurent Pinchart1-0/+5
2016-11-02clk: renesas: r8a7796: Add FCP clocksLaurent Pinchart1-0/+8
2016-11-02clk: renesas: cpg-mssr: Remove bogus commas from error messagesGeert Uytterhoeven1-2/+2
2016-11-02clk: renesas: r8a7796: Add DRIF clockRamesh Shanmugasundaram1-0/+8
2016-10-17clk: renesas: cpg-mssr: Fix inverted debug checkGeert Uytterhoeven1-2/+2
2016-10-17clk: renesas: rcar-gen3-cpg: Always use readl()/writel()Geert Uytterhoeven1-7/+7
2016-10-17clk: renesas: cpg-mssr: Always use readl()/writel()Geert Uytterhoeven1-5/+4
2016-10-17clk: renesas: r8a7796: Add I2C clocksUlrich Hecht1-0/+7
2016-10-17clk: renesas: r8a7796: Add HSCIF clocksUlrich Hecht1-0/+5
2016-10-17clk: renesas: r8a7796: Add SCIF clocksUlrich Hecht1-0/+5
2016-10-17clk: renesas: r8a7796: Add SYS-DMAC clocksUlrich Hecht1-0/+3
2016-09-17clk/Renesas-MSTP: Use kmalloc_array() in cpg_mstp_clocks_init()Markus Elfring1-1/+1
2016-09-14Merge tag 'clk-renesas-for-v4.9-tag3' of git://git.kernel.org/pub/scm/linux/k...Stephen Boyd3-2/+32
2016-09-12clk: renesas: r8a7796: Add CMT clocksBui Duc Phuc1-0/+4
2016-09-12clk: renesas: r8a7795: Add CMT clocksBui Duc Phuc1-0/+4
2016-09-12clk: renesas: r8a7796: Add RAVB clockLaurent Pinchart1-0/+1
2016-09-05clk: renesas: r8a7796: Add THS/TSC clockKhiem Nguyen1-0/+1
2016-09-05clk: renesas: rz: Select EXTAL vs USB clockChris Brandt1-2/+22
2016-08-30Merge tag 'clk-renesas-for-v4.9-tag2' of git://git.kernel.org/pub/scm/linux/k...Stephen Boyd1-0/+18
2016-08-23clk: renesas: r8a7796: Add SDIF clocksSimon Horman1-0/+10
2016-08-19clk: renesas: r8a7796: Add GPIO clocksTakeshi Kihara1-0/+8
2016-08-19Merge tag 'clk-renesas-for-v4.9-tag1' of git://git.kernel.org/pub/scm/linux/k...Stephen Boyd1-0/+7
2016-08-12clk: renesas: r8a7795: Fix SD clocksYoshihiro Shimoda1-4/+5
2016-08-09clk: renesas: r8a7796: Add watchdog module clockGeert Uytterhoeven1-0/+1
2016-08-09clk: renesas: r8a7796: Add watchdog core clocksGeert Uytterhoeven1-0/+6
2016-06-21clk: renesas: r8a7795: Add THS/TSC clockKhiem Nguyen1-0/+1
2016-06-21clk: renesas: r8a7795: Add DRIF clockRamesh Shanmugasundaram1-0/+8
2016-06-21clk: renesas: r8a7795: Correct lvds clock parentGeert Uytterhoeven1-1/+1