| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2017-10-20 | clk: renesas: rcar-gen3: Restore R clock during resume | Geert Uytterhoeven | 1 | -2/+11 |
| 2017-10-20 | clk: renesas: rcar-gen3: Restore SDHI clocks during resume | Geert Uytterhoeven | 1 | -13/+50 |
| 2017-10-20 | clk: renesas: cpg-mssr: Add support to restore core clocks during resume | Geert Uytterhoeven | 1 | -1/+2 |
| 2017-08-16 | clk: renesas: rcar-gen3: Add support for SCCG/Clean peripheral clocks | Geert Uytterhoeven | 1 | -1/+19 |
| 2017-08-16 | clk: renesas: rcar-gen3: Add divider support for PLL1 and PLL3 | Geert Uytterhoeven | 1 | -0/+2 |
| 2017-07-19 | clk: renesas: rcar-gen3-cpg: Refactor checks for accessing the div table | Wolfram Sang | 1 | -26/+20 |
| 2017-07-19 | clk: renesas: rcar-gen3-cpg: Drop superfluous variable | Wolfram Sang | 1 | -2/+1 |
| 2017-03-30 | clk: renesas: rcar-gen3-cpg: Add support for RCLK on R-Car H3 ES2.0 | Geert Uytterhoeven | 1 | -11/+27 |
| 2017-03-21 | clk: renesas: rcar-gen3: Add workaround for PLL0/2/4 errata on H3 ES1.0 | Geert Uytterhoeven | 1 | -0/+24 |
| 2017-03-21 | clk: renesas: rcar-gen3-cpg: Pass mode pins to rcar_gen3_cpg_init() | Geert Uytterhoeven | 1 | -1/+3 |
| 2016-11-02 | Merge branch 'rcar-rst' into clk-renesas-for-v4.10 | Geert Uytterhoeven | 1 | -17/+0 |
| 2016-11-02 | clk: renesas: rcar-gen3-cpg: Remove obsolete rcar_gen3_read_mode_pins() | Geert Uytterhoeven | 1 | -17/+0 |
| 2016-10-17 | clk: renesas: rcar-gen3-cpg: Always use readl()/writel() | Geert Uytterhoeven | 1 | -7/+7 |
| 2016-06-06 | clk: renesas: cpg-mssr: Extract common R-Car Gen3 support code | Geert Uytterhoeven | 1 | -0/+359 |
