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path: root/drivers/clk/qcom
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2014-12-21Merge tag 'clk-for-linus-3.19' of git://git.linaro.org/people/mike.turquette/...Linus Torvalds3-20/+30
2014-12-15Merge tag 'driver-core-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds5-5/+0
2014-12-04clk: Change clk_ops->determine_rate to return a clk_hw as the best parentTomeu Vizoso3-20/+30
2014-11-17clk: qcom: Fix duplicate rbcpr clock nameGeorgi Djakov1-1/+1
2014-10-20clk: qcom: drop owner assignment from platform_driversWolfram Sang5-5/+0
2014-09-27Merge tag 'qcom-clocks-for-3.18' of git://git.kernel.org/pub/scm/linux/kernel...Mike Turquette9-88/+219
2014-09-26clk: Remove .owner field for driverKiran Padwal3-3/+0
2014-09-23clk: qcom: Add support for banked MD RCGsStephen Boyd3-56/+77
2014-09-23clk: qcom: Add support for setting rates on PLLsStephen Boyd2-1/+87
2014-09-23clk: qcom: Consolidate frequency finding logicStephen Boyd4-32/+27
2014-09-23clk: qcom: Add IPQ8064 PLL required for USBAndy Gross1-1/+30
2014-09-03clk: qcom: Fix sdc 144kHz frequency entryStephen Boyd1-1/+1
2014-07-26Merge tag 'qcom-clocks-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel...Mike Turquette14-80/+10568
2014-07-16clk: qcom: Add support for APQ8064 multimedia clocksStephen Boyd1-2/+431
2014-07-16clk: qcom: pll: Add support for configuring SR PLLsStephen Boyd2-3/+14
2014-07-16clk: qcom: mdp_lut_clk is a child of mdp_srcStephen Boyd1-1/+1
2014-07-16clk: qcom: Fix PLL rate configurationsStephen Boyd3-17/+38
2014-07-16clk: qcom: Fix MN frequency tables, parent map, and jpegdStephen Boyd1-40/+42
2014-07-16clk: qcom: Support bypass RCG configurationStephen Boyd3-14/+47
2014-07-16clk: qcom: Add support for IPQ8064's global clock controller (GCC)Kumar Gala3-0/+2433
2014-07-16clk: qcom: Add APQ8084 Multimedia Clock Controller (MMCC) supportGeorgi Djakov3-0/+3362
2014-07-12clk: qcom: Add APQ8084 clocks for SATA, PCIe and UFSGeorgi Djakov1-0/+667
2014-07-12clk: qcom: Add APQ8084 Global Clock Controller supportGeorgi Djakov3-0/+2953
2014-07-12clk: qcom: Fully support apq8064 global clock controlStephen Boyd1-4/+569
2014-07-12clk: qcom: add clocks necessary for apq8064 sdccSrinivas Kandagatla1-0/+12
2014-07-03clk: qcom: HDMI source sel is 3 not 2Stephen Boyd1-1/+1
2014-05-29clk: qcom: Return error pointers for unimplemented clocksStephen Boyd1-1/+3
2014-05-29clk: qcom: Support msm8974pro global clock control hardwareStephen Boyd1-6/+124
2014-05-29clk: qcom: Properly support display clocks on msm8974Stephen Boyd1-51/+54
2014-05-29clk: qcom: Support display RCG clocksStephen Boyd2-15/+287
2014-05-29clk: qcom: Return highest rate when round_rate() exceeds planStephen Boyd1-1/+2
2014-05-29clk: qcom: Fix mmcc-8974's PLL configurationsStephen Boyd1-5/+8
2014-05-29clk: qcom: Fix clk_rcg2_is_enabled() checkStephen Boyd1-1/+1
2014-05-24clk: qcom: Fix blsp2_ahb_clk register offsetGeorgi Djakov1-1/+1
2014-05-17clk: qcom: Fix msm8660 GCC probeStephen Boyd1-0/+12
2014-04-30clk: qcom: Various fixes for MSM8960's global clock controllerKumar Gala1-2/+2
2014-04-30clk: qcom: Add basic support for APQ8064 global clock controller clocksKumar Gala2-5/+29
2014-04-30clk: qcom: Consolidate common probe codeStephen Boyd8-337/+196
2014-01-18clk: qcom: Fix modular buildStephen Boyd1-6/+6
2014-01-17clk: qcom: Add support for MSM8660's global clock controller (GCC)Stephen Boyd3-0/+2828
2014-01-17clk: qcom: Add support for MSM8974's multimedia clock controller (MMCC)Stephen Boyd3-0/+2635
2014-01-17clk: qcom: Add support for MSM8974's global clock controller (GCC)Stephen Boyd3-0/+2703
2014-01-17clk: qcom: Add support for MSM8960's multimedia clock controller (MMCC)Stephen Boyd3-0/+2331
2014-01-17clk: qcom: Add support for MSM8960's global clock controller (GCC)Stephen Boyd3-0/+3003
2014-01-17clk: qcom: Add reset controller supportStephen Boyd4-1/+102
2014-01-17clk: qcom: Add support for branches/gate clocksStephen Boyd3-0/+216
2014-01-17clk: qcom: Add support for root clock generators (RCGs)Stephen Boyd4-0/+969
2014-01-17clk: qcom: Add support for phase locked loops (PLLs)Stephen Boyd3-0/+289
2014-01-17clk: qcom: Add a regmap type clock structStephen Boyd4-0/+167