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path: root/drivers/clk/mmp/clk-of-mmp2.c
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2020-02-05clk: mmp2: Fix the order of timer mux parentsLubomir Rintel1-1/+1
[ Upstream commit 8bea5ac0fbc5b2103f8779ddff216122e3c2e1ad ] Determined empirically, no documentation is available. The OLPC XO-1.75 laptop used parent 1, that one being VCTCXO/4 (65MHz), but thought it's a VCTCXO/2 (130MHz). The mmp2 timer driver, not knowing what is going on, ended up just dividing the rate as of commit f36797ee4380 ("ARM: mmp/mmp2: dt: enable the clock")' Link: https://lore.kernel.org/r/20191218190454.420358-3-lkundrak@v3.sk Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Sasha Levin <sashal@kernel.org>
2019-12-01clk: mmp2: fix the clock id for sdh2_clk and sdh3_clkLubomir Rintel1-2/+2
[ Upstream commit 4917fb90eec7c26dac1497ada3bd4a325f670fcc ] A typo that makes it impossible to get the correct clocks for MMP2_CLK_SDH2 and MMP2_CLK_SDH3. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Fixes: 1ec770d92a62 ("clk: mmp: add mmp2 DT support for clock driver") Signed-off-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
2016-12-09clk:mmp:clk-of-mmp2: Free memory and Unmap region obtained by kzalloc and ↵Arvind Yadav1-3/+12
of_iomap Free memory and memory mapping , if mmp2_clk_init is not successful. Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> [sboyd@codeaurora.org: Put return at the right place] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-11-02clk: mmp: mmp2: fix return value check in mmp2_clk_init()Wei Yongjun1-1/+1
Fix the retrn value check which testing the wrong variable in mmp2_clk_init(). Fixes: 1ec770d92a62 ("clk: mmp: add mmp2 DT support for clock driver") Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-04-16clk: mmp: Remove CLK_IS_ROOTStephen Boyd1-5/+5
This flag is a no-op now. Remove usage of the flag. Cc: Chao Xie <chao.xie@marvell.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-06-04clk: mmp: add timer clock for pxa168/mmp2/pxa910Chao Xie1-0/+6
Timer has external fast clock, and it is a mux clock. Add the timer clock type for timer driver. Signed-off-by: Chao Xie <chao.xie@marvell.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-06-04clk: mmp: Fix the wrong factor table for uart PLLChao Xie1-3/+1
The suggested value in the mmp2 manual is wrong. There are only 13 bits for numerator, but some suggested value has 14 bits. Fix the factor tabled and remove the unused items. Signed-off-by: Chao Xie <chao.xie@marvell.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2014-11-13clk: mmp: add mmp2 DT support for clock driverChao Xie1-0/+334
It adds the DT support for mmp2 clock subsystem. Signed-off-by: Chao Xie <chao.xie@marvell.com> Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: Michael Turquette <mturquette@linaro.org>