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path: root/drivers/clk/microchip/clk-mpfs.c
AgeCommit message (Expand)AuthorFilesLines
2022-09-14clk: microchip: mpfs: update module authorship & licencingConor Dooley1-3/+7
2022-09-14clk: microchip: mpfs: convert periph_clk to clk_gateConor Dooley1-66/+6
2022-09-14clk: microchip: mpfs: convert cfg_clk to clk_dividerConor Dooley1-68/+8
2022-09-14clk: microchip: mpfs: delete 2 line mpfs_clk_register_foo()Conor Dooley1-27/+6
2022-09-14clk: microchip: mpfs: simplify control reg accessConor Dooley1-25/+17
2022-09-14clk: microchip: mpfs: move id & offset out of clock structsConor Dooley1-15/+15
2022-09-14clk: microchip: mpfs: add MSS pll's set & round rateConor Dooley1-0/+54
2022-09-14clk: microchip: mpfs: add reset controllerConor Dooley1-12/+98
2022-09-14clk: microchip: mpfs: make the rtc's ahb clock criticalConor Dooley1-1/+3
2022-09-14clk: microchip: mpfs: fix clk_cfg array bounds violationConor Dooley1-1/+6
2022-04-23clk: microchip: mpfs: add RTCREF clock controlConor Dooley1-1/+23
2022-04-23clk: microchip: mpfs: re-parent the configurable clocksConor Dooley1-19/+132
2022-04-23clk: microchip: mpfs: mark CLK_ATHENA as criticalConor Dooley1-3/+5
2022-04-23clk: microchip: mpfs: fix parents for FIC clocksConor Dooley1-5/+5
2022-04-22clk: microchip: mpfs: don't reset disabled peripheralsConor Dooley1-4/+0
2022-03-12clk: microchip: Add driver for Microchip PolarFire SoCDaire McNamara1-0/+381