kernel/linux.git - Linux kernel stable tree (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2018-03-13	clk: meson: add regmap to the clock controllers	Jerome Brunet	4	-12/+52
2018-03-13	clk: meson: remove superseded aoclk_gate_regmap	Jerome Brunet	2	-56/+0
2018-03-13	clk: meson: switch gxbb ao_clk to clk_regmap	Jerome Brunet	4	-12/+12
2018-03-13	clk: meson: add regmap clocks	Jerome Brunet	4	-0/+282
2018-03-13	clk: meson: remove obsolete comments	Jerome Brunet	3	-12/+0
2018-03-13	clk: meson: only one loop index is necessary in probe	Jerome Brunet	3	-15/+14
2018-03-13	clk: meson: use devm_of_clk_add_hw_provider	Jerome Brunet	3	-6/+7
2018-03-13	clk: meson: use dev pointer where possible	Jerome Brunet	2	-5/+5
2018-02-12	clk: meson: add axg misc bit to the mpll driver	Jerome Brunet	3	-0/+28
2018-02-12	clk: meson: axg: fix the od shift of the sys_pll	Yixun Lan	1	-1/+1
2018-02-12	clk: meson: axg: add the fractional part of the fixed_pll	Jerome Brunet	1	-0/+5
2018-02-12	clk: meson: gxbb: add the fractional part of the fixed_pll	Jerome Brunet	1	-0/+5
2018-02-12	clk: meson: fix rate calculation of plls with a fractional part	Jerome Brunet	3	-3/+15
2018-02-12	clk: meson: add the gxl hdmi pll	Jerome Brunet	1	-2/+48
2018-02-12	clk: meson: add od3 to the pll driver	Jerome Brunet	3	-3/+23
2018-02-12	clk: meson: use the frac parameter width instead of a constant	Jerome Brunet	1	-1/+1
2018-02-12	clk: meson: remove unnecessary rounding in the pll clock	Jerome Brunet	1	-8/+9
2018-02-12	clk: meson: remove useless pll rate params tables	Jerome Brunet	2	-188/+0
2018-02-12	clk: meson: check pll rate param table before using it	Jerome Brunet	1	-0/+10
2018-01-11	clk: meson-axg: fix potential NULL dereference in axg_clkc_probe()	weiyongjun (A)	1	-0/+2
2018-01-03	Merge tag 'meson-clk-for-v4.16-3' of git://github.com/BayLibre/clk-meson into...	Stephen Boyd	1	-1/+1
2017-12-28	clk: meson-axg: make local symbol axg_gp0_params_table static	weiyongjun (A)	1	-1/+1
2017-12-28	clk: meson-axg: fix return value check in axg_clkc_probe()	weiyongjun (A)	1	-1/+1
2017-12-24	clk: meson: mpll: use 64-bit maths in params_from_rate	Martin Blumenstingl	1	-1/+1
2017-12-14	clk: meson-axg: add clock controller drivers	Qiufang Dai	4	-0/+1071
2017-12-14	clk: meson: make the spinlock naming more specific	Yixun Lan	3	-69/+69
2017-12-08	clk: meson: gxbb: remove IGNORE_UNUSED from mmc clocks	Jerome Brunet	1	-13/+3
2017-11-27	clk: meson: gxbb: fix wrong clock for SARADC/SANA	Yixun Lan	1	-2/+2
2017-10-20	clk: meson: gxbb: Add VPU and VAPB clocks data	Neil Armstrong	1	-0/+292
2017-10-20	clk: meson: gxbb: Add VPU and VAPB clockids	Neil Armstrong	1	-1/+5
2017-08-24	Merge tag 'meson-clk-for-4.14' of git://github.com/baylibre/clk-meson into cl...	Stephen Boyd	10	-251/+685
2017-08-04	clk: meson: gxbb-aoclk: Add CEC 32k clock	Neil Armstrong	4	-2/+231
2017-08-04	clk: meson: gxbb-aoclk: Switch to regmap for register access	Neil Armstrong	4	-23/+95
2017-08-04	clk: meson: gxbb: Add sd_emmc clk0 clocks	Jerome Brunet	1	-0/+177
2017-08-04	clk: meson: gxbb: fix clk_mclk_i958 divider flags	Jerome Brunet	1	-3/+4
2017-08-04	clk: meson: gxbb: fix meson cts_amclk divider flags	Jerome Brunet	1	-1/+2
2017-08-04	clk: meson: meson8b: register the built-in reset controller	Martin Blumenstingl	3	-13/+156
2017-08-04	clk: meson: gxbb: Add sd_emmc clk0 clkids	Jerome Brunet	1	-2/+8
2017-08-04	clk: meson-gxbb: expose almost every clock in the bindings	Jerome Brunet	1	-110/+7
2017-08-04	clk: meson8b: expose every clock in the bindings	Jerome Brunet	1	-99/+4
2017-08-04	clk: meson: gxbb: fix protection against undefined clks	Jerome Brunet	1	-0/+2
2017-08-04	clk: meson: meson8b: fix protection against undefined clks	Jerome Brunet	1	-0/+1
2017-08-01	clk: meson: mpll: fix mpll0 fractional part ignored	Jerome Brunet	4	-0/+18
2017-06-17	Merge tag 'meson-clk-for-4.13-2' of git://github.com/BayLibre/clk-meson into ...	Stephen Boyd	4	-19/+25
2017-06-16	clk: meson: gxbb: add all clk81 parents	Jerome Brunet	1	-5/+8
2017-06-16	Merge branch 'next/headers' into next/drivers	Jerome Brunet	1	-10/+10
2017-06-12	clk: meson: meson8b: add compatibles for Meson8 and Meson8m2	Martin Blumenstingl	2	-4/+7
2017-06-12	clk: meson8b: export the ethernet gate clock	Martin Blumenstingl	1	-1/+1
2017-06-12	clk: meson8b: export the USB clocks	Martin Blumenstingl	1	-5/+5
2017-06-12	clk: meson8b: export the gate clock for the HW random number generator	Martin Blumenstingl	1	-1/+1