Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2017-03-27 | clk: meson8b: add the mplls clocks 0, 1 and 2 | Jerome Brunet | 1 | -1/+19 |
2016-09-02 | meson: clk: Add support for clock gates | Alexander Müller | 1 | -0/+5 |
2016-09-02 | clk: meson: Copy meson8b CLKID defines to private header file | Alexander Müller | 1 | -0/+107 |
2016-09-02 | meson: clk: Rename register names according to Amlogic datasheet | Alexander Müller | 1 | -6/+5 |
2016-09-02 | meson: clk: Move register definitions to meson8b.h | Alexander Müller | 1 | -0/+40 |