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path: root/drivers/clk/clk-xgene.c
AgeCommit message (Expand)AuthorFilesLines
2016-03-03clk: xgene: Add missing parenthesis when clearing divider valueLoc Ho1-2/+2
2016-01-29clk: xgene: Remove return from void functionStephen Boyd1-1/+1
2016-01-29clk: xgene: Add SoC and PMD PLL clocks with v2 hardwareLoc Ho1-37/+66
2015-11-20clk: xgene: Fix divider with non-zero shift valueLoc Ho1-1/+2
2015-10-16clk: xgene: Remove unused setup.h includeStephen Boyd1-1/+0
2015-08-25clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw)Stephen Boyd1-11/+11
2015-07-07clk: xgene: Delete duplicated name fieldMatthias Brugger1-15/+13
2015-05-15clk: xgene: Silence sparse warningsStephen Boyd1-10/+12
2013-10-07clk: Add APM X-Gene SoC clock driverLoc Ho1-0/+521