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path: root/drivers/char/agp/intel-gtt.c
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2010-08-02agp/intel: Add actual definitions of the Sandybridge PTE caching bits.Zhenyu Wang1-1/+1
2010-08-02agp/intel: Support the extended physical addressing bits on Sandybridge.Zhenyu Wang1-0/+43
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> [anholt: Split this patch out of a larger patch for Sandybridge fixes] Signed-off-by: Eric Anholt <eric@anholt.net>
2010-08-02intel_agp: Don't oops with zero stolen memoryOndrej Zary1-0/+14
When "onboard video memory" is set do "disabled" in BIOS on Asus P4P800-VM board (i865G), kernel oopses with memory corruption: https://bugs.freedesktop.org/show_bug.cgi?id=28430 Fix that by cleanly aborting the initialization. Signed-off-by: Ondrej Zary <linux@rainbow-software.org> Signed-off-by: Eric Anholt <eric@anholt.net>
2010-07-26agp/intel: Use the correct mask to detect i830 aperture size.Tim Gardner1-5/+8
BugLink: https://bugs.launchpad.net/bugs/597075 commit f1befe71fa7a79ab733011b045639d8d809924ad introduced a regression when detecting aperture size of some i915 adapters, e.g., those on the Intel Q35 chipset. The original report: https://bugzilla.kernel.org/show_bug.cgi?id=15733 The regression report: https://bugzilla.kernel.org/show_bug.cgi?id=16294 According to the specification found at http://intellinuxgraphics.org/VOL_1_graphics_core.pdf, the PCI config space register I830_GMCH_CTRL is a mirror of GMCH Graphics Control. The correct macro for isolating the aperture size bits is therefore I830_GMCH_GMS_MASK along with the attendant changes to the case statement. Signed-off-by: Tim Gardner <tim.gardner@canonical.com> Tested-by: Kees Cook <kees.cook@canonical.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Eric Anholt <eric@anholt.net> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
2010-05-27agp/intel: Restrict GTT mapping to valid range on i915 and i945Chris Wilson1-7/+39
References: Bug 15733 - Crash when accessing nonexistent GTT entries in i915 https://bugzilla.kernel.org/show_bug.cgi?id=15733 On G33 and above, the size of the GTT space is determined by the GMCH control register. Prior to this revision, the size is determined by the size of the aperture. So we must careful to map and fill the appropriate range depending on chipset. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
2010-04-19agp/intel-gtt: kill previous_size assignmentsDaniel Vetter1-8/+5
Not needed for the GTT and inconsistent: Sometimes the _new_ size was stored there ... Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Eric Anholt <eric@anholt.net>
2010-04-19agp/intel-gtt: kill intel_i830_tlbflushDaniel Vetter1-16/+0
We don't use the generic insert/remove_memory functions that require this. So kill this useless code. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Eric Anholt <eric@anholt.net>
2010-04-19agp/intel: split out the GTT supportDaniel Vetter1-0/+1535
intel-agp.c contains actually two different drivers: An agp driver for _physical_ agp slots an the gtt driver that is used by the intel drm modules. Split them to prevent any further confusion. This patch just moves the code and includes intel-gtt.c in intel-agp.c Later patches will untangle these two drivers further. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Eric Anholt <eric@anholt.net>