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path: root/drivers/char/agp/intel-agp.h
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2013-01-03drm/i915: add Ivy Bridge GT2 Server entriesEugeni Dodonov1-0/+1
commit cc22a938fc1db0c8ef5e693a69b159c4b851dab3 upstream. This adds PCI ID for IVB GT2 server variant which we were missing. Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com> [danvet: fix up conflict because the patch has been diffed against next. tsk.] Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
2012-06-20char/agp: add another Ironlake host bridgeEugeni Dodonov1-0/+1
commit 67384fe3fd450536342330f684ea1f7dcaef8130 upstream. This seems to come on Gigabyte H55M-S2V and was discovered through the https://bugs.freedesktop.org/show_bug.cgi?id=50381 debugging. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=50381 Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
2011-07-13agp/intel: Fix typo in G4x_GMCH_SIZE_VT_2MChris Wilson1-3/+4
Konstantin Belousov found an error in the define of G4x_GMCH_SIZE_VT_2M relative to the GMCH specs, and confirmed that indeed one of his users with a Q45 reports 0xb not 0xc for a 2/2MiB GATT. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Konstantin Belousov <kostikbel@gmail.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-05-14agp/intel: add Ivy Bridge supportJesse Barnes1-0/+8
Just use the Sandy Bridge routines. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
2011-02-22agp/intel: Experiment with a 855GM GWB bitChris Wilson1-0/+1
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=27187 Tested-by: Thorsten Vollmer <thorsten@thvo.de> (DFI-ACP G5M150-N w/852GME) Tested-by: Moritz Brunner <2points@gmx.org> (Asus M2400N/i855GM) Tested-by: Indan Zupancic <indan@nul.nu> (Thinkpad X40/855GM rev 02) Tested-by: Eric Anholt <eric@anholt.net> (865G) Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-11agp/intel: Flush the chipset write buffers when changing GTT baseChris Wilson1-0/+2
Flush the chipset write buffers before and after adjusting the GTT base register, just in case. We only modify this value upon initialisation (boot and resume) so there should be no outstanding writes, however there are always those persistent PGTBL_ER that keep getting reported upon resume. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-28intel-gtt: maximize ggtt size on platforms that support thisDaniel Vetter1-3/+11
On VT-d supporting platforms the GGTT is allocated in a stolen mem section separate from graphcis stolen mem. The GMCH register contains a bitfield specifying the size of that region. Docs suggest that this region can only be used for GGTT and PPGTT. Hence ensure that the PPGTT is disabled and use the complete area for the GGTT. Unfortunately the graphics core on G33/Pineview can't cope with really large GTTs and the BIOS usually enables the maximum of 512MB. So don't bother with maximizing the GTT on these platforms. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-21Merge branch 'drm-intel-fixes' into HEADChris Wilson1-0/+2
Conflicts: drivers/char/agp/intel-agp.c drivers/gpu/drm/i915/intel_crt.c
2010-09-17drm/i915,agp/intel: Add second set of PCI-IDs for B43Chris Wilson1-0/+2
There is a second revision of B43 (a desktop gen4 part) floating around, functionally equivalent to the original B43, so simply add the new PCI-IDs. Bugzilla: https://bugs.freedesktop.org/show_bugs.cgi?id=30221 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: stable@kernel.org
2010-09-09intel-gtt: introduce intel_gtt_driverDaniel Vetter1-40/+0
Same idea as INTEL_INFO from drm/i915. This - reduces the dependancy on agp_driver - stops the what-does-IS_I965G-mean confusion (here it's just gen4, in drm/i915 it's gen >=4) - further prepares the separation of the fake agp driver from the rest. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-09agp/intel: make intel-gtt.c into a real source fileDaniel Vetter1-0/+3
Now that the disentangling is complete, stop including intel-gtt.c from intel-agp.c. The linux build system _really_ doesn't allow .c source files with the same name as the module. It fails with the following message when trying to build such a bugger: make[3]: Circular drivers/char/agp/intel-agp.o <- drivers/char/agp/intel-agp.o dependency dropped. Instead of renameing intel-agp.c I've simply created a new module out of intel-gtt.c. Renaming intel-agp.ko to something else is not an option for it will surely kill someones boot process. This also paves the way to use the gtt code without loading the agp driver. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-07intel_agp,i915: Add more sandybridge graphics device idsZhenyu Wang1-6/+12
New pci ids for GT2 and GT2+ on desktop and mobile sandybridge, and graphics device ids for server sandybridge. Also rename original ids string to reflect GT1 version. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Cc: stable@kernel.org Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-07agp/intel: use #ifdef idiom for intel-agp.hZhenyu Wang1-0/+4
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Cc: stable@kernel.org Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-08-22drm/i915,intel_agp: Add support for Sandybridge D0Zhenyu Wang1-0/+1
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2010-08-02agp/intel: Add actual definitions of the Sandybridge PTE caching bits.Zhenyu Wang1-0/+6
2010-04-19agp/intel: introduce intel-agp.h header fileDaniel Vetter1-0/+239
Intel definitions have spilled into agp.h. Create a header file for them and also include it in efficion-agp.c 'cause it needs a few of them. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Eric Anholt <eric@anholt.net>
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