summaryrefslogtreecommitdiff
path: root/arch
AgeCommit message (Collapse)AuthorFilesLines
2025-10-27arm64: dts: qcom: sm8650: set ufs as dma coherentNeil Armstrong1-0/+2
The UFS device is ovbiously dma coherent like the other IOMMU devices like usb, mmc, ... let's fix this by adding the flag. To be sure an extensive test has been performed to be sure it's safe, as downstream uses this flag for UFS as well. As an experiment, I checked how the dma-coherent could impact the UFS bandwidth, and it happens the max bandwidth on cached write is slighly highter (up to 10%) while using less cpu time since cache sync/flush is skipped. Fixes: 10e024671295 ("arm64: dts: qcom: sm8650: add interconnect dependent device nodes") Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251007-topic-sm8650-upstream-ufs-dma-coherent-v1-1-f3cfeaee04ce@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: sm7325-nothing-spacewar: Use correct compatible for audioccLuca Weiss1-0/+5
Use the correct compatible for this phone with standard Qualcomm firmware and remove references to power-domains from a 'reserved' node. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250930-sc7280-dts-misc-v1-5-5a45923ef705@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: qcm6490-shift-otter: Use correct compatible for audioccLuca Weiss1-0/+5
Use the correct compatible for this phone with standard Qualcomm firmware and remove references to power-domains from a 'reserved' node. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250930-sc7280-dts-misc-v1-4-5a45923ef705@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: qcm6490-fairphone-fp5: Use correct compatible for audioccLuca Weiss1-0/+5
Use the correct compatible for this phone with standard Qualcomm firmware and remove references to power-domains from a 'reserved' node. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250930-sc7280-dts-misc-v1-3-5a45923ef705@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: qcm6490-fairphone-fp5: Add VTOF_LDO_2P8 regulatorLuca Weiss1-0/+13
Describe yet another regulator-fixed on this board, powering the ToF sensor. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20250930-sc7280-dts-misc-v1-2-5a45923ef705@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: qcm6490-fairphone-fp5: Add supplies to simple-fb nodeLuca Weiss1-0/+2
Add the OLED power supplies to the simple-framebuffer node, so that the regulators don't get turned off while the simple-fb is being used. Fixes: c365a026155c ("arm64: dts: qcom: qcm6490-fairphone-fp5: Enable display") Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250930-sc7280-dts-misc-v1-1-5a45923ef705@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: sm8250: Add MDSS_CORE reset to mdssLuca Weiss1-0/+2
Like on other platforms, if the OS does not support recovering the state left by the bootloader it needs access to MDSS_CORE, so that it can clear the MDSS configuration. Add a reference to the relevant reset. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Tested-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> # RB5 Link: https://lore.kernel.org/r/20250930-sm8250-mdss-reset-v1-1-a64522d91f12@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: qcs6490: Introduce Radxa Dragon Q6AXilin Wu2-0/+1096
Radxa Dragon Q6A is a single board computer, based on the Qualcomm QCS6490 platform. Features enabled and working: - Configurable I2C/SPI/UART from 40-Pin GPIO - Three USB-A 2.0 ports - RTL8111K Ethernet connected to PCIe0 - eMMC module - SD card - M.2 M-Key 2230 PCIe 3.0 x2 - Headphone jack - Onboard thermal sensors - QSPI controller for updating boot firmware - ADSP remoteproc (Type-C and charging features disabled in firmware) - CDSP remoteproc (for AI applications using QNN) - Venus video encode and decode accelerator Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Xilin Wu <sophon@radxa.com> Link: https://lore.kernel.org/r/20250929-radxa-dragon-q6a-v5-2-aa96ffc352f8@radxa.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: x1e80100-asus-zenbook-a14: Enable WiFi, BluetoothAleksandrs Vinarskis1-0/+94
Unlike UX3407QA with WCN6855, UX3407RA comes with WCN7850. Definitions were not added during initial bringup due to lack of hardware to test it. Add missing definitions that were now confirmed to work. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Aleksandrs Vinarskis <alex@vinarskis.com> Link: https://lore.kernel.org/r/20250927-zenbook-improvements-v3-3-d46c7368dc70@vinarskis.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: Rework X1-based Asus Zenbook A14's displaysAleksandrs Vinarskis6-132/+218
The laptop comes in two variants: * UX3407RA, higher end, FHD+ OLED or WOXGA+ OLED panels * UX3407QA, lower end, FHD+ OLED or FHD+ LCD panels Even though all three panels work with "edp-panel", unfortunately the brightness adjustmenet of LCD panel is PWM based, requiring a dedicated device-tree. Convert "x1p42100-asus-zenbook-a14.dts" into ".dtsi" to allow for this split, introduce new LCD variant. Leave current variant without postfix and with the unchanged model name, as some distros (eg. Ubuntu) rely on this for automatic device-tree detection during kernel installation/upgrade. As dedicated device-tree is required, update compatibles of OLED variants to correct ones. Keep "edp-panel" as fallback, since it is enough to make the panels work. While at it moving .dts, .dtsi around, drop 'model' from the top level x1-asus-zenbook-a14.dtsi as well. Co-developed-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz> Signed-off-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Aleksandrs Vinarskis <alex@vinarskis.com> Link: https://lore.kernel.org/r/20250927-zenbook-improvements-v3-2-d46c7368dc70@vinarskis.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: sdm845-oneplus: Correct gpio used for sliderGergo Koteles1-2/+2
The previous GPIO numbers were wrong. Update them to the correct ones and fix the label. Fixes: 288ef8a42612 ("arm64: dts: sdm845: add oneplus6/6t devices") Signed-off-by: Gergo Koteles <soyer@irl.hu> Signed-off-by: David Heidelberg <david@ixit.cz> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250927-slider-correct-v1-1-fb8cc7fdcedf@ixit.cz Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: sdm845-starqltechn: fix max77705 interruptsDzmitry Sankouski1-5/+7
Since max77705 has a register, which indicates interrupt source, it acts as an interrupt controller. Direct MAX77705's subdevices to use the IC's internal interrupt controller, instead of listening to every interrupt fired by the chip towards the host device. Fixes: 7a88a931d095 ("arm64: dts: qcom: sdm845-starqltechn: add max77705 PMIC") Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250926-starqltechn-correct_max77705_nodes-v5-2-c6ab35165534@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: sdm845-starqltechn: remove (address|size)-cellsDzmitry Sankouski1-2/+0
Drop the unused address/size-cells properties to silence the DT checker warning: pmic@66 (maxim,max77705): '#address-cells', '#size-cells' do not match any of the regexes: '^pinctrl-[0-9]+$' Fixes: 7a88a931d095 ("arm64: dts: qcom: sdm845-starqltechn: add max77705 PMIC") Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250926-starqltechn-correct_max77705_nodes-v5-1-c6ab35165534@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27genirq: Update request_percpu_nmi() to take an affinityMarc Zyngier1-1/+1
Continue spreading the notion of affinity to the per CPU interrupt request code by updating the call sites that use request_percpu_nmi() (all two of them) to take an affinity pointer. This pointer is firmly NULL for now. Signed-off-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Will Deacon <will@kernel.org> Link: https://patch.msgid.link/20251020122944.3074811-16-maz@kernel.org
2025-10-27x86/microcode/AMD: Limit Entrysign signature checking to known generationsBorislav Petkov (AMD)1-1/+19
Limit Entrysign sha256 signature checking to CPUs in the range Zen1-Zen5. X86_BUG cannot be used here because the loading on the BSP happens way too early, before the cpufeatures machinery has been set up. Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://patch.msgid.link/all/20251023124629.5385-1-bp@kernel.org
2025-10-27arm64: dts: qcom: qcm6490-fairphone-fp5: Add vibrator supportGriffin Kroah-Hartman1-1/+17
Add the required node for haptic playback (Awinic AW86927). Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Griffin Kroah-Hartman <griffin.kroah@fairphone.com> Link: https://lore.kernel.org/r/20250925-aw86927-v3-3-1fc6265b42de@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: monaco-evk: Add firmware-name to QUPv3 nodesViken Dadhaniya1-0/+2
Traditionally, firmware loading for Serial Engines (SE) in the QUP hardware of Qualcomm SoCs has been managed by TrustZone (TZ). While this approach ensures secure SE assignment and access control, it limits flexibility for developers who need to enable various protocols on different SEs. Add the firmware-name property to QUPv3 nodes in the device tree to enable firmware loading from the Linux environment. Handle SE assignments and access control permissions directly within Linux, removing the dependency on TrustZone. Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250925042605.1388951-1-viken.dadhaniya@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: lemans-evk: Add firmware-name to QUPv3 nodesViken Dadhaniya1-0/+3
Traditionally, firmware loading for Serial Engines (SE) in the QUP hardware of Qualcomm SoCs has been managed by TrustZone (TZ). While this approach ensures secure SE assignment and access control, it limits flexibility for developers who need to enable various protocols on different SEs. Add the firmware-name property to QUPv3 nodes in the device tree to enable firmware loading from the Linux environment. Handle SE assignments and access control permissions directly within Linux, removing the dependency on TrustZone. Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Acked-by: Mukesh Kumar Savaliya <mukesh.savaliya@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250924035409.3976652-1-viken.dadhaniya@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: qcs6490-rb3gen2: Add firmware-name to QUPv3 nodesViken Dadhaniya1-0/+2
Traditionally, firmware loading for Serial Engines (SE) in the QUP hardware of Qualcomm SoCs has been managed by TrustZone (TZ). While this approach ensures secure SE assignment and access control, it limits flexibility for developers who need to enable various protocols on different SEs. Add the firmware-name property to QUPv3 nodes in the device tree to enable firmware loading from the Linux environment. Handle SE assignments and access control permissions directly within Linux, removing the dependency on TrustZone. Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250923161107.3541698-1-viken.dadhaniya@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: msm8916-longcheer-l8910: Add touchscreenJonathan Albrieux1-0/+46
The BQ Aquaris X5 (Longcheer L8910) has a Himax HX852x-ES touchscreen, which can now be described with the bindings recently added to linux-next. Add it to the device tree to allow using the touchscreen. Signed-off-by: Jonathan Albrieux <jonathan.albrieux@gmail.com> Co-developed-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250919-msm8916-l8910-touchscreen-v1-1-c46e56ec0a3b@gerhold.net Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: qcs6490-rb3gen2: Update regulator settingsRakesh Kota1-49/+9
Update min/max voltage settings for regulators below to align with the HW specification vreg_l3b_0p504 vreg_l6b_1p2 vreg_l11b_1p504 vreg_l14b_1p08 vreg_l16b_1p1 vreg_l17b_1p7 vreg_s1c_2p19 vreg_l8c_1p62 vreg_l9c_2p96 vreg_l12c_1p65. While at it, remove RPMH regulator rails (listed below) as these are not to be used on APPS, and any client accidently voting on it can potentially cause issues. vreg_s2b_0p876 vreg_s2c_0p752 vreg_s5c_0p752 vreg_s7c_0p752 vreg_s10c_0p752 vreg_l4b_0p752 vreg_l5b_0p752. Signed-off-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250919-b4-rb3gen2-update-regulator-v1-1-1ea9e70d01cb@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: sm6350: Add MDSS_CORE reset to mdssLuca Weiss1-0/+2
Like on other platforms, if the OS does not support recovering the state left by the bootloader it needs access to MDSS_CORE, so that it can clear the MDSS configuration. Add a reference to the relevant reset. This also fixes display init on Linux v6.17. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250919-sm6350-mdss-reset-v1-3-48dcac917c73@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27um: Enable SMP support on x86Tiwei Bie2-0/+11
Implement spinlock support for SMP on UML/x86, leveraging x86's spinlock implementation. In addition, to support SMP on CPUs that do not support CX8, some additional work is required. However, considering that such CPUs are already very outdated, and x86 is also removing support for them [1], let's enable SMP support only on CPUs that support CX8. [1] https://lore.kernel.org/lkml/20250515085708.2510123-1-mingo@kernel.org/ Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Link: https://patch.msgid.link/20251027001815.1666872-9-tiwei.bie@linux.dev Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-10-27um: vdso: Remove getcpu support on x86Tiwei Bie2-24/+0
We are going to support SMP on UML/x86, so we can't hard code the CPU and NUMA node in __vdso_getcpu() anymore. Let's just remove it and let applications fall back to the syscall. Suggested-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Link: https://patch.msgid.link/20251027001815.1666872-7-tiwei.bie@linux.dev Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-10-27um: Add initial SMP supportTiwei Bie28-47/+765
Add initial symmetric multi-processing (SMP) support to UML. With this support enabled, users can tell UML to start multiple virtual processors, each represented as a separate host thread. In UML, kthreads and normal threads (when running in kernel mode) can be scheduled and executed simultaneously on different virtual processors. However, the userspace code of normal threads still runs within their respective single-threaded stubs. That is, SMP support is currently available both within the kernel and across different processes, but still remains limited within threads of the same process in userspace. Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Link: https://patch.msgid.link/20251027001815.1666872-6-tiwei.bie@linux.dev Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-10-27um: Define timers on a per-CPU basisTiwei Bie6-31/+69
Define timers on a per-CPU basis to enable each CPU to have its own timer. This is a preparation for adding SMP support. Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Link: https://patch.msgid.link/20251027001815.1666872-5-tiwei.bie@linux.dev Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-10-27um: Determine sleep based on need_resched()Tiwei Bie5-6/+26
With SMP and NO_HZ enabled, the CPU may still need to sleep even if the timer is disarmed. Switch to deciding whether to sleep based on pending resched. Additionally, because disabling IRQs does not block SIGALRM, it is also necessary to check for any pending timer alarms. This is a preparation for adding SMP support. Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Link: https://patch.msgid.link/20251027001815.1666872-4-tiwei.bie@linux.dev Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-10-27um: Turn signals_* into thread-local variablesTiwei Bie5-8/+13
Turn signals_enabled, signals_pending and signals_active into thread-local variables. This enables us to control and track signals independently on each CPU thread. This is a preparation for adding SMP support. Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Link: https://patch.msgid.link/20251027001815.1666872-3-tiwei.bie@linux.dev Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-10-27um: Do not disable kmalloc in initial_thread_cb()Tiwei Bie1-4/+0
Currently, initial_thread_cb() temporarily disables kmalloc when it invokes the callback, allowing the callback to bypass kmalloc. This is unnecessary for the current users of initial_thread_cb(), and we should avoid memory allocations that are not under the control of the UML kernel. Therefore, let's stop temporarily disabling kmalloc in initial_thread_cb(). Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Link: https://patch.msgid.link/20251027001815.1666872-2-tiwei.bie@linux.dev Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-10-27um: Remove file-based iomem emulation supportTiwei Bie11-293/+4
The file-based iomem emulation was introduced to support writing paravirtualized drivers based on emulated iomem regions. However, the only driver that makes use of it is an example driver called mmapper, which was written over two decades ago. We now have several modern device emulation mechanisms, such as vhost-user-based virtio-uml. Remove the file-based iomem emulation support to reduce the maintenance burden. Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Link: https://patch.msgid.link/20251027054519.1996090-5-tiwei.bie@linux.dev Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-10-27um: Replace UML_ROUND_UP() with PAGE_ALIGN()Tiwei Bie3-7/+3
Although UML_ROUND_UP() is defined in a shared header file, it depends on the PAGE_SIZE and PAGE_MASK macros, so it can only be used in kernel code. Considering its name is not very clear and its functionality is the same as PAGE_ALIGN(), replace its usages with a direct call to PAGE_ALIGN() and remove it. Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Link: https://patch.msgid.link/20251027054519.1996090-4-tiwei.bie@linux.dev Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-10-27um: Use PAGE_ALIGN() for address alignmentTiwei Bie1-6/+3
Use PAGE_ALIGN() instead of open-coded calculations. Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Link: https://patch.msgid.link/20251027054519.1996090-3-tiwei.bie@linux.dev Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-10-27um: Make host_task_size a local variableTiwei Bie2-3/+1
Currently, host_task_size is a global variable, but it is only used in linux_main() to compute stub_start and task_size. Make it a local variable to limit its scope to where it is actually needed. Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Link: https://patch.msgid.link/20251027054519.1996090-2-tiwei.bie@linux.dev Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-10-27arm64: dts: qcom: qcs8300-pmics: Remove 'allow-set-time' propertyTingguo Cheng1-1/+0
Remove the 'allow-set-time' property from the rtc node because APPS is prohibited from setting the hardware RTC time. Signed-off-by: Tingguo Cheng <tingguo.cheng@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250926-remove-rtc-allow-set-time-v1-1-76895a666939@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: rename sm6150 to talosDmitry Baryshkov2-1/+1
SM6150 and QCS615 are two names for the same die, collectively known as 'talos'. Follow the example of other platforms and rename SM6150 to talos.dtsi. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250923-rename-dts-v1-3-21888b68c781@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: rename x1e80100 to hamoaDmitry Baryshkov21-29/+29
The X1E80100 and several other similar names (X1E78100, X1E001DE) all belong to the platform now known as 'hamoa'. Follow the example of 'lemans' and rename the x1e80100.dtsi to hamoa.dtsi and x1e80100-pmics.dtsi to hamoa-pmics.dtsi. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250923-rename-dts-v1-2-21888b68c781@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: rename qcs8300 to monacoDmitry Baryshkov4-4/+4
The QCS8300 and QCS8275 are two variants of the same die with no difference visible to the Linux kernel, which are collectively named as 'monaco'. Rather than trying to using the name, which is not always relevant, follow the example of 'lemans' and rename qcs8300.dtsi to monaco.dtsi (and qcs8300-pmics.dtsi to monaco-pmics.dtsi). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250923-rename-dts-v1-1-21888b68c781@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: sm6375: add refgen regulatorDmitry Baryshkov1-0/+6
Add the refgen regulator block. It should be used for DSI controllers once they are added. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250921-refgen-v1-14-9d93e64133ea@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: sc8280xp: add refgen regulatorDmitry Baryshkov1-0/+6
Add the refgen regulator block. It should be used for DSI controllers once they are added. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250921-refgen-v1-13-9d93e64133ea@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: qcs8300: add refgen regulatorDmitry Baryshkov1-0/+7
Add the refgen regulator block. It should be used for DSI controllers once they are added. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250921-refgen-v1-12-9d93e64133ea@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: sm8250: add refgen regulator and use it for DSIDmitry Baryshkov1-0/+9
Add the refgen regulator block and use it for the DSI controller. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250921-refgen-v1-11-9d93e64133ea@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: sm8150: add refgen regulator and use it for DSIDmitry Baryshkov1-0/+10
Add the refgen regulator block and use it for the DSI controller. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250921-refgen-v1-10-9d93e64133ea@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: sm6350: add refgen regulator and use it for DSIDmitry Baryshkov1-0/+8
Add the refgen regulator block and use it for the DSI controller. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20250921-refgen-v1-9-9d93e64133ea@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: sdm845: add refgen regulator and use it for DSIDmitry Baryshkov1-0/+9
Add the refgen regulator block and use it for the DSI controllers. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250921-refgen-v1-8-9d93e64133ea@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: sdm670: add refgen regulator and use it for DSIDmitry Baryshkov1-0/+10
Add the refgen regulator block and use it for the DSI controllers. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250921-refgen-v1-7-9d93e64133ea@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: sc8180x: add refgen regulator and use it for DSIDmitry Baryshkov1-0/+10
Add the refgen regulator block and use it for the DSI controllers. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250921-refgen-v1-6-9d93e64133ea@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: sc7280: add refgen regulator and use it for DSIDmitry Baryshkov1-0/+8
Add the refgen regulator block and use it for the DSI controller. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250921-refgen-v1-5-9d93e64133ea@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: sc7180: add refgen regulator and use it for DSIDmitry Baryshkov1-0/+8
Add the refgen regulator block and use it for the DSI controller. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250921-refgen-v1-4-9d93e64133ea@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: lemans: add refgen regulator and use it for DSIDmitry Baryshkov1-0/+10
Add the refgen regulator block and use it for the DSI controllers. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250921-refgen-v1-3-9d93e64133ea@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-27arm64: dts: qcom: lemans: move USB PHYs to a proper placeDmitry Baryshkov1-50/+50
Sort the lemans.dtsi, moving USB1 and USB2 PHYs to a proper place, making the DT file sorted by the address. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250921-refgen-v1-2-9d93e64133ea@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
generated by cgit v1.2.3 (git 2.39.0) at 2026-06-06 21:14:52 +0300