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2025-10-29powerpc: Convert to physical address DMA mappingLeon Romanovsky6-53/+60
Adapt PowerPC DMA to use physical addresses in order to prepare code to removal .map_page and .unmap_page. Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Link: https://lore.kernel.org/r/20251015-remove-map-page-v5-10-3bbfe3a25cdf@kernel.org
2025-10-29MIPS/jazzdma: Provide physical address directlyLeon Romanovsky1-7/+13
MIPS jazz uses physical addresses for mapping pages, so convert it to get them directly from DMA mapping routine. Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Link: https://lore.kernel.org/r/20251015-remove-map-page-v5-8-3bbfe3a25cdf@kernel.org
2025-10-29alpha: Convert mapping routine to rely on physical addressLeon Romanovsky1-27/+21
Alpha doesn't need struct *page and can perform mapping based on physical addresses. So convert it to implement new .map_phys callback. As part of this change, remove useless BUG_ON() as DMA mapping layer ensures that right direction is provided. Tested-by: Magnus Lindholm <linmag7@gmail.com> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Link: https://lore.kernel.org/r/20251015-remove-map-page-v5-7-3bbfe3a25cdf@kernel.org
2025-10-29ARM: dma-mapping: Switch to physical address mapping callbacksLeon Romanovsky1-77/+23
Combine resource and page mappings routines to one function, which handles both these flows at the same manner. This conversion allows us to remove .map_resource/.unmap_resource callbacks completely. Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Link: https://lore.kernel.org/r/20251015-remove-map-page-v5-4-3bbfe3a25cdf@kernel.org
2025-10-29ARM: dma-mapping: Reduce struct page exposure in arch_sync_dma*()Leon Romanovsky1-51/+31
As a preparation to changing from .map_page to use .map_phys DMA callbacks, convert arch_sync_dma*() functions to use physical addresses instead of struct page. Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Link: https://lore.kernel.org/r/20251015-remove-map-page-v5-3-3bbfe3a25cdf@kernel.org
2025-10-29Merge branch 'linus/master' into sched/core, to resolve conflictPeter Zijlstra165-643/+790
Conflicts: kernel/sched/ext.c Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Ingo Molnar <mingo@kernel.org>
2025-10-29arm64: dts: ti: k3-am62: Add RNG nodeShiva Tripathi2-0/+20
Add EIP76 Random Number Generator (RNG) node within crypto engine for AM62 and AM62A SoCs. The RNG hardware is integrated in crypto subsystem at address 0x40910000. Mark the RNG node with status "reserved" as it is intended for use by OP-TEE for secure random number generation. If required, this hardware can also be used through Linux kernel by enabling this node. Signed-off-by: Shiva Tripathi <s-tripathi1@ti.com> Link: https://patch.msgid.link/20250926100229.923547-1-s-tripathi1@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-10-29arm64: dts: qcom: ipq5424: Add NSS clock controller nodeLuo Jie1-1/+31
NSS clock controller provides the clocks and resets to the networking hardware blocks on the IPQ5424, such as PPE (Packet Process Engine) and UNIPHY (PCS) blocks. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Luo Jie <quic_luoj@quicinc.com> Link: https://lore.kernel.org/r/20251014-qcom_ipq5424_nsscc-v7-9-081f4956be02@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-10-28x86/build: Disable SSE4aPeter Zijlstra1-1/+1
Leyvi Rose reported that his X86_NATIVE_CPU=y build is failing because our instruction decoder doesn't support SSE4a and the AMDGPU code seems to be generating those with his compiler of choice (CLANG+LTO). Now, our normal build flags disable SSE MMX SSE2 3DNOW AVX, but then CC_FLAGS_FPU re-enable SSE SSE2. Since nothing mentions SSE3 or SSE4, I'm assuming that -msse (or its negative) control all SSE variants -- but why then explicitly enumerate SSE2 ? Anyway, until the instruction decoder gets fixed, explicitly disallow SSE4a (an AMD specific SSE4 extension). Fixes: ea1dcca1de12 ("x86/kbuild/64: Add the CONFIG_X86_NATIVE_CPU option to locally optimize the kernel with '-march=native'") Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Acked-by: Borislav Petkov (AMD) <bp@alien8.de> Acked-by: Arisu Tachibana <arisu.tachibana@miraclelinux.com> Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Cc: <stable@kernel.org>
2025-10-28x86/fpu: Ensure XFD state on signal deliveryChang S. Bae1-0/+3
Sean reported [1] the following splat when running KVM tests: WARNING: CPU: 232 PID: 15391 at xfd_validate_state+0x65/0x70 Call Trace: <TASK> fpu__clear_user_states+0x9c/0x100 arch_do_signal_or_restart+0x142/0x210 exit_to_user_mode_loop+0x55/0x100 do_syscall_64+0x205/0x2c0 entry_SYSCALL_64_after_hwframe+0x4b/0x53 Chao further identified [2] a reproducible scenario involving signal delivery: a non-AMX task is preempted by an AMX-enabled task which modifies the XFD MSR. When the non-AMX task resumes and reloads XSTATE with init values, a warning is triggered due to a mismatch between fpstate::xfd and the CPU's current XFD state. fpu__clear_user_states() does not currently re-synchronize the XFD state after such preemption. Invoke xfd_update_state() which detects and corrects the mismatch if there is a dynamic feature. This also benefits the sigreturn path, as fpu__restore_sig() may call fpu__clear_user_states() when the sigframe is inaccessible. [ dhansen: minor changelog munging ] Closes: https://lore.kernel.org/lkml/aDCo_SczQOUaB2rS@google.com [1] Fixes: 672365477ae8a ("x86/fpu: Update XFD state where required") Reported-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Reviewed-by: Chao Gao <chao.gao@intel.com> Tested-by: Chao Gao <chao.gao@intel.com> Link: https://lore.kernel.org/all/aDWbctO%2FRfTGiCg3@intel.com [2] Cc:stable@vger.kernel.org Link: https://patch.msgid.link/20250610001700.4097-1-chang.seok.bae%40intel.com
2025-10-28arm64: dts: allwinner: a523: Add SPDIF TX pin on PB and PI pinsChen-Yu Tsai1-0/+14
The SPDIF TX (called OWA OUT in the datasheet) is available on three pins. Of those, the PH pin is unlikely to be used since it conflicts with the first Ethernet controller. The Radxa Cubie A5E exposes SPDIF TX through the PI pin group on the 40-pin GPIO header. The Orange Pi 4A exposes SPDIF TX through both the PB and PI pin groups on the 40-pin GPIO header. The PB pin alternatively would be used for I2S0 though. Add pinmux settings for both options so potential users can directly reference either one. Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://patch.msgid.link/20251027125655.793277-10-wens@kernel.org Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
2025-10-28arm64: dts: allwinner: a523: Add I2S2 pins on PI pin groupChen-Yu Tsai1-0/+8
The Radxa Cubie A5E exposes I2S2 through the PI pin group on the 40-pin GPIO header. Add a pinmux setting for it so potential users can directly reference it. Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://patch.msgid.link/20251027125655.793277-9-wens@kernel.org Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
2025-10-28arm64: dts: allwinner: a523: Add device nodes for I2S controllersChen-Yu Tsai1-0/+56
The A523 family of SoCs have four I2S controllers capable of both playback and capture. The user manual also implies that I2S2 also outputs to the eDP interface controller. Add device nodes for all of them. Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://patch.msgid.link/20251027125655.793277-8-wens@kernel.org Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
2025-10-28arm64: dts: allwinner: a523: Add device node for SPDIF blockChen-Yu Tsai1-0/+15
The A523 has a SPDIF interface that is capable of both playback and capture. Add a node for it. Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://patch.msgid.link/20251027125655.793277-7-wens@kernel.org Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
2025-10-28arm64: dts: allwinner: a523: Add DMA controller device nodesChen-Yu Tsai1-0/+56
The A523 has two DMA controllers. Add device nodes for both. Also hook up DMA for existing devices. Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://patch.msgid.link/20251027125655.793277-6-wens@kernel.org Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
2025-10-28arm64: dts: allwinner: h616: add NAND controllerRichard Genoud1-0/+52
The H616 has a NAND controller quite similar to the A10/A23 ones, but with some register differences, more clocks (for ECC and MBUS), more ECC strengths, so this requires a new compatible string. Add the NAND controller node and pins in the device tree. Signed-off-by: Richard Genoud <richard.genoud@bootlin.com> Link: https://patch.msgid.link/20251028073534.526992-17-richard.genoud@bootlin.com [wens@kernel.org: Fixed alignment of clocks in nand-controller node] Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
2025-10-28x86/CPU/AMD: Add RDSEED fix for Zen5Gregory Price1-0/+10
There's an issue with RDSEED's 16-bit and 32-bit register output variants on Zen5 which return a random value of 0 "at a rate inconsistent with randomness while incorrectly signaling success (CF=1)". Search the web for AMD-SB-7055 for more detail. Add a fix glue which checks microcode revisions. [ bp: Add microcode revisions checking, rewrite. ] Cc: stable@vger.kernel.org Signed-off-by: Gregory Price <gourry@gourry.net> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/r/20251018024010.4112396-1-gourry@gourry.net
2025-10-28um: Avoid circular dependency on asm-offsets in pgtable.hThomas Weißschuh1-0/+2
Recent changes have added an include of as-layout.h to pgtable.h. However this introduces a circular dependency during asm-offsets generation as as-layout.h depends on asm-offsets and pgtable.h is an input for asm-offsets. Building from a clean state results in the following error: CC arch/um/kernel/asm-offsets.s In file included from arch/um/include/asm/pgtable.h:48, from include/linux/pgtable.h:6, from include/linux/mm.h:31, from include/linux/pid_namespace.h:7, from include/linux/ptrace.h:10, from include/linux/audit.h:13, from arch/um/kernel/asm-offsets.c:8: arch/um/include/shared/as-layout.h:9:10: fatal error: generated/asm-offsets.h: No such file or directory 9 | #include <generated/asm-offsets.h> | ^~~~~~~~~~~~~~~~~~~~~~~~~ compilation terminated. make[4]: *** [scripts/Makefile.build:182: arch/um/kernel/asm-offsets.s] Error 1 As the inclusion of as-layout.h in pgtable.h is not yet needed while asm-offsets are generated, break the dependency here. Fixes: a7f7dbae94a5 ("um: Remove file-based iomem emulation support") Signed-off-by: Thomas Weißschuh <linux@weissschuh.net> Reviewed-by: Tiwei Bie <tiwei.btw@antgroup.com> Link: https://patch.msgid.link/20251028-uml-offsets-circular-v1-1-601c363cfaaa@weissschuh.net Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2025-10-28riscv: dts: thead: Add PWM fan and thermal controlMichal Wilczynski1-0/+67
Add Device Tree nodes to enable a PWM controlled fan and it's associated thermal management for the Lichee Pi 4A board. This enables temperature-controlled active cooling for the Lichee Pi 4A board based on SoC temperature. Reviewed-by: Drew Fustini <fustini@kernel.org> Tested-by: Drew Fustini <fustini@kernel.org> Reviewed-by: Elle Rhumsaa <elle@weathered-steel.dev> Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com> Signed-off-by: Drew Fustini <fustini@kernel.org>
2025-10-28riscv: dts: thead: Add PWM controller nodeMichal Wilczynski1-0/+7
Add the Device Tree node for the T-HEAD TH1520 SoC's PWM controller. Reviewed-by: Drew Fustini <fustini@kernel.org> Tested-by: Drew Fustini <fustini@kernel.org> Reviewed-by: Elle Rhumsaa <elle@weathered-steel.dev> Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com> Signed-off-by: Drew Fustini <fustini@kernel.org>
2025-10-28arm64: dts: imx8mp-kontron: Fix USB OTG role switchingFrieder Schrempf1-5/+19
The VBUS supply regulator is currently assigned to the PHY node. This causes the VBUS to be always on, even when the controller needs to be switched to peripheral mode. Fix the OTG role switching by adding a connector node and moving the VBUS supply regulator to that node. This way the VBUS gets correctly switched according to the current role. Fixes: 946ab10e3f40 ("arm64: dts: Add support for Kontron OSM-S i.MX8MP SoM and BL carrier board") Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-10-28arm64: dts: layerscape: add dma-coherent for usb nodeFrank Li6-13/+32
Add SOC special compatible string, remove fallback snps,dwc3 to let flatten dwc3-layerscape driver to be probed and enable dma-coherence for usb node since commit add layerscape dwc3 support, which set correct gsbustcfg0 value. Add iommus property to run at old uboot, which use fixup add iommus by check compatible string snsp,dwc3 compatible string. Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-10-28arm64: dts: renesas: r8a77961: Add GX6250 GPU nodeMarek Vasut1-0/+17
Describe Imagination Technologies PowerVR Rogue GX6250 BNVC 4.45.2.58 present in Renesas R-Car R8A77961 M3-W+ SoC. Acked-by: Matt Coster <matt.coster@imgtec.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251022033847.471106-3-marek.vasut+renesas@mailbox.org Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-10-28arm64: dts: renesas: r8a77960: Add GX6250 GPU nodeMarek Vasut1-0/+17
Describe Imagination Technologies PowerVR Rogue GX6250 BNVC 4.45.2.58 present in Renesas R-Car R8A77960 M3-W SoC. Acked-by: Matt Coster <matt.coster@imgtec.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251022033847.471106-2-marek.vasut+renesas@mailbox.org Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-10-28ARM: dts: renesas: kzm9g: Name interrupts for accelerometerWolfram Sang1-0/+1
Name the interrupts to make them descriptive. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://patch.msgid.link/20251011212358.3347-2-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-10-28arm64: dts: renesas: r9a09g087: Add Cortex-A55 PMU nodeLad Prabhakar1-0/+5
Enable the performance monitor unit for the Cortex-A55 cores on the RZ/N2H (R9A09G087) SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251007121508.1595889-5-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-10-28arm64: dts: renesas: r9a09g077: Add Cortex-A55 PMU nodeLad Prabhakar1-0/+5
Enable the performance monitor unit for the Cortex-A55 cores on the RZ/T2H (R9A09G077) SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251007121508.1595889-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-10-28arm64: dts: renesas: r9a09g056: Add Cortex-A55 PMU nodeLad Prabhakar1-0/+5
Enable the performance monitor unit for the Cortex-A55 cores on the RZ/V2N (R9A09G056) SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251007121508.1595889-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-10-28arm64: dts: renesas: r9a09g057: Add Cortex-A55 PMU nodeLad Prabhakar1-0/+5
Enable the performance monitor unit for the Cortex-A55 cores on the RZ/V2H(P) (R9A09G057) SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251007121508.1595889-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-10-28ARM: dts: renesas: r9a06g032-rzn1d400-db: Drop invalid #cells propertiesWolfram Sang1-2/+0
The 'ethernet-ports' node in the SoC DTSI handles them already. Fixes: arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dtb: switch@44050000 (renesas,r9a06g032-a5psw): Unevaluated properties are not allowed ('#address-cells', '#size-cells' were unexpected) from schema $id: http://devicetree.org/schemas/net/dsa/renesas,rzn1-a5psw.yaml# Fixes: 5b6d7c3c5861ad4a ("ARM: dts: r9a06g032-rzn1d400-db: Add switch description") Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251007104624.19786-2-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-10-28arm64: dts: renesas: v3msk: Enable watchdog timerGeert Uytterhoeven1-0/+5
Enable the watchdog timer on the R-Car V3M Starter Kit board. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://patch.msgid.link/e30fb396d73307f2538a638cdda06ca58a1a4e60.1759830182.git.geert+renesas@glider.be
2025-10-28arm64: dts: renesas: r8a779h0: Add SWDT nodeWolfram Sang1-0/+10
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251006082520.10570-19-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-10-28arm64: dts: renesas: r8a779g0: Add SWDT nodeWolfram Sang1-0/+10
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251006082520.10570-16-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-10-28arm64: dts: renesas: r8a779f0: Add SWDT nodeWolfram Sang1-0/+10
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251006082520.10570-14-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-10-28arm64: dts: renesas: r8a779a0: Add SWDT nodeWolfram Sang1-0/+10
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251006082520.10570-12-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-10-28arm64: dts: renesas: rzt2h/rzn2h-evk: Enable ADCsCosmin Tanislav3-0/+171
The ADCs on RZ/T2H and RZ/N2H are exposed on the evaluation kit boards. Enable them. Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251005111323.804638-6-cosmin-gabriel.tanislav.xa@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-10-28arm64: dts: renesas: r9a09g087: Add ADCs supportCosmin Tanislav1-0/+66
Renesas RZ/T2H (R9A09G087) includes three 12-Bit successive approximation A/D converters, two 4-channel ADCs, and one 15-channel ADC. Add support for all of them. Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251005111323.804638-5-cosmin-gabriel.tanislav.xa@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-10-28arm64: dts: renesas: r9a09g077: Add ADCs supportCosmin Tanislav1-0/+66
Renesas RZ/T2H (R9A09G077) includes three 12-Bit successive approximation A/D converters, two 4-channel ADCs, and one 6-channel ADC. Add support for all of them. Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251005111323.804638-4-cosmin-gabriel.tanislav.xa@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-10-28ARM: dts: renesas: koelsch: Update ADV7180 bindingNiklas Söderlund1-6/+28
Use the more modern adi,adv7180cp compatible for the CVBS input found on R-Car Gen2 Koelsch boards. This aligns the bindings with the other Gen2 board with the same setup Gose. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251003215318.39757-1-niklas.soderlund+renesas@ragnatech.se Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-10-28ARM: dts: renesas: r9a06g032: Move interrupt-parent to root nodeGeert Uytterhoeven1-2/+1
Move the "interrupt-parent = <&gic>" properties from the soc and timer nodes to the root node, to reduce duplication. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://patch.msgid.link/8416011a488aa5ba883fca2647d09e21cad26351.1759414774.git.geert+renesas@glider.be
2025-10-28ARM: dts: renesas: r8a7794: Move interrupt-parent to root nodeGeert Uytterhoeven1-7/+7
Move the "interrupt-parent = <&gic>" property from the soc node to the root node, and simplify "interrupts-extended = <&gic ...>" to "interrupts = <...>". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://patch.msgid.link/e0fd5e98d27c266e9498350a44747d314ce87e71.1759414774.git.geert+renesas@glider.be
2025-10-28ARM: dts: renesas: r8a7793: Move interrupt-parent to root nodeGeert Uytterhoeven1-7/+7
Move the "interrupt-parent = <&gic>" property from the soc node to the root node, and simplify "interrupts-extended = <&gic ...>" to "interrupts = <...>". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://patch.msgid.link/a561c3ee412df8e6fd293a91fa0aa5d303143d22.1759414774.git.geert+renesas@glider.be
2025-10-28ARM: dts: renesas: r8a7792: Move interrupt-parent to root nodeGeert Uytterhoeven1-7/+7
Move the "interrupt-parent = <&gic>" property from the soc node to the root node, and simplify "interrupts-extended = <&gic ...>" to "interrupts = <...>". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://patch.msgid.link/3fc9ca6fd1469ec76c6c820a8c966b0a6652fbad.1759414774.git.geert+renesas@glider.be
2025-10-28ARM: dts: renesas: r8a7791: Move interrupt-parent to root nodeGeert Uytterhoeven1-7/+7
Move the "interrupt-parent = <&gic>" property from the soc node to the root node, and simplify "interrupts-extended = <&gic ...>" to "interrupts = <...>". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://patch.msgid.link/32809538c2ceedcd142fc419918c6928870bbb6c.1759414774.git.geert+renesas@glider.be
2025-10-28ARM: dts: renesas: r8a7790: Move interrupt-parent to root nodeGeert Uytterhoeven1-13/+13
Move the "interrupt-parent = <&gic>" property from the soc node to the root node, and simplify "interrupts-extended = <&gic ...>" to "interrupts = <...>". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://patch.msgid.link/d98bdf49a93db0e17a73b9be6cae5cbc8da76488.1759414774.git.geert+renesas@glider.be
2025-10-28ARM: dts: renesas: r8a77470: Move interrupt-parent to root nodeGeert Uytterhoeven1-7/+7
Move the "interrupt-parent = <&gic>" property from the soc node to the root node, and simplify "interrupts-extended = <&gic ...>" to "interrupts = <...>". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://patch.msgid.link/13edb8c780f21366343268a0c8f1ab5d54032c66.1759414774.git.geert+renesas@glider.be
2025-10-28ARM: dts: renesas: r8a7745: Move interrupt-parent to root nodeGeert Uytterhoeven1-7/+7
Move the "interrupt-parent = <&gic>" property from the soc node to the root node, and simplify "interrupts-extended = <&gic ...>" to "interrupts = <...>". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://patch.msgid.link/fc23a6b5b7c8d92334089770854535f088201d58.1759414774.git.geert+renesas@glider.be
2025-10-28ARM: dts: renesas: r8a7744: Move interrupt-parent to root nodeGeert Uytterhoeven1-7/+7
Move the "interrupt-parent = <&gic>" property from the soc node to the root node, and simplify "interrupts-extended = <&gic ...>" to "interrupts = <...>". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://patch.msgid.link/412460167747bd26e962b5cb022a85dcac31a00c.1759414774.git.geert+renesas@glider.be
2025-10-28ARM: dts: renesas: r8a7743: Move interrupt-parent to root nodeGeert Uytterhoeven1-7/+7
Move the "interrupt-parent = <&gic>" property from the soc node to the root node, and simplify "interrupts-extended = <&gic ...>" to "interrupts = <...>". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://patch.msgid.link/0c96651b9b7307cad03c42da88e4115629c5ae60.1759414774.git.geert+renesas@glider.be
2025-10-28ARM: dts: renesas: r8a7742: Move interrupt-parent to root nodeGeert Uytterhoeven1-13/+13
Move the "interrupt-parent = <&gic>" property from the soc node to the root node, and simplify "interrupts-extended = <&gic ...>" to "interrupts = <...>". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://patch.msgid.link/eab2e4860569e877e66b2f35940ba00e5ec7ff55.1759414774.git.geert+renesas@glider.be
generated by cgit v1.2.3 (git 2.39.0) at 2026-06-06 09:35:02 +0300