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2025-11-11riscv: dts: microchip: enable qspi adc/mmc-spi-slot on BeagleV FireConor Dooley1-0/+96
The BeagleV Fire has an SD card slot and an ADC connected to the QSPI controller. Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-11-11x86/coco/sev: Convert has_cpuflag() to use cpu_feature_enabled()Borislav Petkov (AMD)4-4/+3
Drop one redundant definition, while at it. There should be no functional changes. Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://patch.msgid.link/20251031122122.GKaQSpwhLvkinKKbjG@fat_crate.local
2025-11-11KVM: VMX: Make loaded_vmcs_clear() static in vmx.cSean Christopherson2-2/+1
Make loaded_vmcs_clear() local to vmx.c as there are no longer any external callers. No functional change intended. Link: https://patch.msgid.link/20251106205114.218226-1-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2025-11-11arm64: dts: imx8mp-debix-model-a: Fix ethernet PHY addressLaurent Pinchart1-2/+2
The RTL8211E ethernet PHY on the Debix Model A board it located at address 1. Replace the broadcast address with the correct unicast address. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-11-11KVM: arm64: Finalize ID registers only once per VMMarc Zyngier1-1/+5
Owing to the ID registers being global to the VM, there is no point in computing them more than once. However, recent changes making use of kvm_set_vm_id_reg() outlined that we repeatedly hammer the ID registers when we shouldn't. Gate the ID reg update on the VM having never run. Fixes: 50e7cce81b9b2 ("KVM: arm64: Limit clearing of ID_{AA64PFR0,PFR1}_EL1.GIC to userspace irqchip") Fixes: 5cb57a1aff755 ("KVM: arm64: Zero ID_AA64PFR0_EL1.GIC when no GICv3 is presented to the guest") Closes: https://lore.kernel.org/r/aRHf6x5umkTYhYJ3@finisterre.sirena.org.uk Reported-by: Mark Brown <broonie@kernel.org> Tested-by: Mark Brown <broonie@kernel.org> Link: https://patch.msgid.link/20251110173010.1918424-1-maz@kernel.org Signed-off-by: Marc Zyngier <maz@kernel.org>
2025-11-11mips: dts: econet: fix EN751221 core typeAleksander Jan Bajkowski1-1/+1
In fact, it is a multi-threaded MIPS34Kc, not a single-threaded MIPS24Kc. Fixes: 0ec488700972 ("mips: dts: Add EcoNet DTS with EN751221 and SmartFiber XP8421-B board") Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2025-11-11MIPS: Malta: Fix !EVA SOC-it PCI MMIOMaciej W. Rozycki1-7/+13
Fix a regression that has caused accesses to the PCI MMIO window to complete unclaimed in non-EVA configurations with the SOC-it family of system controllers, preventing PCI devices from working that use MMIO. In the non-EVA case PHYS_OFFSET is set to 0, meaning that PCI_BAR0 is set with an empty mask (and PCI_HEAD4 matches addresses starting from 0 accordingly). Consequently all addresses are matched for incoming DMA accesses from PCI. This seems to confuse the system controller's logic and outgoing bus cycles targeting the PCI MMIO window seem not to make it to the intended devices. This happens as well when a wider mask is used with PCI_BAR0, such as 0x80000000 or 0xe0000000, that makes addresses match that overlap with the PCI MMIO window, which starts at 0x10000000 in our configuration. Set the mask in PCI_BAR0 to 0xf0000000 for non-EVA then, covering the non-EVA maximum 256 MiB of RAM, which is what YAMON does and which used to work correctly up to the offending commit. Set PCI_P2SCMSKL to match PCI_BAR0 as required by the system controller's specification, and match PCI_P2SCMAPL to PCI_HEAD4 for identity mapping. Verified with: Core board type/revision = 0x0d (Core74K) / 0x01 System controller/revision = MIPS SOC-it 101 OCP / 1.3 SDR-FW-4:1 Processor Company ID/options = 0x01 (MIPS Technologies, Inc.) / 0x1c Processor ID/revision = 0x97 (MIPS 74Kf) / 0x4c for non-EVA and with: Core board type/revision = 0x0c (CoreFPGA-5) / 0x00 System controller/revision = MIPS ROC-it2 / 0.0 FW-1:1 (CLK_unknown) GIC Processor Company ID/options = 0x01 (MIPS Technologies, Inc.) / 0x00 Processor ID/revision = 0xa0 (MIPS interAptiv UP) / 0x20 for EVA/non-EVA, fixing: defxx 0000:00:12.0: assign IRQ: got 10 defxx: v1.12 2021/03/10 Lawrence V. Stefani and others 0000:00:12.0: Could not read adapter factory MAC address! vs: defxx 0000:00:12.0: assign IRQ: got 10 defxx: v1.12 2021/03/10 Lawrence V. Stefani and others 0000:00:12.0: DEFPA at MMIO addr = 0x10142000, IRQ = 10, Hardware addr = 00-00-f8-xx-xx-xx 0000:00:12.0: registered as fddi0 for non-EVA and causing no change for EVA. Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk> Fixes: 422dd256642b ("MIPS: Malta: Allow PCI devices DMA to lower 2GB physical") Cc: stable@vger.kernel.org # v4.9+ Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2025-11-11ARM: dts: nxp: imx6ul: correct SAI3 interrupt lineMaarten Zanders1-1/+1
The i.MX6UL reference manual lists two possible interrupt lines for SAI3 (56 and 57, offset +32). The current device tree entry uses the first one (24), which prevents IRQs from being handled properly. Use the second interrupt line (25), which does allow interrupts to work as expected. Fixes: 36e2edf6ac07 ("ARM: dts: imx6ul: add sai support") Signed-off-by: Maarten Zanders <maarten@zanders.be> Cc: stable@vger.kernel.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-11-11powerpc/83xx: Add a null pointer check to mcu_gpiochip_addKunwu Chan1-0/+2
kasprintf() returns a pointer to dynamically allocated memory which can be NULL upon failure. Ensure the allocation was successful by checking the pointer validity. Signed-off-by: Kunwu Chan <chentao@kylinos.cn> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/20240115094330.33014-1-chentao@kylinos.cn
2025-11-11arch:powerpc:tools This file was missing shebang line, so added itBhaskar Chowdhury1-0/+1
This file was missing the shebang line, so added it. Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com> Reviewed-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/20250722220043.14862-1-unixbhaskar@gmail.com
2025-11-11kexec: Include kernel-end even without crashkernelBen Collins1-12/+15
Certain versions of kexec don't even work without kernel-end being added to the device-tree. Add it even if crash-kernel is disabled. Signed-off-by: Ben Collins <bcollins@kernel.org> Reviewed-by: Sourabh Jain <sourabhjain@linux.ibm.com> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/2025042122-inescapable-mandrill-8a5ff2@boujee-and-buff
2025-11-11powerpc: p2020: Rename wdt@ nodes to watchdog@J. Neuschäfer1-2/+2
The watchdog.yaml schema prescribes a node name of "timer" or "watchdog" rather than the abbreviation "wdt". Signed-off-by: J. Neuschäfer <j.ne@posteo.net> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/20250418-watchdog-v1-4-987ff2046272@posteo.net
2025-11-11powerpc: 86xx: Rename wdt@ nodes to watchdog@J. Neuschäfer3-6/+6
The watchdog.yaml schema prescribes a node name of "timer" or "watchdog" rather than the abbreviation "wdt". Signed-off-by: J. Neuschäfer <j.ne@posteo.net> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/20250418-watchdog-v1-3-987ff2046272@posteo.net
2025-11-11powerpc: 83xx: Rename wdt@ nodes to watchdog@J. Neuschäfer11-11/+11
The watchdog.yaml schema prescribes a node name of "timer" or "watchdog" rather than the abbreviation "wdt". Signed-off-by: J. Neuschäfer <j.ne@posteo.net> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/20250418-watchdog-v1-2-987ff2046272@posteo.net
2025-11-11powerpc: 512x: Rename wdt@ node to watchdog@J. Neuschäfer1-1/+1
The watchdog.yaml schema prescribes a node name of "timer" or "watchdog" rather than the abbreviation "wdt". Signed-off-by: J. Neuschäfer <j.ne@posteo.net> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/20250418-watchdog-v1-1-987ff2046272@posteo.net
2025-11-11powerpc/addnote: Fix overflow on 32-bit buildsBen Collins1-3/+4
The PUT_64[LB]E() macros need to cast the value to unsigned long long like the GET_64[LB]E() macros. Caused lots of warnings when compiled on 32-bit, and clobbered addresses (36-bit P4080). Signed-off-by: Ben Collins <bcollins@kernel.org> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/2025042122-mustard-wrasse-694572@boujee-and-buff
2025-11-11Merge branch 'kbuild-6.19.fms.extension'Christian Brauner32-69/+174
Bring in the shared branch with the kbuild tree to enable '-fms-extensions' for 6.19. Further namespace cleanup work requires this extension. Signed-off-by: Christian Brauner <brauner@kernel.org>
2025-11-11powerpc/boot: Add missing compression methods to usageAntonio Alvarez Feijoo1-2/+2
lzma and lzo are also supported. Signed-off-by: Antonio Alvarez Feijoo <antonio.feijoo@suse.com> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/20250916061840.5492-1-antonio.feijoo@suse.com
2025-11-11powerpc/vmlinux.lds: Drop .interp descriptionNathan Chancellor1-1/+0
Commit da30705c4621 ("arch/powerpc: Remove .interp section in vmlinux") intended to drop the .interp section from vmlinux but even with this change, relocatable kernels linked with ld.lld contain an empty .interp section, which ends up causing crashes in GDB [1]. $ make -skj"$(nproc)" ARCH=powerpc LLVM=1 clean pseries_le_defconfig vmlinux $ llvm-readelf -S vmlinux | grep interp [44] .interp PROGBITS c0000000021ddb34 21edb34 000000 00 A 0 0 1 There appears to be a subtle difference between GNU ld and ld.lld when it comes to discarding sections that specify load addresses [2]. Since '--no-dynamic-linker' prevents emission of the .interp section, there is no need to describe it in the output sections of the vmlinux linker script. Drop the .interp section description from vmlinux.lds.S to avoid this issue altogether. Link: https://sourceware.org/bugzilla/show_bug.cgi?id=33481 [1] Link: https://github.com/ClangBuiltLinux/linux/issues/2137 [2] Reported-by: Vishal Chourasia <vishalc@linux.ibm.com> Closes: https://lore.kernel.org/20251013040148.560439-1-vishalc@linux.ibm.com/ Signed-off-by: Nathan Chancellor <nathan@kernel.org> Tested-by: Vishal Chourasia <vishalc@linux.ibm.com> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/20251018-ppc-fix-lld-interp-v1-1-a083de6dccc9@kernel.org
2025-11-11powerpc/32: Fix unpaired stwcx. on interrupt exitChristophe Leroy1-6/+4
Commit b96bae3ae2cb ("powerpc/32: Replace ASM exception exit by C exception exit from ppc64") erroneouly copied to powerpc/32 the logic from powerpc/64 based on feature CPU_FTR_STCX_CHECKS_ADDRESS which is always 0 on powerpc/32. Re-instate the logic implemented by commit b64f87c16f3c ("[POWERPC] Avoid unpaired stwcx. on some processors") which is based on CPU_FTR_NEED_PAIRED_STWCX feature. Fixes: b96bae3ae2cb ("powerpc/32: Replace ASM exception exit by C exception exit from ppc64") Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/6040b5dbcf5cdaa1cd919fcf0790f12974ea6e5a.1757666244.git.christophe.leroy@csgroup.eu
2025-11-11powerpc/32: Restore clearing of MSR[RI] at interrupt/syscall exitChristophe Leroy2-2/+18
Commit 13799748b957 ("powerpc/64: use interrupt restart table to speed up return from interrupt") removed the inconditional clearing of MSR[RI] when returning from interrupt into kernel. But powerpc/32 doesn't implement interrupt restart table hence still need MSR[RI] to be cleared. It could be added back in interrupt_exit_kernel_prepare() but it is easier and better to add it back in entry_32.S for following reasons: - Writing to MSR must be followed by a synchronising instruction - The smaller the non recoverable section is the better it is So add a macro called clr_ri and use it in the three places that play up with SRR0/SRR1. Use it just before another mtspr for synchronisation to avoid having to add an isync. Now that's done in entry_32.S, exit_must_hard_disable() can return false for non book3s/64, taking into account that BOOKE doesn't have MSR_RI. Also add back blacklisting syscall_exit_finish for kprobe. This was initially added by commit 7cdf44013885 ("powerpc/entry32: Blacklist syscall exit points for kprobe.") then lost with commit 6f76a01173cc ("powerpc/syscall: implement system call entry/exit logic in C for PPC32"). Fixes: 6f76a01173cc ("powerpc/syscall: implement system call entry/exit logic in C for PPC32") Fixes: 13799748b957 ("powerpc/64: use interrupt restart table to speed up return from interrupt") Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/66d0ab070563ad460ed481328ab0887c27f21a2c.1757593807.git.christophe.leroy@csgroup.eu
2025-11-11powerpc/8xx: Remove specific code from fast_exception_returnChristophe Leroy1-4/+1
The label 2: in fast_exception_return is a leftover from commit b96bae3ae2cb ("powerpc/32: Replace ASM exception exit by C exception exit from ppc64"). Once removed, we see that fast_exception_return is a standalone function that is called only from pieces of assembly dedicated to book3s/32 or booke, never by common code or 8xx code. So remove the clear of MSR[RI] enclosed in #ifdef CONFIG_PPC_8xx. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/39de3e0f0122b571474b1ba352a2dc3ad8cb71dd.1756304318.git.christophe.leroy@csgroup.eu
2025-11-11powerpc/kdump: Fix size calculation for hot-removed memory rangesSourabh Jain1-1/+1
The elfcorehdr segment in the kdump image stores information about the memory regions (called crash memory ranges) that the kdump kernel must capture. When a memory hot-remove event occurs, the kernel regenerates the elfcorehdr for the currently loaded kdump image to remove the hot-removed memory from the crash memory ranges. Call chain: remove_mem_range() update_crash_elfcorehdr() arch_crash_handle_hotplug_event() crash_handle_hotplug_event() While removing the hot-removed memory from the crash memory ranges in remove_mem_range(), if the removed memory lies within an existing crash range, that range is split into two. During this split, the size of the second range was being calculated incorrectly. This leads to dump capture failure with makedumpfile with below error: $ makedumpfile -l -d 31 /proc/vmcore /tmp/vmcore readpage_elf: Attempt to read non-existent page at 0xbbdab0000. readmem: type_addr: 0, addr:c000000bbdab7f00, size:16 validate_mem_section: Can't read mem_section array. readpage_elf: Attempt to read non-existent page at 0xbbdab0000. readmem: type_addr: 0, addr:c000000bbdab7f00, size:8 get_mm_sparsemem: Can't get the address of mem_section. The updated crash memory range in PT_LOAD entry is holding incorrect data (checkout FileSiz and MemSiz): readelf -a /proc/vmcore <snip...> Type Offset VirtAddr PhysAddr FileSiz MemSiz Flags Align LOAD 0x0000000b013d0000 0xc000000b80000000 0x0000000b80000000 0xffffffffc0000000 0xffffffffc0000000 RWE 0x0 <snip...> Update the size calculation for the new crash memory range to fix this issue. Note: This problem will not occur if the kdump kernel is loaded or reloaded after a memory hot-remove operation. Fixes: 849599b702ef ("powerpc/crash: add crash memory hotplug support") Reported-by: Shirisha G <shirisha@linux.ibm.com> Signed-off-by: Sourabh Jain <sourabhjain@linux.ibm.com> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/20251105033941.1752287-1-sourabhjain@linux.ibm.com
2025-11-11powerpc/kdump: Add support for crashkernel CMA reservationSourabh Jain4-13/+46
Commit 35c18f2933c5 ("Add a new optional ",cma" suffix to the crashkernel= command line option") and commit ab475510e042 ("kdump: implement reserve_crashkernel_cma") added CMA support for kdump crashkernel reservation. Extend crashkernel CMA reservation support to powerpc. The following changes are made to enable CMA reservation on powerpc: - Parse and obtain the CMA reservation size along with other crashkernel parameters - Call reserve_crashkernel_cma() to allocate the CMA region for kdump - Include the CMA-reserved ranges in the usable memory ranges for the kdump kernel to use. - Exclude the CMA-reserved ranges from the crash kernel memory to prevent them from being exported through /proc/vmcore. With the introduction of the CMA crashkernel regions, crash_exclude_mem_range() needs to be called multiple times to exclude both crashk_res and crashk_cma_ranges from the crash memory ranges. To avoid repetitive logic for validating mem_ranges size and handling reallocation when required, this functionality is moved to a new wrapper function crash_exclude_mem_range_guarded(). To ensure proper CMA reservation, reserve_crashkernel_cma() is called after pageblock_order is initialized. Update kernel-parameters.txt to document CMA support for crashkernel on powerpc architecture. Signed-off-by: Sourabh Jain <sourabhjain@linux.ibm.com> Reviewed-by: Ritesh Harjani (IBM) <ritesh.list@gmail.com> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/20251107080334.708028-1-sourabhjain@linux.ibm.com
2025-11-11pseries/lparcfg: Add resource group monitoringSrikar Dronamraju1-3/+14
Systems can now be partitioned into resource groups. By default all systems will be part of default resource group. Once a resource group is created, and resources allocated to the resource group, those resources will be removed from the default resource group. If a LPAR moved to a resource group, then it can only use resources in the resource group. So maximum processors that can be allocated to a LPAR can be equal or smaller than the resources in the resource group. lparcfg can now exposes the resource group id to which this LPAR belongs to. It also exposes the number of processors in the current resource group. The default resource group id happens to be 0. These would be documented in the upcoming PAPR update. Example of an LPAR in a default resource group root@ltcp11-lp3 $ grep resource_group /proc/powerpc/lparcfg resource_group_number=0 resource_group_active_processors=50 root@ltcp11-lp3 $ Example of an LPAR in a non-default resource group root@ltcp11-lp5 $ grep resource_group /proc/powerpc/lparcfg resource_group_number=1 resource_group_active_processors=30 root@ltcp11-lp5 $ Signed-off-by: Srikar Dronamraju <srikar@linux.ibm.com> Tested-by: Venkat Rao Bagalkote <venkat88@linux.ibm.com> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/20250716104600.59102-1-srikar@linux.ibm.com
2025-11-11ARM: dts: imx: add vdd-supply and vddio-supply for fsl,mpl3115Frank Li7-1/+23
Add vdd-supply and vddio-supply for fsl,mpl3115 to fix below CHECK_DTBS warnings: arch/arm/boot/dts/nxp/imx/imx53-ppd.dtb: pressure-sensor@60 (fsl,mpl3115): 'vdd-supply' is a required property Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-11-11arm64: dts: imx8: add vdd-supply and vddio-supply for fsl,mpl3115Frank Li2-0/+18
Add vdd-supply and vddio-supply for fsl,mpl3115 to fix CHECK_DTBS warning: arch/arm64/boot/dts/freescale/imx8qm-mek.dtb: pressure-sensor@60 (fsl,mpl3115): 'vdd-supply' is a required property from schema $id: http://devicetree.org/schemas/iio/pressure/fsl,mpl3115.yaml# Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-11-11arm64: dts: imx8dxl-ss-conn: delete usb3_lpcg nodeFrank Li1-0/+1
Delete usb3_lpcg node for imx8dxl because not exist at such hardware. Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-11-11arm64: dts: imx8-ss-conn: add missed clock enet_2x_txclk for fec[1,2]Frank Li1-4/+6
Add missed clock enet_2x_txclk for fec[1,2]. Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-11-11arm64: dts: imx8-ss-conn: add fsl,tuning-step for usdhc1 and usdhc2Frank Li1-0/+4
Add fsl,tuning-step for usdhc1 and usdhc2 to improve card compatibility. Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-11-11arm64: dts: imx8: add default clock rate for usdhcShenwei Wang1-0/+6
Add default clock rate for usdhc nodes to support higher transfer speed. Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-11-11arm64: dts: imx8dxl-evk: add state_100mhz and state_200mhz for usdhcFrank Li1-2/+7
Default, state_100mhz and state_200mhz use the same settings. But current kernel driver use these to indicate if sd3.0 support. Add max-frequency for usdhc2 because board design limitation. Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-11-11arm64: dts: imx8dxl-evk: add bt information for lpuart1Frank Li1-0/+4
Add BT information for lpuart1. Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-11-11arm64: dts: imx8dxl-ss-conn: swap interrupts number of eqosFrank Li1-2/+2
Swap interrupt numbers of eqos because the below commit just swap interrupt-names and missed swap interrupts also. The driver (drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c) use interrupt-names to get irq numbers. Fixes: f29c19a6e488 ("arm64: dts: imx8dxl-ss-conn: Fix Ethernet interrupt-names order") Signed-off-by: Frank Li <Frank.Li@nxp.com> Tested-by: Alexander Dahl <ada@thorsis.com> Cc: stable@vger.kernel.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-11-11arm64: dts: imx8dxl: Correct pcie-ep interrupt numberFrank Li1-0/+5
Correct i.MX8DXL's pcie-ep interrupt number. Fixes: d03743c5659a9 ("arm64: dts: imx8q: add PCIe EP for i.MX8QM and i.MX8QXP") Signed-off-by: Frank Li <Frank.Li@nxp.com> Cc: stable@vger.kernel.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-11-11arm64: dts: socfpga: Add Agilex5 SVC node with memory regionKhairul Anuar Romli1-0/+9
Introduce the Stratix10 SoC Service Layer (SVC) node for Agilex5 SoCs. This node includes the compatible string "intel,agilex5-svc" and references a reserved memory region used for communication with the Secure Device Manager (SDM). Agilex5 introduces changes in how reserved memory is mapped and accessed compared to previous SoC generations. This commit updates the device tree structure to support Agilex5-specific handling of the SVC interface. Signed-off-by: Khairul Anuar Romli <khairul.anuar.romli@altera.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2025-11-11Merge tag 'riscv-for-linus-6.18-rc6' of ↵Linus Torvalds2-17/+2
git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V fixes from Paul Walmsley: - fix broken clang build on versions earlier than 19 and binutils versions earlier than 2.38. (This exposed that we're not properly testing earlier toolchain versions in our linux-next builds and PR submissions. This was fixed for this PR, and is being addressed more generally for -next builds.) - remove some redundant Makefile code - avoid building Canaan Kendryte K210-specific code on targets that don't build for the K210 * tag 'riscv-for-linus-6.18-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: riscv: Fix CONFIG_AS_HAS_INSN for new .insn usage riscv: Remove redundant judgment for the default build target riscv: Build loader.bin exclusively for Canaan K210
2025-11-10Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds20-180/+250
Pull kvm fixes from Paolo Bonzini: "Arm: - Fix trapping regression when no in-kernel irqchip is present - Check host-provided, untrusted ranges and offsets in pKVM - Fix regression restoring the ID_PFR1_EL1 register - Fix vgic ITS locking issues when LPIs are not directly injected Arm selftests: - Correct target CPU programming in vgic_lpi_stress selftest - Fix exposure of SCTLR2_EL2 and ZCR_EL2 in get-reg-list selftest RISC-V: - Fix check for local interrupts on riscv32 - Read HGEIP CSR on the correct cpu when checking for IMSIC interrupts - Remove automatic I/O mapping from kvm_arch_prepare_memory_region() x86: - Inject #UD if the guest attempts to execute SEAMCALL or TDCALL as KVM doesn't support virtualization the instructions, but the instructions are gated only by VMXON. That is, they will VM-Exit instead of taking a #UD and until now this resulted in KVM exiting to userspace with an emulation error. - Unload the "FPU" when emulating INIT of XSTATE features if and only if the FPU is actually loaded, instead of trying to predict when KVM will emulate an INIT (CET support missed the MP_STATE path). Add sanity checks to detect and harden against similar bugs in the future. - Unregister KVM's GALog notifier (for AVIC) when kvm-amd.ko is unloaded. - Use a raw spinlock for svm->ir_list_lock as the lock is taken during schedule(), and "normal" spinlocks are sleepable locks when PREEMPT_RT=y. - Remove guest_memfd bindings on memslot deletion when a gmem file is dying to fix a use-after-free race found by syzkaller. - Fix a goof in the EPT Violation handler where KVM checks the wrong variable when determining if the reported GVA is valid. - Fix and simplify the handling of LBR virtualization on AMD, which was made buggy and unnecessarily complicated by nested VM support Misc: - Update Oliver's email address" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (28 commits) KVM: nSVM: Fix and simplify LBR virtualization handling with nested KVM: nSVM: Always recalculate LBR MSR intercepts in svm_update_lbrv() KVM: SVM: Mark VMCB_LBR dirty when MSR_IA32_DEBUGCTLMSR is updated MAINTAINERS: Switch myself to using kernel.org address KVM: arm64: vgic-v3: Release reserved slot outside of lpi_xa's lock KVM: arm64: vgic-v3: Reinstate IRQ lock ordering for LPI xarray KVM: arm64: Limit clearing of ID_{AA64PFR0,PFR1}_EL1.GIC to userspace irqchip KVM: arm64: Set ID_{AA64PFR0,PFR1}_EL1.GIC when GICv3 is configured KVM: arm64: Make all 32bit ID registers fully writable KVM: VMX: Fix check for valid GVA on an EPT violation KVM: guest_memfd: Remove bindings on memslot deletion when gmem is dying KVM: SVM: switch to raw spinlock for svm->ir_list_lock KVM: SVM: Make avic_ga_log_notifier() local to avic.c KVM: SVM: Unregister KVM's GALog notifier on kvm-amd.ko exit KVM: SVM: Initialize per-CPU svm_data at the end of hardware setup KVM: x86: Call out MSR_IA32_S_CET is not handled by XSAVES KVM: x86: Harden KVM against imbalanced load/put of guest FPU state KVM: x86: Unload "FPU" state on INIT if and only if its currently in-use KVM: arm64: Check the untrusted offset in FF-A memory share KVM: arm64: Check range args for pKVM mem transitions ...
2025-11-10Revert "arm64: dts: marvell: cn9132-clearfog: fix multi-lane pci x2 and x4 ↵Josua Mayer1-14/+2
ports" This reverts commit 794a066688038df46c01e177cc6faebded0acba4 because it misunderstood interworking between arm trusted firmware and the common phy driver, and does not consistently resolve the issue it was intended to address. Further diagnostics have revealed the root cause for the reported system lock-up in a race condition between pci driver probe and clock core disabling unused clocks. Revert the wrong change restoring driver control over all pci lanes. As a temporary workaround for the original issue, users can boot with "clk_ignore_unused". Signed-off-by: Josua Mayer <josua@solid-run.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2025-11-10arm64/arm: dts: marvell: Rename "nand-rb" pinctrl node namesRob Herring (Arm)5-5/+5
Update the "nand-rb" pinctrl child node names to use the defined "-pins" suffix fixing DT schema warnings. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2025-11-10x86/percpu: Use BIT_WORD() and BIT_MASK() macrosUros Bizjak1-2/+3
Use BIT_WORD() and BIT_MASK() macros from <linux/bits.h> in <arch/x86/include/asm/percpu.h> instead of open-coding them. No functional change intended. Signed-off-by: Uros Bizjak <ubizjak@gmail.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://patch.msgid.link/20250907184915.78041-1-ubizjak@gmail.com
2025-11-10parisc: Drop linux/kernel.h include from asm/bug.h headerFinn Thain1-2/+0
While working on an unrelated patch series, I needed to include linux/bug.h from linux/instrumented.h, in order to call WARN_ON_ONCE(). Doing so resulted in the following compiler error on parisc: In file included from ./include/linux/atomic/atomic-instrumented.h:17, from ./include/linux/atomic.h:82, from ./arch/parisc/include/asm/bitops.h:13, from ./include/linux/bitops.h:67, from ./include/linux/kernel.h:23, from ./arch/parisc/include/asm/bug.h:5, from ./include/linux/bug.h:5, from ./include/linux/page-flags.h:10, from kernel/bounds.c:10: ./include/linux/instrumented.h: In function 'instrument_atomic_alignment_check': ./include/linux/instrumented.h:69:9: error: implicit declaration of function 'WARN_ON_ONCE' [-Werror=implicit-function-declaration] 69 | WARN_ON_ONCE((unsigned long)v & (size - 1)); | ^~~~~~~~~~~~ cc1: some warnings being treated as errors make[3]: *** [scripts/Makefile.build:182: kernel/bounds.s] Error 1 The problem is, asm/bug.h indirectly includes atomic-instrumented.h, which means a new cycle appeared in the graph of #includes. And because some headers in the cycle can't see all definitions, my new WARN_ON_ONCE() call appears to be an undeclared function. This only happens on parisc and it's easy to fix. In the error message above, linux/kernel.h is included by asm/bug.h, but it's no longer needed there, so just remove that include. The comment about needing BUGFLAG_TAINT seems to be incorrect as of commit 19d436268dde ("debug: Add _ONCE() logic to report_bug()"). Also, there's a comment in linux/kernel.h which strongly discourages use of that header. Acked-by: Helge Deller <deller@gmx.de> # parisc Signed-off-by: Finn Thain <fthain@linux-m68k.org> Signed-off-by: Helge Deller <deller@gmx.de>
2025-11-10arm64: dts: renesas: r8a779a0: Add GE7800 GPU nodeNiklas Söderlund1-0/+17
Describe Imagination Technologies PowerVR Rogue GE7800 BNVC 15.5.1.64 present in Renesas R-Car R8A779A0 V3U SoC. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251106212342.2771579-3-niklas.soderlund+renesas@ragnatech.se Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-11-10arm64: dts: renesas: r8a77965: Add GE7800 GPU nodeMarek Vasut1-0/+17
Describe Imagination Technologies PowerVR Rogue GE7800 BNVC 15.5.1.64 present in Renesas R-Car R8A77965 M3-N SoC. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Acked-by: Matt Coster <matt.coster@imgtec.com> Link: https://patch.msgid.link/20251104135716.12497-3-marek.vasut+renesas@mailbox.org Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-11-10Merge patch "kbuild: Add '-fms-extensions' to areas with dedicated CFLAGS"Christian Brauner8-9/+18
Nathan Chancellor <nathan@kernel.org> says: Shared branch between Kbuild and other trees for enabling '-fms-extensions' for 6.19. * tag 'kbuild-ms-extensions-6.19' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/kbuild/linux: kbuild: Add '-fms-extensions' to areas with dedicated CFLAGS Kbuild: enable -fms-extensions jfs: Rename _inline to avoid conflict with clang's '-fms-extensions' Link: https://patch.msgid.link/20251101-kbuild-ms-extensions-dedicated-cflags-v1-1-38004aba524b@kernel.org Signed-off-by: Christian Brauner <brauner@kernel.org>
2025-11-10ARM: dts: stm32: lxa: drop unnecessary vusb_d/a-supplyAhmad Fatoum2-6/+0
The LXA device trees are the only STM32MP1 device tree that specify vusb_d/usb_a-supply and apparently not for good reason: - vusb_d-supply (vdd_usb) is the same as the phy-supply for usbphyc_port1 - vusb_a-supply (reg18) is the same as vdda1v8-supply for usbphyc_port1 and usbphyc_port1 is linked to the usbotg_hs node via the phys property. Specifying the regulators in the &usbotg_hs node is thus superfluous and has been even found to be harmful in one instance: Linux v6.10 was found to lock up every 50-125 or so reboots on the LXA TAC when the DWC2 driver probe enables the regulators in bulk, unless both properties were removed. This issue was so far not reproducible on v6.17 (> 500 reboots), but as these properties are unnecessary and different from other STM32MP1 boards, remove them anyway. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.kernel.org/r/20251007-lxa-usb-dt-v1-1-cacde8088bb9@pengutronix.de Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-11-10ARM: dts: stm32: stm32mp157c-phycore: Fix STMPE811 touchscreen node propertiesJihed Chaibi1-4/+4
Move st,adc-freq, st,mod-12b, st,ref-sel, and st,sample-time properties from the touchscreen subnode to the parent touch@44 node. These properties are defined in the st,stmpe.yaml schema for the parent node, not the touchscreen subnode, resolving the validation error about unevaluated properties. Fixes: 27538a18a4fcc ("ARM: dts: stm32: add STM32MP1-based Phytec SoM") Signed-off-by: Jihed Chaibi <jihed.chaibi.dev@gmail.com> Link: https://lore.kernel.org/r/20250915224611.169980-1-jihed.chaibi.dev@gmail.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-11-10arm64: dts: imx8mp: Specify the number of channels for CSI-2 receiversLaurent Pinchart1-0/+2
The CSI-2 receivers in the i.MX8MP have 3 output channels. Specify this in the device tree, to enable support for more than one channel. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-11-10mm/huge_memory: initialise the tags of the huge zero folioCatalin Marinas2-1/+12
On arm64 with MTE enabled, a page mapped as Normal Tagged (PROT_MTE) in user space will need to have its allocation tags initialised. This is normally done in the arm64 set_pte_at() after checking the memory attributes. Such page is also marked with the PG_mte_tagged flag to avoid subsequent clearing. Since this relies on having a struct page, pte_special() mappings are ignored. Commit d82d09e48219 ("mm/huge_memory: mark PMD mappings of the huge zero folio special") maps the huge zero folio special and the arm64 set_pmd_at() will no longer zero the tags. There is no guarantee that the tags are zero, especially if parts of this huge page have been previously tagged. It's fairly easy to detect this by regularly dropping the caches to force the reallocation of the huge zero folio. Allocate the huge zero folio with the __GFP_ZEROTAGS flag. In addition, do not warn in the arm64 __access_remote_tags() when reading tags from the huge zero page. I bundled the arm64 change in here as well since they are both related to the commit mapping the huge zero folio as special. [catalin.marinas@arm.com: handle arch mte_zero_clear_page_tags() code issuing MTE instructions] Link: https://lkml.kernel.org/r/aQi8dA_QpXM8XqrE@arm.com Link: https://lkml.kernel.org/r/20251031170133.280742-1-catalin.marinas@arm.com Fixes: d82d09e48219 ("mm/huge_memory: mark PMD mappings of the huge zero folio special") Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: David Hildenbrand <david@redhat.com> Reviewed-by: Lance Yang <lance.yang@linux.dev> Tested-by: Beleswar Padhi <b-padhi@ti.com> Cc: Will Deacon <will@kernel.org> Cc: Mark Brown <broonie@kernel.org> Cc: Aishwarya TCV <aishwarya.tcv@arm.com> Cc: David Hildenbrand (Red Hat) <david@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2025-11-10LoongArch: KVM: Fix max supported vCPUs set with EIOINTCBibo Mao1-1/+1
VM fails to boot with 256 vCPUs, the detailed command is qemu-system-loongarch64 -smp 256 and there is an error reported as follows: KVM_LOONGARCH_EXTIOI_INIT_NUM_CPU failed: Invalid argument There is typo issue in function kvm_eiointc_ctrl_access() when set max supported vCPUs. Cc: stable@vger.kernel.org Fixes: 47256c4c8b1b ("LoongArch: KVM: Avoid copy_*_user() with lock hold in kvm_eiointc_ctrl_access()") Signed-off-by: Bibo Mao <maobibo@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>