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2025-12-22arm64: dts: apm: Drop "dma" device_typeRob Herring (Arm)1-1/+0
The only supported cases of otherwise deprecated for FDT "device_type" property are memory, cpu, and pci. "dma" is not valid, so drop it. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251216-dt-apm-v1-4-0bf2bf8b982c@kernel.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2025-12-22arm64: dts: apm: Add "reg" to "syscon-reboot" and "syscon-poweroff"Rob Herring (Arm)4-0/+4
As the nodes already have a unit-address, add the corresponding "reg" entry which is preferred over "offset". Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251216-dt-apm-v1-3-0bf2bf8b982c@kernel.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2025-12-22arm64: dts: apm: Use recommended i2c node namesRob Herring (Arm)2-2/+2
Use the recommended node name of 'i2c' for the 'i2cslimpro' nodes. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251216-dt-apm-v1-2-0bf2bf8b982c@kernel.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2025-12-22arm64: dts: apm/shadowcat: More clock clean-upsRob Herring (Arm)1-9/+8
A fixed-factor-clock only provides 1 clock, so "#clock-cells" must be 0. The "snps,designware-i2c" node is not a clock provider, so drop "#clock-cells. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251216-dt-apm-v1-1-0bf2bf8b982c@kernel.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2025-12-22ARM: dts: vexpress/v2m-rs1: Use documented arm,vexpress,config-bus child ↵Rob Herring (Arm)1-4/+4
node names Update the arm,vexpress,config-bus child node names to use the documented ones. Most of these were updated a while back, but I missed these. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Liviu Dudau <liviu.dudau@arm.com> Link: https://patch.msgid.link/20251216191212.2879226-2-robh@kernel.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2025-12-22arm64: dts: cavium: Drop thunder2Rob Herring (Arm)3-175/+0
The Cavium thunder2 DT support is incomplete. It consists of 4 cores (out of 128) and only a serial port. The thunder2 specific drivers in the kernel don't have DT support either. The few remaining users of this platform likely use ACPI. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251216180202.2794695-2-robh@kernel.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2025-12-22arm64: dts: cavium: thunder-88xx: Add missing PL011 "uartclk"Rob Herring (Arm)1-4/+4
The PL011 IP has 2 clock inputs for UART core/baud and APB bus. The Thunder2 SoC is missing the core "uartclk". In this case, the Linux driver uses single clock for both clock inputs. Let's assume that's how the h/w is wired and make the DT reflect that. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251216180136.2794105-2-robh@kernel.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2025-12-22arm64: dts: toshiba: Use recommended node namesRob Herring (Arm)3-3/+3
Update Toshiba TMPV7708 node name to the recommended standard node names. Generally, node names and paths aren't considered ABI, so it is safe to change them. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.x90@mail.toshiba> Link: https://patch.msgid.link/20251216180055.2793215-2-robh@kernel.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2025-12-22arm64: dts: sprd: Use recommended node namesRob Herring (Arm)4-10/+11
Update Spreadtrum platforms node name to the recommended standard node names. Generally, node names and paths aren't considered ABI, so it is safe to change them. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251216180029.2792676-2-robh@kernel.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2025-12-22arm64: dts: lg: Use recommended simple-bus node nameRob Herring (Arm)1-1/+1
Update LG LG131x 'amba' bus node name to 'amba-bus' following the standard names for simple-bus nodes. Generally, node names and paths aren't considered ABI, so it is safe to change them. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251216175951.2791921-2-robh@kernel.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2025-12-22Merge tag 'ti-k3-dt-fixes-for-v6.19' of ↵Krzysztof Kozlowski3-10/+7
https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into arm/fixes TI K3 DT fixes for v6.19 - minor fixes for overlay files * tag 'ti-k3-dt-fixes-for-v6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: arm64: dts: ti: k3-am62-lp-sk-nand: Rename pinctrls to fix schema warnings arm64: dts: ti: k3-am642-phyboard-electra-x27-gpio1-spi1-uart3: Fix schema warnings arm64: dts: ti: k3-am642-phyboard-electra-peb-c-010: Fix icssg-prueth schema warning Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2025-12-22bpf: arm64: Fix sparse warningsPuranjay Mohan1-2/+2
ctx->image is declared as __le32 because arm64 instructions are LE regardless of CPU's runtime endianness. emit_u32_data() emits raw data and not instructions so cast the value to __le32 to fix the sparse warning. Cast function pointer to void * before doing arithmetic. Signed-off-by: Puranjay Mohan <puranjay@kernel.org> Link: https://lore.kernel.org/r/20251219191310.3204425-1-puranjay@kernel.org Signed-off-by: Alexei Starovoitov <ast@kernel.org>
2025-12-22Merge tag 'x86-urgent-2025-12-21' of ↵Linus Torvalds6-5/+35
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 fixes from Ingo Molnar: - Fix FPU core dumps on certain CPU models - Fix htmldocs build warning - Export TLB tracing event name via header - Remove unused constant from <linux/mm_types.h> - Fix comments - Fix whitespace noise in documentation - Fix variadic structure's definition to un-confuse UBSAN - Fix posted MSI interrupts irq_retrigger() bug - Fix asm build failure with older GCC builds * tag 'x86-urgent-2025-12-21' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/bug: Fix old GCC compile fails x86/msi: Make irq_retrigger() functional for posted MSI x86/platform/uv: Fix UBSAN array-index-out-of-bounds mm: Remove tlb_flush_reason::NR_TLB_FLUSH_REASONS from <linux/mm_types.h> x86/mm/tlb/trace: Export the TLB_REMOTE_WRONG_CPU enum in <trace/events/tlb.h> x86/sgx: Remove unmatched quote in __sgx_encl_extend function comment x86/boot/Documentation: Fix whitespace noise in boot.rst x86/fpu: Fix FPU state core dump truncation on CPUs with no extended xfeatures x86/boot/Documentation: Fix htmldocs build warning due to malformed table in boot.rst
2025-12-21x86/bpf: Avoid emitting LOCK prefix for XCHG atomic opsUros Bizjak1-2/+5
The x86 XCHG instruction is implicitly locked when one of the operands is a memory location, making an explicit LOCK prefix unnecessary. Stop emitting the LOCK prefix for BPF_XCHG in the JIT atomic read-modify-write helpers. This avoids redundant instruction prefixes while preserving correct atomic semantics. No functional change for other atomic operations. Signed-off-by: Uros Bizjak <ubizjak@gmail.com> Cc: Alexei Starovoitov <ast@kernel.org> Cc: Daniel Borkmann <daniel@iogearbox.net> Cc: Andrii Nakryiko <andrii@kernel.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Link: https://lore.kernel.org/r/20251208163420.7643-1-ubizjak@gmail.com Signed-off-by: Alexei Starovoitov <ast@kernel.org>
2025-12-21arm64: dts: exynosautov920: add CMU_MFD clock DT nodesRaghav Sharma1-0/+11
Add required dt node for cmu_mfd block, which provides clocks for MFD IP Signed-off-by: Raghav Sharma <raghav.s@samsung.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://patch.msgid.link/20251119114744.1914416-4-raghav.s@samsung.com Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2025-12-21riscv: dts: starfive: Append JH-7110 SoC compatible to VisionFive 2 Lite ↵E Shattow1-1/+1
eMMC board Append "starfive,jh7110" compatible to VisionFive 2 Lite eMMC board in the least-compatible end of the list. Appending "starfive,jh7110" reduces the number of compatible strings to check in the OpenSBI platform driver. JH-7110S SoC on this board is the same as JH-7110 SoC however rated for thermal, voltage, and frequency characteristics for a maximum of 1.25GHz operation. Link: https://lore.kernel.org/lkml/1f96a267-f5c6-498e-a2c4-7a47a73ea7e7@canonical.com/ Suggested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: E Shattow <e@freeshell.de> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-12-21riscv: dts: starfive: Append JH-7110 SoC compatible to VisionFive 2 Lite boardE Shattow1-1/+1
Append "starfive,jh7110" compatible to VisionFive 2 Lite board in the least-compatible end of the list. Appending "starfive,jh7110" reduces the number of compatible strings to check in the OpenSBI platform driver. JH-7110S SoC on this board is the same as JH-7110 SoC however rated for thermal, voltage, and frequency characteristics for a maximum of 1.25GHz operation. Link: https://lore.kernel.org/lkml/1f96a267-f5c6-498e-a2c4-7a47a73ea7e7@canonical.com/ Suggested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: E Shattow <e@freeshell.de> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-12-21x86/irqflags: Use ASM_OUTPUT_RM in native_save_fl()Eric Dumazet1-1/+1
clang is generating very inefficient code for native_save_fl() which is used for local_irq_save() in critical spots. Allowing the "pop %0" to use memory: 1) forces the compiler to add annoying stack canaries when CONFIG_STACKPROTECTOR_STRONG=y in many places. 2) Almost always is followed by an immediate "move memory,register" One good example is _raw_spin_lock_irqsave, with 8 extra instructions ffffffff82067a30 <_raw_spin_lock_irqsave>: ffffffff82067a30: ... ffffffff82067a39: 53 push %rbx // Three instructions to ajust the stack, read the per-cpu canary // and copy it to 8(%rsp) ffffffff82067a3a: 48 83 ec 10 sub $0x10,%rsp ffffffff82067a3e: 65 48 8b 05 da 15 45 02 mov %gs:0x24515da(%rip),%rax # <__stack_chk_guard> ffffffff82067a46: 48 89 44 24 08 mov %rax,0x8(%rsp) ffffffff82067a4b: 9c pushf // instead of pop %rbx, compiler uses 2 instructions. ffffffff82067a4c: 8f 04 24 pop (%rsp) ffffffff82067a4f: 48 8b 1c 24 mov (%rsp),%rbx ffffffff82067a53: fa cli ffffffff82067a54: b9 01 00 00 00 mov $0x1,%ecx ffffffff82067a59: 31 c0 xor %eax,%eax ffffffff82067a5b: f0 0f b1 0f lock cmpxchg %ecx,(%rdi) ffffffff82067a5f: 75 1d jne ffffffff82067a7e <_raw_spin_lock_irqsave+0x4e> // three instructions to check the stack canary ffffffff82067a61: 65 48 8b 05 b7 15 45 02 mov %gs:0x24515b7(%rip),%rax # <__stack_chk_guard> ffffffff82067a69: 48 3b 44 24 08 cmp 0x8(%rsp),%rax ffffffff82067a6e: 75 17 jne ffffffff82067a87 ... // One extra instruction to adjust the stack. ffffffff82067a73: 48 83 c4 10 add $0x10,%rsp ... // One more instruction in case the stack was mangled. ffffffff82067a87: e8 a4 35 ff ff call ffffffff8205b030 <__stack_chk_fail> This patch changes nothing for gcc, but for clang saves ~20000 bytes of text even though more functions are inlined. $ size vmlinux.gcc.before vmlinux.gcc.after vmlinux.clang.before vmlinux.clang.after text data bss dec hex filename 45565821 25005462 4704800 75276083 47c9f33 vmlinux.gcc.before 45565821 25005462 4704800 75276083 47c9f33 vmlinux.gcc.after 45121072 24638617 5533040 75292729 47ce039 vmlinux.clang.before 45093887 24638633 5536808 75269328 47c84d0 vmlinux.clang.after $ scripts/bloat-o-meter -t vmlinux.clang.before vmlinux.clang.after add/remove: 1/2 grow/shrink: 21/533 up/down: 2250/-22112 (-19862) Signed-off-by: Eric Dumazet <edumazet@google.com> Cc: Uros Bizjak <ubizjak@gmail.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2025-12-20Merge tag 'devicetree-fixes-for-6.19-1' of ↵Linus Torvalds1-0/+55
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree fixes from Rob Herring: - Fix warnings for Mediatek overlays not getting applied - Fix regression in handling elfcorehdr region - Fix creating cpufreq device on OPPv1 platforms - Add GE7800 GPU in Renesas R-Car V3U - Simplify dma-coherent property in TI display bindings - Allow "reg" in sprd,sc9860-clk binding - Update Linus Walleij's email * tag 'devicetree-fixes-for-6.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: arm64: dts: mediatek: Apply mt8395-radxa DT overlay at build time arm64: dts: mediatek: mt7988: add dtbs with applied overlays for bpi-r4 (pro) arm64: dts: mediatek: mt7986: add dtbs with applied overlays for bpi-r3 dt-bindings: Updates Linus Walleij's mail address dt-bindings: gpu: img,powervr-rogue: Document GE7800 GPU in Renesas R-Car V3U cpufreq: dt-platdev: Fix creating device on OPPv1 platforms dt-bindings: clock: sprd,sc9860-clk: Allow "reg" for gate clocks dt-bindings: display/ti: Simplify dma-coherent property arm64: kdump: Fix elfcorehdr overlap caused by reserved memory processing reorder
2025-12-20Merge tag 'mips-fixes_6.19_1' of ↵Linus Torvalds2-3/+3
git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux Pull MIPS fixes from Thomas Bogendoerfer: - Fix build error for Alchemy - Fix reference leak * tag 'mips-fixes_6.19_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: MIPS: Fix a reference leak bug in ip22_check_gio() MIPS: Alchemy: Remove bogus static/inline specifiers
2025-12-20Merge tag 'arm64-fixes' of ↵Linus Torvalds3-127/+37
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Catalin Marinas: "Two left-over updates that could not go into -rc1 due to conflicts with other series: - Simplify checks in arch_kfence_init_pool() since force_pte_mapping() already takes BBML2-noabort (break-before-make Level 2 with no aborts generated) into account - Remove unneeded SVE/SME fallback preserve/store handling in the arm64 EFI. With the recent updates, the fallback path is only taken for EFI runtime calls from hardirq or NMI contexts. In practice, this only happens under panic/oops/emergency_restart() and no restoring of the user state expected. There's a corresponding lkdtm update to trigger a BUG() or panic() from hardirq context together with a fixup not to confuse clang/objtool about the control flow GCS (guarded control stacks) fix: flush the GCS locking state on exec, otherwise the new task will not be able to enable GCS (locked as disabled)" * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: lkdtm/bugs: Do not confuse the clang/objtool with busy wait loop arm64/gcs: Flush the GCS locking state on exec arm64/efi: Remove unneeded SVE/SME fallback preserve/store handling lkdtm/bugs: Add cases for BUG and PANIC occurring in hardirq context arm64: mm: Simplify check in arch_kfence_init_pool()
2025-12-20Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds7-17/+26
Pull x86 kvm fixes from Paolo Bonzini: "x86 fixes. Everyone else is already in holiday mood apparently. - Add a missing 'break' to fix param parsing in the rseq selftest - Apply runtime updates to the _current_ CPUID when userspace is setting CPUID, e.g. as part of vCPU hotplug, to fix a false positive and to avoid dropping the pending update - Disallow toggling KVM_MEM_GUEST_MEMFD on an existing memslot, as it's not supported by KVM and leads to a use-after-free due to KVM failing to unbind the memslot from the previously-associated guest_memfd instance - Harden against similar KVM_MEM_GUEST_MEMFD goofs, and prepare for supporting flags-only changes on KVM_MEM_GUEST_MEMFD memlslots, e.g. for dirty logging - Set exit_code[63:32] to -1 (all 0xffs) when synthesizing a nested SVM_EXIT_ERR (a.k.a. VMEXIT_INVALID) #VMEXIT, as VMEXIT_INVALID is defined as -1ull (a 64-bit value) - Update SVI when activating APICv to fix a bug where a post-activation EOI for an in-service IRQ would effective be lost due to SVI being stale - Immediately refresh APICv controls (if necessary) on a nested VM-Exit instead of deferring the update via KVM_REQ_APICV_UPDATE, as the request is effectively ignored because KVM thinks the vCPU already has the correct APICv settings" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM: nVMX: Immediately refresh APICv controls as needed on nested VM-Exit KVM: VMX: Update SVI during runtime APICv activation KVM: nSVM: Set exit_code_hi to -1 when synthesizing SVM_EXIT_ERR (failed VMRUN) KVM: nSVM: Clear exit_code_hi in VMCB when synthesizing nested VM-Exits KVM: Harden and prepare for modifying existing guest_memfd memslots KVM: Disallow toggling KVM_MEM_GUEST_MEMFD on an existing memslot KVM: selftests: Add a CPUID testcase for KVM_SET_CPUID2 with runtime updates KVM: x86: Apply runtime updates to current CPUID during KVM_SET_CPUID{,2} KVM: selftests: Add missing "break" in rseq_test's param parsing
2025-12-20Merge tag 'for-linus-6.19-rc2-tag' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip Pull xen fix from Juergen Gross: "Just a single patch fixing a sparse warning" * tag 'for-linus-6.19-rc2-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip: x86/xen: Fix sparse warning in enlighten_pv.c
2025-12-20riscv: dts: microchip: convert clock and reset to use sysconConor Dooley1-7/+12
The "subblock" clocks and reset registers on PolarFire SoC are located in the mss-top-sysreg region, alongside pinctrl and interrupt control functionality. Re-write the devicetree to describe the sys explicitly, as its own node, rather than as a region of the clock node. Correspondingly, the phandles to the reset controller must be updated to the new provider. The drivers will continue to support the old way of doing things. Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-12-20riscv: dts: microchip: fix mailbox descriptionConor Dooley1-3/+12
When the binding for the mailbox on PolarFire SoC was originally written, and later modified, mistakes were made - and the precise nature of the later modification should have been a giveaway, but alas I was naive at the time. A more correct modelling of the hardware is to use two syscons and have a single reg entry for the mailbox, containing the mailbox region. The two syscons contain the general control/status registers for the mailbox and the interrupt related registers respectively. The reason for two syscons is that the same mailbox is present on the non-SoC version of the FPGA, which has no interrupt controller, and the shared part of the rtl was unchanged between devices. Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-12-19arm64: dts: broadcom: rp1: drop RP1 overlayAndrea della Porta3-27/+1
RP1 support loaded from overlay has been dropped from the driver and the DTB intended to be loaded with the overlay no longer exists. Drop unused include file and overlay. Signed-off-by: Andrea della Porta <andrea.porta@suse.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/85167b815d41ed9ed690ad239a19de5cd2e8be1c.1766077285.git.andrea.porta@suse.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-12-19arm64: dts: broadcom: bcm2712: fix RP1 endpoint PCI topologyAndrea della Porta3-14/+26
The node describing the RP1 endpoint currently uses a specific name ('rp1_nexus') that does not correctly reflect the PCI topology. Update the DT with the correct topology and use generic node names. Additionally, since the driver dropped overlay support in favor of a fully described DT, rename '...-ovl-rp1.dts' to '...-base.dtsi' for inclusion in the board DTB, as it is no longer compiled as a standalone DTB. Signed-off-by: Andrea della Porta <andrea.porta@suse.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/827b12ba48bb47bc77a0f5e5617aea961c8bc6b5.1766077285.git.andrea.porta@suse.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-12-19arm64: dts: mediatek: Apply mt8395-radxa DT overlay at build timeRob Herring (Arm)1-0/+2
It's a requirement that DT overlays be applied at build time in order to validate them as overlays are not validated on their own. Add missing target for mt8395-radxa hd panel overlay. Fixes: 4c8ff61199a7 ("arm64: dts: mediatek: mt8395-radxa-nio-12l: Add Radxa 8 HD panel") Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Acked-by: AngeloGioacchino Del Regno <angelogiaocchino.delregno@collabora.com> Link: https://patch.msgid.link/20251205215940.19287-1-linux@fw-web.de Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-12-19arm64: dts: mediatek: mt7988: add dtbs with applied overlays for bpi-r4 (pro)Frank Wunderlich1-0/+32
Build devicetree binaries for testing overlays and providing users full dtb without using overlays for Bananapi R4 (pro) variants. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Link: https://patch.msgid.link/20251119175124.48947-3-linux@fw-web.de Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-12-19arm64: dts: mediatek: mt7986: add dtbs with applied overlays for bpi-r3Frank Wunderlich1-0/+21
Build devicetree binaries for testing overlays and providing users full dtb without using overlays. Suggested-by: Rob Herring <robh+dt@kernel.org> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Fixes: a58c36806741 ("arm64: dts: mediatek: mt7988a-bpi-r4pro: Add mmc overlays") Fixes: dec929e61a42 ("arm64: dts: mediatek: mt7988a-bpi-r4-pro: Add PCIe overlays") Fixes: 714a80ced07a ("arm64: dts: mediatek: mt7988a-bpi-r4: Add dt overlays for sd + emmc") Fixes: 312189ebb802 ("arm64: dts: mt7986: add overlay for SATA power socket on BPI-R3") Fixes: 8e01fb15b815 ("arm64: dts: mt7986: add Bananapi R3") Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251119175124.48947-2-linux@fw-web.de Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-12-19riscv: dts: spacemit: Define the P1 PMIC regulators for Milk-V JupiterJavier Martinez Canillas1-0/+110
Define the SpacemiT P1 PMIC voltage regulators and their constraints. The power management hardware design on the Milk-V Jupiter is identical to the Banana Pi BPI-F3, so the DT Nodes were taken from k1-bananapi-f3.dts. Signed-off-by: Javier Martinez Canillas <javierm@redhat.com> Reviewed-by: Yixun Lan <dlan@gentoo.org> Link: https://lore.kernel.org/r/20251206134532.1741648-4-javierm@redhat.com Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-12-19riscv: dts: spacemit: Define fixed regulators for Milk-V JupiterJavier Martinez Canillas1-0/+19
Define the DC power input and the 4v power as fixed regulator supplies. Signed-off-by: Javier Martinez Canillas <javierm@redhat.com> Reviewed-by: Yixun Lan <dlan@gentoo.org> Link: https://lore.kernel.org/r/20251206134532.1741648-3-javierm@redhat.com Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-12-19riscv: dts: spacemit: Enable i2c8 adapter for Milk-V JupiterJavier Martinez Canillas1-0/+6
The adapter is used to access the SpacemiT P1 PMIC present in this board. Signed-off-by: Javier Martinez Canillas <javierm@redhat.com> Reviewed-by: Yixun Lan <dlan@gentoo.org> Link: https://lore.kernel.org/r/20251206134532.1741648-2-javierm@redhat.com Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-12-19perf: Use EXPORT_SYMBOL_FOR_KVM() for the mediated APIsPeter Zijlstra1-2/+3
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://patch.msgid.link/20251208115156.GE3707891@noisy.programming.kicks-ass.net
2025-12-19riscv: Add SBI debug trigger extension and function idsHimanshu Chauhan1-0/+29
Debug trigger extension is an SBI extension to support native debugging in S-mode and VS-mode. This patch adds the extension and the function IDs defined by the extension. Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com> Link: https://patch.msgid.link/20250710125231.653967-2-hchauhan@ventanamicro.com [pjw@kernel.org: updated to apply] Signed-off-by: Paul Walmsley <pjw@kernel.org>
2025-12-19riscv/atomic.h: use RISCV_FULL_BARRIER in _arch_atomic* function.Zongmin Zhou1-4/+4
Replace the same code with the pre-defined macro RISCV_FULL_BARRIER to simplify the code. Signed-off-by: Zongmin Zhou <zhouzongmin@kylinos.cn> Link: https://patch.msgid.link/20251120095831.64211-1-min_halo@163.com Signed-off-by: Paul Walmsley <pjw@kernel.org>
2025-12-19riscv: hwprobe: export Zilsd and Zclsd ISA extensionsPincheng Wang2-0/+5
Export Zilsd and Zclsd ISA extensions through hwprobe. Signed-off-by: Pincheng Wang <pincheng.plct@isrc.iscas.ac.cn> Reviewed-by: Nutty Liu <nutty.liu@hotmail.com> Link: https://patch.msgid.link/20250826162939.1494021-4-pincheng.plct@isrc.iscas.ac.cn [pjw@kernel.org: fixed whitespace; updated to apply] Signed-off-by: Paul Walmsley <pjw@kernel.org>
2025-12-19riscv: add ISA extension parsing for Zilsd and ZclsdPincheng Wang2-0/+26
Add parsing for Zilsd and Zclsd ISA extensions which were ratified in commit f88abf1 ("Integrating load/store pair for RV32 with the main manual") of the riscv-isa-manual. Signed-off-by: Pincheng Wang <pincheng.plct@isrc.iscas.ac.cn> Reviewed-by: Nutty Liu <nutty.liu@hotmail.com> Link: https://patch.msgid.link/20250826162939.1494021-3-pincheng.plct@isrc.iscas.ac.cn [pjw@kernel.org: cleaned up checkpatch issues, whitespace; updated to apply] Signed-off-by: Paul Walmsley <pjw@kernel.org>
2025-12-19riscv: mm: use xchg() on non-atomic_long_t variables, not atomic_long_xchg()Paul Walmsley1-2/+2
Let's not call atomic_long_xchg() on something that's not an atomic_long_t, and just use xchg() instead. Continues the cleanup from commit 546e42c8c6d94 ("riscv: Use an atomic xchg in pudp_huge_get_and_clear()"), Cc: Alexandre Ghiti <alex@ghiti.fr> Signed-off-by: Paul Walmsley <pjw@kernel.org>
2025-12-19riscv: mm: ptep_get_and_clear(): avoid atomic ops when !CONFIG_SMPPaul Walmsley1-0/+6
When !CONFIG_SMP, there's no need for atomic operations in ptep_get_and_clear(), so, similar to x86, let's not use atomics in this case. Cc: Alexandre Ghiti <alex@ghiti.fr> Signed-off-by: Paul Walmsley <pjw@kernel.org>
2025-12-19riscv: mm: pmdp_huge_get_and_clear(): avoid atomic ops when !CONFIG_SMPPaul Walmsley1-0/+6
When !CONFIG_SMP, there's no need for atomic operations in pmdp_huge_get_and_clear(), so, similar to what x86 does, let's not use atomics in this case. See also commit 546e42c8c6d94 ("riscv: Use an atomic xchg in pudp_huge_get_and_clear()"). Cc: Alexandre Ghiti <alex@ghiti.fr> Signed-off-by: Paul Walmsley <pjw@kernel.org>
2025-12-19riscv: signal: abstract header saving for setup_sigcontextAndy Chiu2-21/+44
The function save_v_state() served two purposes. First, it saved extension context into the signal stack. Then, it constructed the extension header if there was no fault. The second part is independent of the extension itself. As a result, we can pull that part out, so future extensions may reuse it. This patch adds arch_ext_list and makes setup_sigcontext() go through all possible extensions' save() callback. The callback returns a positive value indicating the size of the successfully saved extension. Then the kernel proceeds to construct the header for that extension. The kernel skips an extension if it does not exist, or if the saving fails for some reasons. The error code is propagated out on the later case. This patch does not introduce any functional changes. Signed-off-by: Andy Chiu <andybnac@gmail.com> Link: https://patch.msgid.link/20251112-v5_user_cfi_series-v23-16-b55691eacf4f@rivosinc.com Signed-off-by: Paul Walmsley <pjw@kernel.org>
2025-12-19x86/irq_remapping: Sanitize posted_msi_supported()Thomas Gleixner1-2/+3
posted_msi_supported() is a misnomer as it actually checks whether it is enabled or not. Aside of that this does not take CONFIG_X86_POSTED_MSI into account which is required to actually use it. Rename it to posted_msi_enabled() and make the return value depend on CONFIG_X86_POSTED_MSI, which allows the compiler to eliminate the related dead code and data if disabled: text data bss dec hex filename 10046 701 3296 14043 36db drivers/iommu/intel/irq_remapping.o 9904 413 3296 13613 352d drivers/iommu/intel/irq_remapping.o Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://patch.msgid.link/20251125214631.170499997@linutronix.de
2025-12-19x86/irq: Cleanup posted MSI codeThomas Gleixner1-18/+13
Make code and comments readable and use __this_cpu..() as this is guaranteed to be invoked with interrupts disabled. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://patch.msgid.link/20251125214631.108458942@linutronix.de
2025-12-18Merge tag 'libcrypto-fixes-for-linus' of ↵Linus Torvalds1-1/+8
git://git.kernel.org/pub/scm/linux/kernel/git/ebiggers/linux Pull crypto library fixes from Eric Biggers: - Fix a performance issue with the scoped_ksimd() macro (new in 6.19) where it unnecessarily initialized the entire fpsimd state. - Add a missing gitignore entry for a generated file added in 6.18. * tag 'libcrypto-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ebiggers/linux: lib/crypto: riscv: Add poly1305-core.S to .gitignore arm64/simd: Avoid pointless clearing of FP/SIMD buffer
2025-12-18Merge tag 'kvm-x86-fixes-6.19-rc1' of https://github.com/kvm-x86/linux into HEADPaolo Bonzini7-17/+26
KVM fixes for 6.19-rc1 - Add a missing "break" to fix param parsing in the rseq selftest. - Apply runtime updates to the _current_ CPUID when userspace is setting CPUID, e.g. as part of vCPU hotplug, to fix a false positive and to avoid dropping the pending update. - Disallow toggling KVM_MEM_GUEST_MEMFD on an existing memslot, as it's not supported by KVM and leads to a use-after-free due to KVM failing to unbind the memslot from the previously-associated guest_memfd instance. - Harden against similar KVM_MEM_GUEST_MEMFD goofs, and prepare for supporting flags-only changes on KVM_MEM_GUEST_MEMFD memlslots, e.g. for dirty logging. - Set exit_code[63:32] to -1 (all 0xffs) when synthesizing a nested SVM_EXIT_ERR (a.k.a. VMEXIT_INVALID) #VMEXIT, as VMEXIT_INVALID is defined as -1ull (a 64-bit value). - Update SVI when activating APICv to fix a bug where a post-activation EOI for an in-service IRQ would effective be lost due to SVI being stale. - Immediately refresh APICv controls (if necessary) on a nested VM-Exit instead of deferring the update via KVM_REQ_APICV_UPDATE, as the request is effectively ignored because KVM thinks the vCPU already has the correct APICv settings.
2025-12-18arm64: defconfig: enable clocks, interconnect and pinctrl for Qualcomm KaanapaliJingyi Wang1-0/+4
Enable necessary drivers for booting Qualcomm Kaanapali QRD and MTP boards. The serial engine must be properly setup before kernel reach "init", so UART driver and its dependencies needs to be built in, enable its dependency GCC, interconnect and pinctrl as built-in meanwhile enable TCSRCC as module. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251215-knp-dts-v4-2-1541bebeb89f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-12-18arm64: dts: qcom: kaanapali: Add base QRD boardJingyi Wang2-0/+713
Add initial support for Qualcomm Kaanapali QRD board which enables SD Card, UFS and booting to shell with UART console. Written with help from Jishnu Prakash (added RPMhPD nodes), Nitin Rawat (added ufs) and Manish Pandey (added SD Card). Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251215-knp-dts-v4-5-1541bebeb89f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-12-18arm64: dts: qcom: kaanapali: Add base MTP boardJingyi Wang2-0/+755
Add initial support for Qualcomm Kaanapali MTP board which enables PCIe, SD Card, UFS and booting to shell with UART console. Written with help from Jishnu Prakash (added RPMhPD nodes), Nitin Rawat (added UFS), Manish Pandey (added SD Card) and Qiang Yu (added PCIe). Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251215-knp-dts-v4-4-1541bebeb89f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-12-18arm64: dts: qcom: Introduce Kaanapali SoCJingyi Wang1-0/+1606
Kaanapali is Snapdragon SoC from Qualcomm. Features added in this patch: - CPUs with PSCI idle states and cpufreq - Interrupt-controller with PDC wakeup support - Timers, TCSR Clock Controllers - Reserved Shared memory - GCC and RPMHCC - TLMM - Interconnect with CPU BWMONs - QuP with UART - SMMU - RPMhPD - UFS with Inline Crypto Engine - LLCC - Watchdog - SD Card - PCIe Written with help from Raviteja Laggyshetty (added interconnect nodes), Taniya Das (added Clock Controllers and cpufreq), Jishnu Prakash (added RPMhPD), Nitin Rawat (added UFS), Gaurav Kashyap (added ICE), Manish Pandey (added SD Card) and Qiang Yu (added PCIe). Co-developed-by: Tengfei Fan <tengfei.fan@oss.qualcomm.com> Signed-off-by: Tengfei Fan <tengfei.fan@oss.qualcomm.com> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251215-knp-dts-v4-3-1541bebeb89f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
generated by cgit v1.2.3 (git 2.39.0) at 2026-05-27 08:55:02 +0300