summaryrefslogtreecommitdiff
path: root/arch
AgeCommit message (Collapse)AuthorFilesLines
2025-12-29arm64: dts: mba8xx: replace 0 with IMX_LPCG_CLK_0 for lpcg indicesFrank Li1-2/+2
Replace the 0 with IMX_LPCG_CLK_0 for LPCG clock indices. Although the numerical value is identical, the LPCG input is defined as IMX_LPCG_CLK_<n>, so using the symbolic constant improves clarity and consistency with the LPCG clock naming convention. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-12-29arm64: dts: add off-on-delay-us for usdhc2 regulatorHaibo Chen1-0/+1
For SD card, according to the spec requirement, for sd card power reset operation, it need sd card supply voltage to be lower than 0.5v and keep over 1ms, otherwise, next time power back the sd card supply voltage to 3.3v, sd card can't support SD3.0 mode again. To match such requirement on imx8qm-mek board, add 4.8ms delay between sd power off and power on. Fixes: 307fd14d4b14 ("arm64: dts: imx: add imx8qm mek support") Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-12-29arm64: dts: imx8qm-mek: correct the light sensor interrupt type to low levelHaibo Chen1-1/+1
light sensor isl29023 share the interrupt with lsm303arg, but these two devices use different interrupt type. According to the datasheet of these two devides, both support low level trigger type, so correct the interrupt type here to avoid the following error log: irq: type mismatch, failed to map hwirq-11 for gpio@5d0c0000! Fixes: 9918092cbb0e ("arm64: dts: imx8qm-mek: add i2c0 and children devices") Fixes: 1d8a9f043a77 ("arm64: dts: imx8: use defines for interrupts") Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-12-29ARM: dts: nxp: imx: Fix mc13xxx LED node namesRob Herring (Arm)4-10/+10
Node names are supposed to be generic and use hexadecimal unit-addresses. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-12-29arm64: dts: imx95: correct I3C2 pclk to IMX95_CLK_BUSWAKEUPCarlos Song1-1/+1
I3C2 is in WAKEUP domain. Its pclk should be IMX95_CLK_BUSWAKEUP. Fixes: 969497ebefcf ("arm64: dts: imx95: Add i3c1 and i3c2") Signed-off-by: Carlos Song <carlos.song@nxp.com> Cc: stable@vger.kernel.org Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-12-29arm64: dts: ls1028a: Add mbls1028a and mbls1028a-ind devicetreesGregor Herburger5-0/+599
Add device trees for the MBLS1028A and the MBLS1028A-IND and the SoM TQMLS1028A. Signed-off-by: Gregor Herburger <gregor.herburger@tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-12-29arm64: dts: imx8mp libra: add peb-av-10 expansion board overlayYashwanth Varakala3-0/+208
Add an overlay of expansion board (PEB-AV-10) that supports multimedia interfaces, 3.5mm headphone jack, a USB-A port and LVDS, backlight connectors can be connected to the imx8mp libra. Audio works when no display is connected to expansion board. A separate overlay for Powertip display, based on peb-av-10.dtsi and intended for use with PEB-AV-10 expansion board, will be added later as display support is not yet available. Signed-off-by: Yashwanth Varakala <y.varakala@phytec.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-12-29arm64: dts: imx8mp libra: add and update display overlaysYashwanth Varakala4-5/+53
Add imx8mp-libra-rdk-fpsc-lvds-ph128800t006-zhc01.dtso devicetree display overlay for the i.MX8MP Libra RDK platform. The overlay enable LVDS display configuration. To keep the consistent style of panel and backlight nodes and labels. They are updated in imx8mp-libra base board devicetree and etml1010g3dra display overlay. Signed-off-by: Yashwanth Varakala <y.varakala@phytec.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-12-29arm64: dts: imx943-evk: add ENETC, EMDIO and PTP Timer supportWei Fang1-0/+100
Add ENETC instance 1~3, EMDIO and PTP Timer 0~1 support. The EMDIO provides MDIO bus for ENETCs to access their external PHYs. The PTP Timer provides current time with nanosecond resolution, precise periodic pulse, pulse on timeout, and time capture on external pulse support. It also provides PTP clock for ENETCs to implement time synchronization as required for IEEE 1588 and IEEE 802.1AS-2020. Signed-off-by: Wei Fang <wei.fang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-12-29arm64: dts: imx94: add basic NETC related nodesWei Fang1-0/+138
The NETC related nodes for i.MX94, this NETC has two PCIe buses, the bus 0 has 1 ENETC instance, one PTP timer, one RCEC and a switch, currently, the switch is not added due to the DT binding and the driver is not ready at the moment. The bus 1 has three ENETC instances, 2 PTP timers, 1 RCEC and one EMDIO. Signed-off-by: Wei Fang <wei.fang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-12-29arm64: dts: imx8dxl-ss-ddr: Add DB (system interconnects) pmu support for ↵Jacky Bai2-0/+29
i.MX8DXL Add DB pmu related nodes. This pmu is in DB (system interconnects). Signed-off-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-12-29arm64: dts: imx8qm: add ddr perf device nodeFrank Li3-1/+22
Add ddr perf monitor device node for i.MX8QM. Change imx8-ss-ddr.dtsi's compatible string to fsl,imx8qxp-ddr-pmu. i.MX8QM overwrite to fsl,imx8qm-ddr-pmu. All fallback to fsl,imx8-ddr-pmu. Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-12-28Merge tag 'riscv-for-linus-6.19-rc3' of ↵Linus Torvalds9-27/+122
git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V updates from Paul Walmsley: "Nothing exotic here; these are the cleanup and new ISA extension probing patches (not including CFI): - Add probing and userspace reporting support for the standard RISC-V ISA extensions Zilsd and Zclsd, which implement load/store dual instructions on RV32 - Abstract the register saving code in setup_sigcontext() so it can be used for stateful RISC-V ISA extensions beyond the vector extension - Add the SBI extension ID and some initial data structure definitions for the RISC-V standard SBI debug trigger extension - Clean up some code slightly: change some page table functions to avoid atomic operations oinn !SMP and to avoid unnecessary casts to atomic_long_t; and use the existing RISCV_FULL_BARRIER macro in place of some open-coded 'fence rw,rw' instructions" * tag 'riscv-for-linus-6.19-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: riscv: Add SBI debug trigger extension and function ids riscv/atomic.h: use RISCV_FULL_BARRIER in _arch_atomic* function. riscv: hwprobe: export Zilsd and Zclsd ISA extensions riscv: add ISA extension parsing for Zilsd and Zclsd dt-bindings: riscv: add Zilsd and Zclsd extension descriptions riscv: mm: use xchg() on non-atomic_long_t variables, not atomic_long_xchg() riscv: mm: ptep_get_and_clear(): avoid atomic ops when !CONFIG_SMP riscv: mm: pmdp_huge_get_and_clear(): avoid atomic ops when !CONFIG_SMP riscv: signal: abstract header saving for setup_sigcontext
2025-12-28arm64: dts: exynos: gs101: add OTP nodeTudor Ambarus1-0/+8
Add the OTP controller node. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Reviewed-by: André Draszik <andre.draszik@linaro.org> Link: https://patch.msgid.link/20251222-gs101-chipid-v4-5-aa8e20ce7bb3@linaro.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2025-12-25ARM: dts: lpc3250-phy3250: replace deprecated at25 properties with new onesFrank Li1-3/+3
Replace deprecated at25 properties with the required properties (size, address-width and pagesize), which duplicate the removed properties. Fix below CHECK_DTB warning: arch/arm/boot/dts/nxp/lpc/lpc3250-phy3250.dtb: at25@0 (atmel,at25): 'pagesize' is a required property arch/arm/boot/dts/nxp/lpc/lpc3250-phy3250.dtb: at25@0 (atmel,at25): $nodename: 'anyOf' conditional failed, one must be fixed: Signed-off-by: Frank Li <Frank.Li@nxp.com> [vzapolskiy: squashed two changes from the series and updated commit message] Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2025-12-25ARM: dts: lpc3250-phy3250: rename nodename at@0 to eeprom@0Frank Li1-1/+1
Rename nodename at@0 to eeprom@0 to fix below CHECK_DTBS warnings: arch/arm/boot/dts/nxp/lpc/lpc3250-phy3250.dtb: at25@0 (atmel,at25): $nodename: 'anyOf' conditional failed, one must be fixed: 'at25@0' does not match '^eeprom@[0-9a-f]{1,2}$' 'at25@0' does not match '^fram@[0-9a-f]{1,2}$' Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2025-12-25ARM: dts: lpc3250-ea3250: add key- prefix for gpio-keysFrank Li1-9/+9
Add key- prefix to fix below CHECK_DTB warning: arch/arm/boot/dts/nxp/lpc/lpc3250-ea3250.dtb: gpio-keys (gpio-keys): 'joy0', ... do not match any of the regexes: '^(button|...)$', 'pinctrl-[0-9]+ Reviewed-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2025-12-25ARM: dts: lpc32xx: remove usb bus and elevate all children nodesFrank Li1-42/+35
Remove usb bus and elevate all children nodes because usb bus is not existed and only group usb devices logically. Update register address and related full node name. Fix below CHECK_DTBS warnings: arm/boot/dts/nxp/lpc/lpc3250-ea3250.dtb: usb (simple-bus): $nodename:0: 'usb' does not match '^([a-z][a-z0-9\\-]+-bus|bus|localbus|soc|axi|ahb|apb)(@.+)?$' from schema $id: http://devicetree.org/schemas/simple-bus.yaml# Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2025-12-24riscv: dts: sophgo: cv180x: fix USB dwc2 FIFO sizesAnton D. Stavinskii1-2/+2
I've tested the current dwc2 FIFO configuration and found that USB device mode breaks in ECM mode when transmitting frames larger than 128 bytes. For example, large ICMP packets or iperf3 traffic cause the USB link to hang and eventually disconnect without any messages in dmesg. After switching to more conservative FIFO sizes, ECM becomes stable and no longer drops the connection. iperf3 now shows ~130 Mbit/s RX and ~100 Mbit/s TX on SG2002 (MilkV Duo 256M). Fix the FIFO sizes accordingly. Signed-off-by: Anton D. Stavinskii <stavinsky@gmail.com> Reviewed-by: Inochi Amaoto <inochiama@gmail.com> Fixes: e307248a3c2d ("riscv: dts: sophgo: Add USB support for cv18xx") Link: https://lore.kernel.org/r/20251126172115.1894190-2-stavinsky@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-12-24riscv: dts: spacemit: PCIe and PHY-related updatesAlex Elder3-0/+245
Define PCIe and PHY-related Device Tree nodes for the SpacemiT K1 SoC. Enable the combo PHY and the two PCIe-only PHYs on the Banana Pi BPI-F3 board. The combo PHY is used for USB on this board, and that will be enabled when USB 3 support is accepted. The combo PHY must perform a calibration step to determine configuration values used by the PCIe-only PHYs. As a result, it must be enabled if either of the other two PHYs is enabled. Signed-off-by: Alex Elder <elder@riscstar.com> Reviewed-by: Yixun Lan <dlan@gentoo.org> Tested-by: Yixun Lan <dlan@gentoo.org> Link: https://lore.kernel.org/r/20251218151235.454997-6-elder@riscstar.com Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-12-24riscv: dts: spacemit: Add a PCIe regulatorAlex Elder1-0/+8
Define a 3.3v fixed voltage regulator to be used by PCIe on the Banana Pi BPI-F3. On this platform, this regulator is always on. Signed-off-by: Alex Elder <elder@riscstar.com> Reviewed-by: Yixun Lan <dlan@gentoo.org> Tested-by: Yixun Lan <dlan@gentoo.org> Link: https://lore.kernel.org/r/20251218151235.454997-5-elder@riscstar.com Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-12-23arm64: dts: allwinner: t527: orangepi-4a: Enable SPI-NOR flashChen-Yu Tsai1-0/+15
The Orangepi 4A has a SPI-NOR flash connected to spi0 on the PC pins. The HOLD and WP pins are not connected, and are instead pulled up by the supply rail. Enable spi0 and add a device node for the SPI-NOR flash. Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://patch.msgid.link/20251221110513.1850535-5-wens@kernel.org Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
2025-12-23arm64: dts: allwinner: sun55i: Add SPI controllersChen-Yu Tsai1-0/+94
The A523 family SoCs have four SPI controllers. One of them also supports DBI mode. Add device nodes for all of them. Also add pinmux nodes for spi0 on the PC pins, which is commonly used for SPI-NOR boot flash. Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://patch.msgid.link/20251221110513.1850535-4-wens@kernel.org Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
2025-12-23s390: Implement ARCH_HAS_CC_CAN_LINKThomas Weißschuh1-0/+9
The generic CC_CAN_LINK detection relies on -m32/-m64 compiler flags. Some s390 toolchains use -m31 instead but that is not supported in the kernel. Make the logic easier to understand and allow the simplification of the generic CC_CAN_LINK by using a tailored implementation. Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2025-12-22arm64: dts: rockchip: Add support for CM5 IO carrierJoseph Kogut2-0/+340
Specification: - 1x HDMI - 2x MIPI DSI - 2x MIPI CSI - 1x eDP - 1x M.2 E key - 1x USB 3.0 Host - 1x USB 3.0 OTG - 2x USB 2.0 Host - Headphone jack w/ microphone - Gigabit Ethernet w/ PoE - microSD slot - 40-pin expansion header - 12V DC Signed-off-by: Joseph Kogut <joseph.kogut@gmail.com> Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Link: https://patch.msgid.link/20251205120703.14721-4-naoki@radxa.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-12-22arm64: dts: rockchip: Add rk3588 based Radxa CM5Joseph Kogut1-0/+280
Add initial support for the Radxa Compute Module 5 (CM5). The CM5 uses a proprietary connector. Specification: - Rockchip RK3588 - Up to 32 GB LPDDR4X - Up to 128 GB eMMC - 1x HDMI TX up to 8k@60 hz - 1x eDP TX up to 4k@60 hz - Gigabit Ethernet PHY Signed-off-by: Joseph Kogut <joseph.kogut@gmail.com> Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Link: https://patch.msgid.link/20251205120703.14721-3-naoki@radxa.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-12-22arm64: dts: rockchip: Fix Bluetooth on the RockPro64 boardRaphaël Jakse2-0/+14
The RockPro64 board has an optional BCM4345C5 Bluetooth device on UART0. This patch fixes audio stutters by setting its correct max-speed and compatible properties. Signed-off-by: Raphaël Jakse <raphael.kernel@jakse.fr> Link: https://patch.msgid.link/20251130161259.9828-1-raphael.kernel@jakse.fr Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-12-22arm64: dts: rockchip: Correctly describe the ethernet phy on rk3368-lionHeiko Stuebner1-3/+19
So far, the board used the phy implicitly using the deprecated snps reset properties. Improve that and describe the PHY correctly under the new mdio node. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Link: https://patch.msgid.link/20251020100757.3669681-4-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-12-22arm64: dts: rockchip: add mdio subnode to gmac on rk3368Heiko Stuebner1-0/+6
This is needed to actually describe the per-board phys connected to the gmac when needed. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Link: https://patch.msgid.link/20251020100757.3669681-3-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-12-22arm64: dts: rockchip: add gmac reset property to rk3368Heiko Stuebner1-0/+2
Add the reset of the gmac controller block. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Link: https://patch.msgid.link/20251020100757.3669681-2-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-12-22arm64: dts: rockchip: add dma-coherent for pcie and gmac of RK3576Shawn Lin1-0/+4
The RK3576 SoC employs ARM CCI for maintaining cache coherency between the CPU cluster and high-speed peripherals including USB3, SATA, GMAC, and PCIe controllers. While the USB3 and SATA controllers were correctly marked as dma-coherent, the GMAC and PCIe nodes were overlooked. Without dma-coherent, the kernel falls back to software cache maintenance for DMA operations, requiring explicit cache flushing and invalidating. This adds significant overhead that degrades performance in high-throughput workloads. Add the missing dma-coherent properties to enable hardware coherency and avoid unnecessary software cache management overhead. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Link: https://patch.msgid.link/1764313762-78063-1-git-send-email-shawn.lin@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-12-22arm64: dts: rockchip: Add EEPROMs for Radxa rk35xx boardsFUKAUMI Naoki6-1/+59
The BL24C16A EEPROM is found in the schematics for Radxa CM3I, Radxa ROCK 3A, 3B, 5B+, and 5T. [1] [2] [3] [4] [5] The BL24C16F EEPROM is found in the schematic for Radxa ROCK 4D. [6] Add these eeprom nodes. These are designed to have data written during factory programming (regardless of whether data is actually written or not), and we at Radxa permit users to read the data but not write to it. [8] Therefore, we will add a read-only property to the eeprom node. [1] https://dl.radxa.com/cm3i/docs/hw/radxa_cm3i_v1310_schematic.pdf p.8 [2] https://dl.radxa.com/rock3/docs/hw/3a/radxa_rock_3a_v1310_schematic.pdf p.7 [3] https://dl.radxa.com/rock3/docs/hw/3b/Radxa_ROCK_3B_V1.51_SCH.pdf p.35 [4] https://dl.radxa.com/rock5/5b+/docs/hw/radxa_rock5bp_v1.2_schematic.pdf p.29 [5] https://dl.radxa.com/rock5/5t/docs/hw/radxa_rock5t_schematic_v1.2_20250109.pdf p.36 [6] https://dl.radxa.com/rock4/4d/docs/hw/Radxa_ROCK_4D_SCH_V1.12.pdf p.23 [7] https://github.com/radxa/u-boot/blob/next-dev-v2024.10/drivers/misc/radxa-i2c-eeprom.c Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Link: https://patch.msgid.link/20251202084941.1785-4-naoki@radxa.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-12-22arm64: dts: rockchip: Add EEPROMs for Radxa ROCK 4 boardsFUKAUMI Naoki3-0/+28
The BL24C04A EEPROM is found in the schematics for Radxa ROCK Pi 4A+ and 4B+. [1] [2] The BL24C16A EEPROM is found in the schematics for Radxa ROCK 4C+, 4SE, Radxa ROCK Pi 4A, 4B, and 4C. [3] [4] [5] [6] [7] However, newer boards/batches should have the BL24C16A, but older ones may have the BL24C04A. (the ROCK Pi 4B+ I own has a 16Kb EEPROM) For the ROCK Pi 4s (except the relatively new ROCK 4SE), add the BL24C04A eeprom node for backward compatibility. For the ROCK 4SE, add the BL24C16A eeprom node. These are designed to have data written during factory programming (regardless of whether data is actually written or not), and we at Radxa permit users to read the data but not write to it. [8] Therefore, we will add a read-only property to the eeprom node. [1] https://dl.radxa.com/rockpi4/docs/hw/rockpi4/4ap/radxa_rock_4ap_v1730_schematic.pdf p.17 [2] https://dl.radxa.com/rockpi4/docs/hw/rockpi4/4bp/radxa_rock_4bp_v1730_schematic.pdf p.17 [3] https://dl.radxa.com/rockpi4/docs/hw/rockpi4/ROCK-4C+-V1.411-SCH.pdf p.22 [4] https://dl.radxa.com/rockpi4/docs/hw/rockpi4/ROCK-4-SE-V1.53-SCH.pdf p.17 [5] https://dl.radxa.com/rockpi4/docs/hw/rockpi4/4a/ROCK_4A_V1.52_SCH.pdf p.17 [6] https://dl.radxa.com/rockpi4/docs/hw/rockpi4/4b/ROCK_4B_v1.52_SCH.pdf p.17 [7] https://dl.radxa.com/rockpi4/docs/hw/rockpi4/rockpi4c_v12_sch_20200620.pdf p.17 [8] https://github.com/radxa/u-boot/blob/next-dev-v2024.10/drivers/misc/radxa-i2c-eeprom.c Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Link: https://patch.msgid.link/20251202084941.1785-3-naoki@radxa.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-12-22arm64: dts: rockchip: Add PCIe clkreq stuff for RK3588 EVB1Shawn Lin1-2/+5
Add supports-clkreq and pinmux for PCIe ASPM L1 substates. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Acked-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Hans Zhang <hans.zhang@cixtech.com> Link: https://patch.msgid.link/1764809428-183623-1-git-send-email-shawn.lin@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-12-22arm64: dts: rockchip: enable saradc for ArmSoM Sige5Chukun Pan1-0/+5
Add ADC support to ArmSoM Sige5 board. Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> Link: https://patch.msgid.link/20251220100010.26643-3-amadeus@jmu.edu.cn Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-12-22arm64: dts: rockchip: fix hp-det pin for ArmSoM Sige5Chukun Pan1-2/+2
Although the hp_det pin is not used, according to the schematic, the headphone detection pin is GPIO4_B0. Fix the incorrect pin. Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://patch.msgid.link/20251220100010.26643-2-amadeus@jmu.edu.cn Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-12-22arm64: dts: rockchip: remove rtc regulator for ArmSoM Sige5Chukun Pan1-10/+0
According to the schematic, RTC is powered by vcc_3v3_s3. The vcc_3v3_rtc_s5 regulator does not exist, remove it. Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://patch.msgid.link/20251220100010.26643-1-amadeus@jmu.edu.cn Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-12-22powerpc/32: Restore disabling of interrupts at interrupt/syscall exitChristophe Leroy (CS GROUP)4-17/+6
Commit 2997876c4a1a ("powerpc/32: Restore clearing of MSR[RI] at interrupt/syscall exit") delayed clearing of MSR[RI], but missed that both MSR[RI] and MSR[EE] are cleared at the same time, so the commit also delayed the disabling of interrupts, leading to unexpected behaviour. To fix that, mostly revert the blamed commit and restore the clearing of MSR[RI] in interrupt_exit_kernel_prepare() instead. For 8xx it implies adding a synchronising instruction after the mtspr in order to make sure no instruction counter interrupt (used for perf events) will fire just after clearing MSR[RI]. Reported-by: Christian Zigotzky <chzigotzky@xenosoft.de> Closes: https://lore.kernel.org/all/4d0bd05d-6158-1323-3509-744d3fbe8fc7@xenosoft.de/ Reported-by: Guenter Roeck <linux@roeck-us.net> Closes: https://lore.kernel.org/all/6b05eb1c-fdef-44e0-91a7-8286825e68f1@roeck-us.net/ Fixes: 2997876c4a1a ("powerpc/32: Restore clearing of MSR[RI] at interrupt/syscall exit") Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/585ea521b2be99d293b539bbfae148366cfb3687.1766146895.git.chleroy@kernel.org
2025-12-22arm64: dts: rockchip: remove redundant max-link-speed from nanopi-r4sGeraldo Nascimento1-1/+0
This is already the default in rk3399-base.dtsi, remove redundant declaration from rk3399-nanopi-r4s.dtsi. Fixes: db792e9adbf8 ("rockchip: rk3399: Add support for FriendlyARM NanoPi R4S") Cc: stable@vger.kernel.org Reported-by: Dragan Simic <dsimic@manjaro.org> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Signed-off-by: Geraldo Nascimento <geraldogabriel@gmail.com> Acked-by: Shawn Lin <shawn.lin@rock-chips.com> Link: https://patch.msgid.link/6694456a735844177c897581f785cc00c064c7d1.1763415706.git.geraldogabriel@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-12-22arm64: dts: rockchip: remove dangerous max-link-speed from helios64Geraldo Nascimento1-1/+0
Shawn Lin from Rockchip strongly discourages attempts to use their RK3399 PCIe core at 5.0 GT/s speed, citing concerns about catastrophic failures that may happen. Even if the odds are low, drop from last user of this non-default property for the RK3399 platform, helios64 board dts. Fixes: 755fff528b1b ("arm64: dts: rockchip: add variables for pcie completion to helios64") Link: https://lore.kernel.org/all/e8524bf8-a90c-423f-8a58-9ef05a3db1dd@rock-chips.com/ Cc: stable@vger.kernel.org Reported-by: Shawn Lin <shawn.lin@rock-chips.com> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Signed-off-by: Geraldo Nascimento <geraldogabriel@gmail.com> Acked-by: Shawn Lin <shawn.lin@rock-chips.com> Link: https://patch.msgid.link/43bb639c120f599106fca2deee6c6599b2692c5c.1763415706.git.geraldogabriel@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-12-22arm64: dts: rockchip: fix unit-address for RK3588 NPU's core1 and core2's IOMMUQuentin Schulz1-2/+2
The Device Tree specification specifies[1] that """ Each node in the devicetree is named according to the following convention: node-name@unit-address [...] The unit-address must match the first address specified in the reg property of the node. """ The first address in the reg property is fdaXa000 and not fdaX9000. This is likely a copy-paste error as the IOMMU for core0 has two entries in the reg property, the first one being fdab9000 and the second fdaba000. Let's fix this oversight to match what the spec is expecting. [1] https://github.com/devicetree-org/devicetree-specification/releases/download/v0.4/devicetree-specification-v0.4.pdf 2.2.1 Node Names Fixes: a31dfc060a74 ("arm64: dts: rockchip: Add nodes for NPU and its MMU to rk3588-base") Cc: stable@vger.kernel.org Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Link: https://patch.msgid.link/20251215-npu-dt-node-address-v1-1-840093e8a2bf@cherry.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-12-22powerpc/powernv: Enable cpuidle state detection for POWER11Aboorva Devarajan1-4/+5
Extend cpuidle state detection to POWER11 by updating the PVR check. This ensures POWER11 correctly recognizes supported stop states, similar to POWER9 and POWER10. Without Patch: (Power11 - PowerNV systems) CPUidle driver: powernv_idle CPUidle governor: menu analyzing CPU 927: Number of idle states: 1 Available idle states: snooze snooze: Flags/Description: snooze Latency: 0 Usage: 251631 Duration: 207497715900 -- With Patch: (Power11 - PowerNV systems) CPUidle driver: powernv_idle CPUidle governor: menu analyzing CPU 959: Number of idle states: 4 Available idle states: snooze stop0_lite stop0 stop3 snooze: Flags/Description: snooze Latency: 0 Usage: 2 Duration: 33 stop0_lite: Flags/Description: stop0_lite Latency: 1 Usage: 1 Duration: 52 stop0: Flags/Description: stop0 Latency: 10 Usage: 13 Duration: 1920 stop3: Flags/Description: stop3 Latency: 45 Usage: 381 Duration: 21638478 Signed-off-by: Aboorva Devarajan <aboorvad@linux.ibm.com> Tested-by: Madadi Vineeth Reddy <vineethr@linux.ibm.com> Reviewed-by: Madadi Vineeth Reddy <vineethr@linux.ibm.com> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/20250908085123.216780-1-aboorvad@linux.ibm.com
2025-12-22powerpc: Add reloc_offset() to font bitmap pointer used for bootx_printf()Finn Thain1-1/+2
Since Linux v6.7, booting using BootX on an Old World PowerMac produces an early crash. Stan Johnson writes, "the symptoms are that the screen goes blank and the backlight stays on, and the system freezes (Linux doesn't boot)." Further testing revealed that the failure can be avoided by disabling CONFIG_BOOTX_TEXT. Bisection revealed that the regression was caused by a change to the font bitmap pointer that's used when btext_init() begins painting characters on the display, early in the boot process. Christophe Leroy explains, "before kernel text is relocated to its final location ... data is addressed with an offset which is added to the Global Offset Table (GOT) entries at the start of bootx_init() by function reloc_got2(). But the pointers that are located inside a structure are not referenced in the GOT and are therefore not updated by reloc_got2(). It is therefore needed to apply the offset manually by using PTRRELOC() macro." Cc: stable@vger.kernel.org Link: https://lists.debian.org/debian-powerpc/2025/10/msg00111.html Link: https://lore.kernel.org/linuxppc-dev/d81ddca8-c5ee-d583-d579-02b19ed95301@yahoo.com/ Reported-by: Cedar Maxwell <cedarmaxwell@mac.com> Closes: https://lists.debian.org/debian-powerpc/2025/09/msg00031.html Bisected-by: Stan Johnson <userm57@yahoo.com> Tested-by: Stan Johnson <userm57@yahoo.com> Fixes: 0ebc7feae79a ("powerpc: Use shared font data") Suggested-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Finn Thain <fthain@linux-m68k.org> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/22b3b247425a052b079ab84da926706b3702c2c7.1762731022.git.fthain@linux-m68k.org
2025-12-22arm64: dts: rockchip: Fix wifi interrupts flag on Sakura Pi RK3308BKrzysztof Kozlowski1-1/+1
GPIO_ACTIVE_x flags are not correct in the context of interrupt flags. These are simple defines so they could be used in DTS but they will not have the same meaning: GPIO_ACTIVE_HIGH = 0 = IRQ_TYPE_NONE. Correct the interrupt flags, assuming the author of the code wanted same logical behavior behind the name "ACTIVE_xxx", this is: ACTIVE_HIGH => IRQ_TYPE_LEVEL_HIGH Fixes: 79f2a1702441 ("arm64: dts: rockchip: add DTs for Sakura Pi RK3308B") Cc: stable+noautosel@kernel.org # Needs testing, because actual level is just a guess Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Acked-by: Chiyuki Akatsuki <thesnowfield@sakurapi.org> Link: https://patch.msgid.link/20251217091808.38253-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-12-22powerpc/tools: drop `-o pipefail` in gcc check scriptsJan Stancek2-2/+0
Fixes: 0f71dcfb4aef ("powerpc/ftrace: Add support for -fpatchable-function-entry") Fixes: b71c9ffb1405 ("powerpc: Add arch/powerpc/tools directory") Reported-by: Joe Lawrence <joe.lawrence@redhat.com> Acked-by: Joe Lawrence <joe.lawrence@redhat.com> Signed-off-by: Jan Stancek <jstancek@redhat.com> Fixes: 8c50b72a3b4f ("powerpc/ftrace: Add Kconfig & Make glue for mprofile-kernel") Fixes: abba759796f9 ("powerpc/kbuild: move -mprofile-kernel check to Kconfig") Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Reviewed-by: Naveen N Rao (AMD) <naveen@kernel.org> Reviewed-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/cc6cdd116c3ad9d990df21f13c6d8e8a83815bbd.1758641374.git.jstancek@redhat.com
2025-12-22powerpc/kexec: Enable SMT before waking offline CPUsNysal Jan K.A.1-0/+19
If SMT is disabled or a partial SMT state is enabled, when a new kernel image is loaded for kexec, on reboot the following warning is observed: kexec: Waking offline cpu 228. WARNING: CPU: 0 PID: 9062 at arch/powerpc/kexec/core_64.c:223 kexec_prepare_cpus+0x1b0/0x1bc [snip] NIP kexec_prepare_cpus+0x1b0/0x1bc LR kexec_prepare_cpus+0x1a0/0x1bc Call Trace: kexec_prepare_cpus+0x1a0/0x1bc (unreliable) default_machine_kexec+0x160/0x19c machine_kexec+0x80/0x88 kernel_kexec+0xd0/0x118 __do_sys_reboot+0x210/0x2c4 system_call_exception+0x124/0x320 system_call_vectored_common+0x15c/0x2ec This occurs as add_cpu() fails due to cpu_bootable() returning false for CPUs that fail the cpu_smt_thread_allowed() check or non primary threads if SMT is disabled. Fix the issue by enabling SMT and resetting the number of SMT threads to the number of threads per core, before attempting to wake up all present CPUs. Fixes: 38253464bc82 ("cpu/SMT: Create topology_smt_thread_allowed()") Reported-by: Sachin P Bappalige <sachinpb@linux.ibm.com> Cc: stable@vger.kernel.org # v6.6+ Reviewed-by: Srikar Dronamraju <srikar@linux.ibm.com> Signed-off-by: Nysal Jan K.A. <nysal@linux.ibm.com> Tested-by: Samir M <samir@linux.ibm.com> Reviewed-by: Sourabh Jain <sourabhjain@linux.ibm.com> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/20251028105516.26258-1-nysal@linux.ibm.com
2025-12-22arm64: dts: exynos: gs101: add samsung,sysreg property to CMU nodesPeter Griffin1-0/+6
With the exception of cmu_top, each CMU has a corresponding sysreg bank that contains the BUSCOMPONENT_DRCG_EN and optional MEMCLK registers. The BUSCOMPONENT_DRCG_EN register enables dynamic root clock gating of bus components and MEMCLK gates the sram clock. Now the clock driver supports automatic clock mode, provide the samsung,sysreg property so the driver can enable dynamic root clock gating of bus components and gate sram clock. Note without the property specified the driver simply falls back to previous behaviour of not configuring these registers so it is not an ABI break. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Link: https://patch.msgid.link/20251222-automatic-clocks-v7-2-fec86fa89874@linaro.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2025-12-22s390/ptrace: Convert function macros to inline functionsJens Remus1-11/+26
Convert the function macros user_mode(), instruction_pointer(), and user_stack_pointer() to inline functions, to align their definition with x86 and arm64. Use const qualifier on struct pt_regs pointer parameters to prevent compiler warnings: arch/s390/kernel/stacktrace.c: In function ‘arch_stack_walk_user_common’: arch/s390/kernel/stacktrace.c:114:34: warning: passing argument 1 of ‘instruction_pointer’ discards ‘const’ qualifier from pointer target type [-Wdiscarded-qualifiers] ... arch/s390/kernel/stacktrace.c:117:48: warning: passing argument 1 of ‘user_stack_pointer’ discards ‘const’ qualifier from pointer target type [-Wdiscarded-qualifiers] ... While at it add const qualifier to all struct pt_regs pointer parameters that are accessed read-only and use __always_inline instead of inline to harmonize the helper functions. [hca@linux.ibm.com: Use psw_bits() helper] Reviewed-by: Heiko Carstens <hca@linux.ibm.com> Signed-off-by: Jens Remus <jremus@linux.ibm.com> Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2025-12-22s390/purgatory: Add -Wno-default-const-init-unsafe to KBUILD_CFLAGSHeiko Carstens1-0/+1
Add -Wno-default-const-init-unsafe to purgatory KBUILD_CFLAGS, similar to scripts/Makefile.extrawarn, since clang generates warnings for the dummy variable in typecheck(): CC arch/s390/purgatory/purgatory.o arch/s390/include/asm/ptrace.h:221:9: warning: default initialization of an object of type 'typeof (regs->psw)' (aka 'const psw_t') leaves the object uninitialized [-Wdefault-const-init-var-unsafe] 221 | return psw_bits(regs->psw).pstate; | ^ arch/s390/include/asm/ptrace.h:98:2: note: expanded from macro 'psw_bits' 98 | typecheck(psw_t, __psw); \ | ^ include/linux/typecheck.h:11:12: note: expanded from macro 'typecheck' 11 | typeof(x) __dummy2; \ | ^ Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2025-12-22s390/boot: Add -Wno-default-const-init-unsafe to KBUILD_CFLAGSHeiko Carstens1-0/+1
Add -Wno-default-const-init-unsafe to boot KBUILD_CFLAGS, similar to scripts/Makefile.extrawarn, since clang generates warnings for the dummy variable in typecheck(): CC arch/s390/boot/version.o arch/s390/include/asm/ptrace.h:221:9: warning: default initialization of an object of type 'typeof (regs->psw)' (aka 'const psw_t') leaves the object uninitialized [-Wdefault-const-init-var-unsafe] 221 | return psw_bits(regs->psw).pstate; | ^ arch/s390/include/asm/ptrace.h:98:2: note: expanded from macro 'psw_bits' 98 | typecheck(psw_t, __psw); \ | ^ include/linux/typecheck.h:11:12: note: expanded from macro 'typecheck' 11 | typeof(x) __dummy2; \ | ^ Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
generated by cgit v1.2.3 (git 2.39.0) at 2026-05-27 05:30:50 +0300