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Enable the LPSPI6 controller so it can be used by user applications
through the board’s expansion connector.
Signed-off-by: Stefano Radaelli <stefano.r@variscite.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The Symphony carrier board includes a USB Type-C connector on the USB1
port through an NXP PTN5150 Type-C controller connected on the I2C bus.
The PTN5150 provides cable orientation detection and role switching
information to the USB controller.
This patch adds the PTN5150 node, its interrupt line, the required pin
muxing, and wires the controller to the USB1 OTG dual-role device using
the USB role-switch framework.
This patch adds also USB2 support, that remains in host-only mode,
matching the hardware capabilities of the Symphony board.
Signed-off-by: Stefano Radaelli <stefano.r@variscite.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The Symphony carrier board exposes a capacitive touch interface through an
FFC/FPC connector. This interface is wired to an FT5x06 touch controller
on the I2C bus when using Variscite’s 7-inch capacitive touch display.
This patch adds the FT5x06 device node to describe the actual hardware
connection and enables touch functionality on the Symphony board
Signed-off-by: Stefano Radaelli <stefano.r@variscite.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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This patch introduces 2 simple aliases:
Add a gpio3->gpio4 alias to allow flexible access to these GPIOs
Add a gpio4 alias for the PCA9534 GPIO expander.
Signed-off-by: Stefano Radaelli <stefano.r@variscite.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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PEB-WLBT-05 is an expansion board that provides WIFI and Bluetooth
functionality. It features the Ezurio Sterling LWB module [1].
Add missing regulator to baseboard dts.
[1] https://www.ezurio.com/wireless-modules/wifi-modules-bluetooth/sterling-lwb-24-ghz-wifi-4-bt-51-module
Signed-off-by: Yannic Moog <y.moog@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The i2c3 of the phyBOARD-Pollux is used on the CSI1 interface to connect
to imaging sensors. Thus define it so it can be easily enabled if
required.
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Yannic Moog <y.moog@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The spi flash on the SoM is missing its vcc supply definition. Add
missing regulator which supplies the flash with 1.8V.
Signed-off-by: Yannic Moog <y.moog@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add 5v regulator to gpio fan node.
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Yannic Moog <y.moog@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add audio XCVR sound card, which supports SPDIF TX & RX only,
eARC RX, ARC RX are not supported.
Signed-off-by: Chancel Liu <chancel.liu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add PDM micphone sound card support.
This sound card supports recording sound from PDM microphone
and convert the PDM format data to PCM data.
Signed-off-by: Chancel Liu <chancel.liu@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add WM8962 sound card support which connects to SAI3.
Signed-off-by: Chancel Liu <chancel.liu@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add bt-sco sound card, which is used by BT HFP case.
It supports wb profile as default.
Signed-off-by: Chancel Liu <chancel.liu@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Refine label with "wm8962" and node name with "codec" to follow
devicetree specification.
Signed-off-by: Chancel Liu <chancel.liu@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The commit 616effc0272b5 ("arm64: dts: imx8: Fix lpuart DMA channel
order") swap uart rx and tx channel at common imx8-ss-dma.dtsi. But miss
update imx8qm-ss-dma.dtsi.
The commit 5a8e9b022e569 ("arm64: dts: imx8qm-ss-dma: Pass lpuart
dma-names") just simple add dma-names as binding doc requirement.
Correct lpuart0 - lpuart3 dma rx and tx channels, and use defines for
the FSL_EDMA_RX flag.
Fixes: 5a8e9b022e56 ("arm64: dts: imx8qm-ss-dma: Pass lpuart dma-names")
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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i.MX8M Plus DHCOM
Add missing 'clocks' property to LAN8740Ai PHY node, to allow the PHY driver
to manage LAN8740Ai CLKIN reference clock supply. This fixes sporadic link
bouncing caused by interruptions on the PHY reference clock, by letting the
PHY driver manage the reference clock and assure there are no interruptions.
This follows the matching PHY driver recommendation described in commit
bedd8d78aba3 ("net: phy: smsc: LAN8710/20: add phy refclk in support")
Fixes: 8d6712695bc8 ("arm64: dts: imx8mp: Add support for DH electronics i.MX8M Plus DHCOM and PDK2")
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Tested-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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CAN1 and Micfil share pins on imx93-9x9-qsb board, use TMUX1574RSVR
to control the connection: put sel to high, select CAN1, put sel to
low, select Micfil. In default, sel keep low.
To support CAN1, need to put the sel to high. Besides, CAN1 use phy
TJA1057GT/3.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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On this SoM eqos is the primary ethernet interface, Ka-Ro fuses the
address for it in eth_mac1, eth_mac2 seems to be left unfused. In their
downstream u-boot they fetch it from eth_mac1 [1][2], by setting alias
of eqos to ethernet0, the driver then fetches the mac address based on
the alias number.
Set eqos to read from eth_mac1 instead of eth_mac2. Also set fec to
point at eth_mac2 as it may be fused later even though it is disabled
by default.
With this changed barebox is now capable of loading the correct address.
Link: https://github.com/karo-electronics/karo-tx-uboot/blob/380543278410bbf04264d80a3bfbe340b8e62439/drivers/net/dwc_eth_qos.c#L1167 [1]
Link: https://github.com/karo-electronics/karo-tx-uboot/blob/380543278410bbf04264d80a3bfbe340b8e62439/arch/arm/dts/imx8mp-karo.dtsi#L12 [2]
Fixes: bac63d7c5f46 ("arm64: dts: freescale: add Ka-Ro Electronics tx8p-ml81 COM")
Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The compatibles should include the SoM compatible, this board is based
on the Ka-Ro TX8P-ML81 SoM, so add it to allow using shared code in the
bootloader which uses upstream Linux devicetrees as a base.
Also add the hardware revision to the board compatible to handle
revision specific quirks in the bootloader/userspace.
This is a breaking change, but it is early enough that it can be
corrected without causing any issues.
Fixes: 03f07be54cdc ("arm64: dts: freescale: Add the GOcontroll Moduline Display baseboard")
Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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RTC interrupt level should be set to "LOW". This was revealed by the
introduction of commit:
f181987ef477 ("rtc: m41t80: use IRQ flags obtained from fwnode")
which changed the way IRQ type is obtained.
Fixes: 56c27310c1b4 ("ARM: dts: imx: Add Advantech BA-16 Qseven module")
Signed-off-by: Ian Ray <ian.ray@gehealthcare.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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DRAM1 is only 2GiB in size (0x00_8000_0000 - 0x01_0000_0000) which is
already used by Linux kernel, etc. Move the allocation area of BMAN and
QMAN to DRAM1 region. This frees the complete DRAM2 area for e.g. CMA.
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The DTS code coding style expects lowercase hex for values and unit
addresses.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251223152424.155253-2-krzysztof.kozlowski@oss.qualcomm.com
Signed-off-by: Peter Chen <peter.chen@cixtech.com>
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Zen5 also contains family 1Ah, models 70h-7Fh, which are mistakenly missing
from cpu_has_entrysign(). Add the missing range.
Fixes: 8a9fb5129e8e ("x86/microcode/AMD: Limit Entrysign signature checking to known generations")
Signed-off-by: Rong Zhang <i@rong.moe>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Cc: stable@kernel.org
Link: https://patch.msgid.link/20251229182245.152747-1-i@rong.moe
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Add audio XCVR sound card, which supports SPDIF TX & RX only,
eARC RX, ARC RX are not supported.
Signed-off-by: Chancel Liu <chancel.liu@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add bt-sco sound card, which is used by BT HFP case.
It supports wb profile as default.
Signed-off-by: Chancel Liu <chancel.liu@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Fix the SMARC_SDIO_WP gpio-line-name position. It should be on line 15
of som_gpio_expander_1, not line 17.
Fixes: 90bbe88e0ea6 ("arm64: dts: freescale: add Toradex SMARC iMX95")
Signed-off-by: Vitor Soares <vitor.soares@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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interrupt
Change the PHY interrupt trigger type from IRQ_TYPE_LEVEL_LOW to
IRQ_TYPE_EDGE_FALLING to match the PCA9745 GPIO expander hardware
capabilities and avoid emulated level detection.
Fixes: 90bbe88e0ea6 ("arm64: dts: freescale: add Toradex SMARC iMX95")
Signed-off-by: Vitor Soares <vitor.soares@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Enable PMICs used on i.MX53 Quick-Start Boards: DA9052 for i.MX53 QSB
and MC13XXX for i.MX53 QSRB (it has Freescale MC34708 PMIC).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add DT node for the SIM LPAV module.
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add flexcan2 and flexcan4, and related phys support.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add 'thermal_zones' as a label to the thermal-zones node.
Without this label, it is not possible to add additional
trip points in board files. For example, to add an active
trip point for controlling a fan.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The FRDM-i.MX8MP is an NXP development platform based on the i.MX8M Plus
SoC, featuring a quad Cortex-A53, Cortex-M7 co-processor, 4GB LPDDR4,
32GB eMMC, Wi-Fi 6/Bluetooth 5.4/802.15.4 tri-radio, Ethernet, HDMI/MIPI
display interfaces, camera connectors, and standard expansion headers.
Based on the device tree found in the NXP repository at github
https://github.com/nxp-imx-support/meta-imx-frdm and on imx8mp-evk
board kernel mainline device tree.
This is a basic device tree supporting:
- Quad Cortex-A53
- 4GB LPDDR4 DRAM
- PCA9450C PMIC with regulators
- Two NXP PCAL6416 GPIO expanders
- RGB LEDs via GPIO expander
- I2C1, I2C2, I2C3 controllers
- UART2 (console) and UART3 (with RTS/CTS)
- USDHC3 (8-bit eMMC)
- SNVS power key (onboard power button)
Co-developed-by: Xiaofeng Wei <xiaofeng.wei@nxp.com>
Signed-off-by: Xiaofeng Wei <xiaofeng.wei@nxp.com>
Signed-off-by: Rogerio Pimentel <rpimentel.silva@gmail.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Replace the 0 with IMX_LPCG_CLK_0 for LPCG clock indices. Although the
numerical value is identical, the LPCG input is defined as
IMX_LPCG_CLK_<n>, so using the symbolic constant improves clarity and
consistency with the LPCG clock naming convention.
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Replace the 0 with IMX_LPCG_CLK_0 for LPCG clock indices. Although the
numerical value is identical, the LPCG input is defined as
IMX_LPCG_CLK_<n>, so using the symbolic constant improves clarity and
consistency with the LPCG clock naming convention.
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add sensors under i2c1 bus.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Replace the 0 with IMX_LPCG_CLK_0 for LPCG clock indices. Although the
numerical value is identical, the LPCG input is defined as
IMX_LPCG_CLK_<n>, so using the symbolic constant improves clarity and
consistency with the LPCG clock naming convention.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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For SD card, according to the spec requirement, for sd card power reset
operation, it need sd card supply voltage to be lower than 0.5v and keep
over 1ms, otherwise, next time power back the sd card supply voltage to
3.3v, sd card can't support SD3.0 mode again.
To match such requirement on imx8qm-mek board, add 4.8ms delay between
sd power off and power on.
Fixes: 307fd14d4b14 ("arm64: dts: imx: add imx8qm mek support")
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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light sensor isl29023 share the interrupt with lsm303arg, but these
two devices use different interrupt type. According to the datasheet
of these two devides, both support low level trigger type, so correct
the interrupt type here to avoid the following error log:
irq: type mismatch, failed to map hwirq-11 for gpio@5d0c0000!
Fixes: 9918092cbb0e ("arm64: dts: imx8qm-mek: add i2c0 and children devices")
Fixes: 1d8a9f043a77 ("arm64: dts: imx8: use defines for interrupts")
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Node names are supposed to be generic and use hexadecimal unit-addresses.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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I3C2 is in WAKEUP domain. Its pclk should be IMX95_CLK_BUSWAKEUP.
Fixes: 969497ebefcf ("arm64: dts: imx95: Add i3c1 and i3c2")
Signed-off-by: Carlos Song <carlos.song@nxp.com>
Cc: stable@vger.kernel.org
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add device trees for the MBLS1028A and the MBLS1028A-IND and the SoM
TQMLS1028A.
Signed-off-by: Gregor Herburger <gregor.herburger@tq-group.com>
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add an overlay of expansion board (PEB-AV-10) that supports multimedia
interfaces, 3.5mm headphone jack, a USB-A port and LVDS, backlight
connectors can be connected to the imx8mp libra. Audio works when no
display is connected to expansion board.
A separate overlay for Powertip display, based on peb-av-10.dtsi and
intended for use with PEB-AV-10 expansion board, will be added
later as display support is not yet available.
Signed-off-by: Yashwanth Varakala <y.varakala@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add imx8mp-libra-rdk-fpsc-lvds-ph128800t006-zhc01.dtso
devicetree display overlay for the i.MX8MP Libra RDK platform.
The overlay enable LVDS display configuration.
To keep the consistent style of panel and backlight nodes and labels.
They are updated in imx8mp-libra base board devicetree and
etml1010g3dra display overlay.
Signed-off-by: Yashwanth Varakala <y.varakala@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add ENETC instance 1~3, EMDIO and PTP Timer 0~1 support.
The EMDIO provides MDIO bus for ENETCs to access their external PHYs.
The PTP Timer provides current time with nanosecond resolution, precise
periodic pulse, pulse on timeout, and time capture on external pulse
support. It also provides PTP clock for ENETCs to implement time
synchronization as required for IEEE 1588 and IEEE 802.1AS-2020.
Signed-off-by: Wei Fang <wei.fang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The NETC related nodes for i.MX94, this NETC has two PCIe buses, the bus
0 has 1 ENETC instance, one PTP timer, one RCEC and a switch, currently,
the switch is not added due to the DT binding and the driver is not
ready at the moment. The bus 1 has three ENETC instances, 2 PTP timers,
1 RCEC and one EMDIO.
Signed-off-by: Wei Fang <wei.fang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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i.MX8DXL
Add DB pmu related nodes. This pmu is in DB (system interconnects).
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add ddr perf monitor device node for i.MX8QM. Change imx8-ss-ddr.dtsi's
compatible string to fsl,imx8qxp-ddr-pmu. i.MX8QM overwrite to
fsl,imx8qm-ddr-pmu. All fallback to fsl,imx8-ddr-pmu.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull RISC-V updates from Paul Walmsley:
"Nothing exotic here; these are the cleanup and new ISA extension
probing patches (not including CFI):
- Add probing and userspace reporting support for the standard RISC-V
ISA extensions Zilsd and Zclsd, which implement load/store dual
instructions on RV32
- Abstract the register saving code in setup_sigcontext() so it can
be used for stateful RISC-V ISA extensions beyond the vector
extension
- Add the SBI extension ID and some initial data structure
definitions for the RISC-V standard SBI debug trigger extension
- Clean up some code slightly: change some page table functions to
avoid atomic operations oinn !SMP and to avoid unnecessary casts to
atomic_long_t; and use the existing RISCV_FULL_BARRIER macro in
place of some open-coded 'fence rw,rw' instructions"
* tag 'riscv-for-linus-6.19-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
riscv: Add SBI debug trigger extension and function ids
riscv/atomic.h: use RISCV_FULL_BARRIER in _arch_atomic* function.
riscv: hwprobe: export Zilsd and Zclsd ISA extensions
riscv: add ISA extension parsing for Zilsd and Zclsd
dt-bindings: riscv: add Zilsd and Zclsd extension descriptions
riscv: mm: use xchg() on non-atomic_long_t variables, not atomic_long_xchg()
riscv: mm: ptep_get_and_clear(): avoid atomic ops when !CONFIG_SMP
riscv: mm: pmdp_huge_get_and_clear(): avoid atomic ops when !CONFIG_SMP
riscv: signal: abstract header saving for setup_sigcontext
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Add the OTP controller node.
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Reviewed-by: André Draszik <andre.draszik@linaro.org>
Link: https://patch.msgid.link/20251222-gs101-chipid-v4-5-aa8e20ce7bb3@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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Replace deprecated at25 properties with the required properties (size,
address-width and pagesize), which duplicate the removed properties.
Fix below CHECK_DTB warning:
arch/arm/boot/dts/nxp/lpc/lpc3250-phy3250.dtb: at25@0 (atmel,at25): 'pagesize' is a required property
arch/arm/boot/dts/nxp/lpc/lpc3250-phy3250.dtb: at25@0 (atmel,at25): $nodename: 'anyOf' conditional failed, one must be fixed:
Signed-off-by: Frank Li <Frank.Li@nxp.com>
[vzapolskiy: squashed two changes from the series and updated commit message]
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
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Rename nodename at@0 to eeprom@0 to fix below CHECK_DTBS warnings:
arch/arm/boot/dts/nxp/lpc/lpc3250-phy3250.dtb: at25@0 (atmel,at25): $nodename: 'anyOf' conditional failed, one must be fixed:
'at25@0' does not match '^eeprom@[0-9a-f]{1,2}$'
'at25@0' does not match '^fram@[0-9a-f]{1,2}$'
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
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