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2025-07-23arm64: dts: sophgo: Add Duo Module 01 Evaluation BoardAlexander Sverdlin3-0/+79
Duo Module 01 Evaluation Board contains Sophgo Duo Module 01 SMD SoM, Ethernet+USB switch, microSD slot, etc... Add only support for UART0 (console) and microSD slot. Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Reviewed-by: Inochi Amaoto <inochiama@gmail.com> Link: https://lore.kernel.org/r/20250612132844.767216-5-alexander.sverdlin@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23arm64: dts: sophgo: Add Duo Module 01Alexander Sverdlin1-0/+40
The Duo Module 01 is a compact module with integrated SG2000, WI-FI6/BTDM5.4, and eMMC. Add only support for UART and SDHCI. Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Reviewed-by: Inochi Amaoto <inochiama@gmail.com> Link: https://lore.kernel.org/r/20250612132844.767216-4-alexander.sverdlin@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23arm64: dts: sophgo: Add initial SG2000 SoC device treeAlexander Sverdlin1-0/+86
Add initial device tree for the SG2000 SoC by SOPHGO (from ARM64 PoV). Reviewed-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Link: https://lore.kernel.org/r/20250612132844.767216-3-alexander.sverdlin@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23riscv: dts: sophgo: fix mdio node name for CV180XInochi Amaoto1-1/+1
As the mdio multipledxer is marked as mdio device, the check complains the mdio bus number exceed the maximum. Change the node name to mdio-mux to remove the following warnings: mdio@3009800 (mdio-mux-mmioreg): mdio@80:reg:0:0: 128 is greater than the maximum of 31 Fixes: b7945143bc33 ("riscv: dts: sophgo: Add mdio multiplexer device for cv18xx") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202507140738.XRjv3G8i-lkp@intel.com/ Closes: https://lore.kernel.org/oe-kbuild-all/202507121830.POx2KDVi-lkp@intel.com/ Reviewed-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Link: https://lore.kernel.org/r/20250715221349.11034-1-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23riscv: dts: sophgo: sophgo-srd3-10: reserve uart0 deviceInochi Amaoto1-0/+5
As the uart0 is already occupied by the firmware, reserve it to avoid this port is used by mistake. Tested-by: Han Gao <rabenda.cn@gmail.com> Reviewed-by: Chen Wang <wangchen20@iscas.ac.cn> Link: https://lore.kernel.org/r/20250703004024.85221-1-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23riscv: dts: sophgo: add Sophgo SG2042_EVB_V2.0 board device treeHan Gao2-0/+234
Sophgo SG2042_EVB_V2.0 [1] is a prototype development board based on SG2042 Currently supports serial port, sdcard/emmc, pwm, fan speed control. Link: https://github.com/sophgo/sophgo-hardware/tree/master/SG2042/SG2042-x4-EVB [1] Signed-off-by: Han Gao <rabenda.cn@gmail.com> Reviewed-by: Nutty Liu <liujingqi@lanxincomputing.com> Reviewed-by: Chen Wang <unicorn_wang@outlook.com> Link: https://lore.kernel.org/r/c1b6ccdc69af0c1457fc1486a6bc8a1e83671537.1751700954.git.rabenda.cn@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23riscv: dts: sophgo: add Sophgo SG2042_EVB_V1.X board device treeHan Gao2-0/+246
Sophgo SG2042_EVB_V1.X [1] is a prototype development board based on SG2042 Currently supports serial port, sdcard/emmc, pwm, fan speed control. Link: https://github.com/sophgo/sophgo-hardware/tree/master/SG2042/SG2042-x8-EVB [1] Signed-off-by: Han Gao <rabenda.cn@gmail.com> Reviewed-by: Nutty Liu <liujingqi@lanxincomputing.com> Reviewed-by: Chen Wang <unicorn_wang@outlook.com> Link: https://lore.kernel.org/r/27091134ce1f8a6541a349afc324d6f7402ea606.1751700954.git.rabenda.cn@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23riscv: dts: sophgo: add ethernet GMAC device for sg2042Inochi Amaoto1-0/+61
Add ethernet GMAC device node for the sg2042. Tested-by: Han Gao <rabenda.cn@gmail.com> Link: https://lore.kernel.org/r/20250708064627.509363-1-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23riscv: dts: sophgo: Enable ethernet device for Huashan PiInochi Amaoto1-0/+8
Enable ethernet controller and mdio multiplexer device on Huashan Pi. Link: https://lore.kernel.org/r/20250703021600.125550-4-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23riscv: dts: sophgo: Add mdio multiplexer device for cv18xxInochi Amaoto1-0/+29
Add DT device node of mdio multiplexer device for cv18xx SoC. Link: https://lore.kernel.org/r/20250703021600.125550-3-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23riscv: dts: sophgo: Add ethernet device for cv18xxInochi Amaoto1-0/+44
Add ethernet controller device node for cv18xx SoC. Link: https://lore.kernel.org/r/20250703021600.125550-2-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23riscv: dts: sophgo: sg2044: add pmu configurationInochi Amaoto1-0/+91
Add PMU configuration for the cpu of sg2044, which is the V2 version of C920. Reviewed-by: Chen Wang <unicorn_wang@outlook.com> Tested-by: Han Gao <rabenda.cn@gmail.com> Link: https://lore.kernel.org/r/20250703003844.84617-1-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23riscv: dts: sophgo: sg2044: add ziccrse extensionHan Gao1-64/+64
sg2044 support ziccrse extension. Signed-off-by: Han Gao <rabenda.cn@gmail.com> Reviewed-by: Chen Wang <unicorn_wang@outlook.com> Reviewed-by: Nutty Liu <liujingqi@lanxincomputing.com> Link: https://lore.kernel.org/r/0889174f2e013e095b94940614f4a0a6e614b09c.1751858054.git.rabenda.cn@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23riscv: dts: sophgo: add zfh for sg2042Han Gao1-64/+64
sg2042 support Zfh ISA extension [1]. Link: https://occ-oss-prod.oss-cn-hangzhou.aliyuncs.com/resource//1737721869472/%E7%8E%84%E9%93%81C910%E4%B8%8EC920R1S6%E7%94%A8%E6%88%B7%E6%89%8B%E5%86%8C%28xrvm%29_20250124.pdf [1] Signed-off-by: Han Gao <rabenda.cn@gmail.com> Reviewed-by: Inochi Amaoto <inochiama@gmail.com> Reviewed-by: Nutty Liu <liujingqi@lanxincomputing.com> Reviewed-by: Chen Wang <unicorn_wang@outlook.com> Link: https://lore.kernel.org/r/bcaf5684c614959f49a9770bf3cd41096cee5fe6.1751698574.git.rabenda.cn@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23riscv: dts: sophgo: add ziccrse for sg2042Han Gao1-128/+192
sg2042 support Ziccrse ISA extension [1]. Link: https://lore.kernel.org/all/20241103145153.105097-12-alexghiti@rivosinc.com/ [1] Signed-off-by: Han Gao <rabenda.cn@gmail.com> Reviewed-by: Inochi Amaoto <inochiama@gmail.com> Reviewed-by: Nutty Liu <liujingqi@lanxincomputing.com> Reviewed-by: Chen Wang <unicorn_wang@outlook.com> Link: https://lore.kernel.org/r/859df9a05e1693fec9bd2c7dcf14415bb15230bd.1751698574.git.rabenda.cn@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23riscv: dts: sophgo: Add xtheadvector to the sg2042 devicetreeHan Gao1-64/+128
The sg2042 SoCs support xtheadvector [1] so it can be included in the devicetree. Also include vlenb for the cpu. And set vlenb=16 [2]. This can be tested by passing the "mitigations=off" kernel parameter. Link: https://lore.kernel.org/linux-riscv/20241113-xtheadvector-v11-4-236c22791ef9@rivosinc.com/ [1] Link: https://lore.kernel.org/linux-riscv/aCO44SAoS2kIP61r@ghost/ [2] Signed-off-by: Han Gao <rabenda.cn@gmail.com> Reviewed-by: Inochi Amaoto <inochiama@gmail.com> Reviewed-by: Nutty Liu <liujingqi@lanxincomputing.com> Reviewed-by: Chen Wang <unicorn_wang@outlook.com> Link: https://lore.kernel.org/r/915bef0530dee6c8bc0ae473837a4bd6786fa4fb.1751698574.git.rabenda.cn@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23riscv: dts: sophgo: sg2044: add PCIe device support for SG2044Inochi Amaoto2-0/+205
Add PCIe device node for SG2044 and configuration for Sophgo SRD3-10. Link: https://lore.kernel.org/r/20250618015851.272188-3-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23riscv: dts: sophgo: sg2044: add MSI device support for SG2044Inochi Amaoto2-0/+15
Add MSI device tree node for SG2044. Reviewed-by: Chen Wang <unicorn_wang@outlook.com> Link: https://lore.kernel.org/r/20250618015851.272188-2-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23riscv: dts: sophgo: add reset configuration for Sophgo CV1800 series SoCInochi Amaoto1-0/+18
Add known reset configuration for existed device. Reviewed-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Link: https://lore.kernel.org/r/20250617070144.1149926-5-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23riscv: dts: sophgo: add reset generator for Sophgo CV1800 series SoCInochi Amaoto2-0/+105
Add reset generator node for all CV18XX series SoC. Reviewed-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Tested-by: Junhui Liu <junhui.liu@pigmoral.tech> Tested-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Link: https://lore.kernel.org/r/20250617070144.1149926-4-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23riscv: dts: sophgo: sg2044: Add missing riscv,cbop-block-size propertyInochi Amaoto1-0/+64
The kernel complains no "riscv,cbop-block-size" and disables the Zicbop extension. Add the missing property to keep it functional. Fixes: ae5bac370ed4 ("riscv: dts: sophgo: Add initial device tree of Sophgo SRD3-10") Link: https://lore.kernel.org/r/20250613074513.1683624-1-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23riscv: dts: sophgo: add pwm controller for SG2044Longbin Li2-0/+14
Add pwm device node for SG2044. Signed-off-by: Longbin Li <looong.bin@gmail.com> Reviewed-by: Chen Wang <unicorn_wang@outlook.com> Link: https://lore.kernel.org/r/20250608232836.784737-12-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23riscv: dts: sophgo: add SG2044 SPI NOR controller driverLongbin Li1-0/+24
Add SPI NOR device node for SG2044. Signed-off-by: Longbin Li <looong.bin@gmail.com> Link: https://lore.kernel.org/r/20250608232836.784737-11-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23riscv: dts: sophgo: sg2044: Add pinctrl deviceInochi Amaoto1-0/+6
Add pinctrl DT node and configuration for SG2044. Link: https://lore.kernel.org/r/20250608232836.784737-10-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23riscv: dts: sophgo: sg2044: Add ethernet control deviceInochi Amaoto2-0/+79
Add ethernet control node for sg2044. Link: https://lore.kernel.org/r/20250608232836.784737-9-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23riscv: dts: sophgo: sophgo-srd3-10: add HWMON MCU deviceInochi Amaoto1-0/+10
Add MCU devicetree node for Sophgo SRD3-10 board. This is used to provide SUSP function for the board. Link: https://lore.kernel.org/r/20250608232836.784737-8-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23riscv: dts: sophgo: sg2044: Add MMC controller deviceInochi Amaoto2-0/+41
Add emmc controller and sd controller DT node for SG2044. Link: https://lore.kernel.org/r/20250608232836.784737-7-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23riscv: dts: sophgo: sg2044: add DMA controller deviceInochi Amaoto1-0/+20
The DMA controller of SG2044 is a standard Synopsys IP, which is already supported by the kernel. Add DMA controller DT node for SG2044. Link: https://lore.kernel.org/r/20250608232836.784737-6-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23riscv: dts: sophgo: sg2044: Add I2C deviceInochi Amaoto1-0/+56
The I2C controller of SG2044 is a standard Synopsys IP, with one the ref clock is need. Add I2C DT node for SG2044 SoC. Link: https://lore.kernel.org/r/20250608232836.784737-5-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23riscv: dts: sophgo: sg2044: Add GPIO deviceInochi Amaoto1-0/+70
The GPIO controller is a standard Synopsys IP, which is already supported by the kernel. Add GPIO DT node for SG2044 SoC. Link: https://lore.kernel.org/r/20250608232836.784737-4-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23riscv: dts: sophgo: sg2044: Add clock controller deviceInochi Amaoto1-0/+34
Add clock controller and pll clock node for sg2044. Link: https://lore.kernel.org/r/20250608232836.784737-3-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23riscv: dts: sophgo: sg2044: Add system controller deviceInochi Amaoto1-0/+7
The TOP system controller device is necessary for the SG2044 clock controller. Add it to the SoC device tree. Link: https://lore.kernel.org/r/20250608232836.784737-2-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23riscv: dts: sophgo: cv18xx: Add RTCSYS device nodeAlexander Sverdlin1-0/+12
Add the RTCSYS MFD node: in Cvitek CV18xx and its successors RTC Subsystem is quite advanced and provides SoC power management functions as well. The SoC family also contains DW8051 block (Intel 8051 compatible CPU core) and an associated SRAM. The corresponding control registers are mapped into RTCSYS address space as well. Link: https://github.com/sophgo/sophgo-doc/tree/main/SG200X/TRM Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Reviewed-by: Inochi Amaoto <inochiama@gmail.com> Link: https://lore.kernel.org/r/20250513203128.620731-1-alexander.sverdlin@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23tracing: Remove redundant config HAVE_FTRACE_MCOUNT_RECORDSteven Rostedt13-13/+0
Ftrace is tightly coupled with architecture specific code because it requires the use of trampolines written in assembly. This means that when a new feature or optimization is made, it must be done for all architectures. To simplify the approach, CONFIG_HAVE_FTRACE_* configs are added to denote which architecture has the new enhancement so that other architectures can still function until they too have been updated. The CONFIG_HAVE_FTRACE_MCOUNT was added to help simplify the DYNAMIC_FTRACE work, but now every architecture that implements DYNAMIC_FTRACE also has HAVE_FTRACE_MCOUNT set too, making it redundant with the HAVE_DYNAMIC_FTRACE. Remove the HAVE_FTRACE_MCOUNT config and use DYNAMIC_FTRACE directly where applicable. Link: https://lore.kernel.org/all/20250703154916.48e3ada7@gandalf.local.home/ Cc: Masami Hiramatsu <mhiramat@kernel.org> Cc: Mathieu Desnoyers <mathieu.desnoyers@efficios.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Link: https://lore.kernel.org/20250704104838.27a18690@gandalf.local.home Signed-off-by: Steven Rostedt (Google) <rostedt@goodmis.org>
2025-07-23arm64/bug: Add ARCH_WARN_ASM macro for BUG/WARN asm code sharing with RustFUJITA Tomonori1-4/+29
Add new ARCH_WARN_ASM macro for BUG/WARN assembly code sharing with Rust to avoid the duplication. No functional changes. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: FUJITA Tomonori <fujita.tomonori@gmail.com> Link: https://lore.kernel.org/r/20250502094537.231725-4-fujita.tomonori@gmail.com Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
2025-07-23riscv/bug: Add ARCH_WARN_ASM macro for BUG/WARN asm code sharing with RustFUJITA Tomonori1-14/+21
Add new ARCH_WARN_ASM macro for BUG/WARN assembly code sharing with Rust to avoid the duplication. No functional changes. Acked-by: Alexandre Ghiti <alexghiti@rivosinc.com> Signed-off-by: FUJITA Tomonori <fujita.tomonori@gmail.com> Link: https://lore.kernel.org/r/20250502094537.231725-3-fujita.tomonori@gmail.com [ Remove ending newline in `ARCH_WARN_ASM` content to be closer to the original. - Miguel ] Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
2025-07-23x86/bug: Add ARCH_WARN_ASM macro for BUG/WARN asm code sharing with RustFUJITA Tomonori1-28/+28
Add new ARCH_WARN_ASM macro for BUG/WARN assembly code sharing with Rust to avoid the duplication. No functional changes. Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: FUJITA Tomonori <fujita.tomonori@gmail.com> Link: https://lore.kernel.org/r/20250502094537.231725-2-fujita.tomonori@gmail.com [ Fixed typo in macro parameter name. - Miguel ] Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
2025-07-23Merge tag 'apple-soc-dt-6.17' of ↵Arnd Bergmann8-9/+208
https://git.kernel.org/pub/scm/linux/kernel/git/sven/linux into soc/dt Apple SoC device tree changes for v6.17 - Added the bindings and nodes for Apple SoC GPU. The driver itself isn't ready for upstreaming yet due to rust dependencies but we're confident that the bindings are stable at this point. - Added a missing node for the touchbar framebuffer to Apple T2 device trees, which is the BMC for some x86 Macs - Fixed a W=1 warning by adding bit offsets to NVMEM node names. This required a change to the generic NVMEM cell binding which will be part of 6.17 through the NVMEM tree. Signed-off-by: Sven Peter <sven@kernel.org> * tag 'apple-soc-dt-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/sven/linux: arm64: dts: apple: Add Apple SoC GPU dt-bindings: gpu: Add Apple SoC GPU arm64: dts: apple: t8012-j132: Include touchbar framebuffer node arm64: dts: apple: Add bit offset to PMIC NVMEM node names Link: https://lore.kernel.org/r/20250722163258.62424-2-sven@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-23Merge tag 'at91-dt-6.17' of ↵Arnd Bergmann21-49/+272
https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt Microchip AT91 device tree updates for v6.17 This update includes: - controllers enabled for SAMA7D65 SoC (crypto controllers, PWM, CAN) - controllers enabled for SAM9X7 SoC (LCD, LVDS) - cache configuration updates for SAMA5D2, SAMA5D3, SAMA5D4, SAMA7G5, SAMA7D65 - cleanups * tag 'at91-dt-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: (22 commits) ARM: dts: microchip: sama7g5: Add cache configuration for cpu node ARM: dts: microchip: sama7d65: Add cache configuration for cpu node ARM: dts: microchip: sama5d4: Update the cache configuration for CPU ARM: dts: microchip: sama5d3: Update the cache configuration for CPU ARM: dts: microchip: sama5d2: Update the cache configuration for CPU ARM: dts: microchip: sam9x7: Add LVDS controller ARM: dts: microchip: sama5d2_icp: rename spi-cs-setup-ns property to spi-cs-setup-delay-ns ARM: dts: microchip: sama5d27_wlsom1: rename spi-cs-setup-ns property to spi-cs-setup-delay-ns ARM: dts: microchip: sama5d27_som1: rename spi-cs-setup-ns property to spi-cs-setup-delay-ns ARM: dts: microchip: sam9x60ek: rename spi-cs-setup-ns property to spi-cs-setup-delay-ns ARM: dts: at91-sama5d27_wlsom1: Improve the Wifi compatible ARM: dts: microchip: gardena-smart-gateway: Fix power LED ARM: dts: microchip: sam9x7: Add clock name property ARM: dts: microchip: sama7d65: Add clock name property ARM: dts: microchip: sama7g5: Adjust clock xtal phandle ARM: dts: microchip: sam9x7: Add HLCD controller ARM: dts: microchip: sama7d65: Enable CAN bus ARM: dts: microchip: sama7d65: Clean up extra space ARM: dts: microchip: sama7d65: Add CAN bus support ARM: dts: microchip: sama7d65: Add PWM support ... Link: https://lore.kernel.org/r/20250721100904.568575-2-claudiu.beznea@tuxon.dev Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-23Merge tag 'thead-dt-for-v6.17' of ↵Arnd Bergmann1-0/+14
https://git.kernel.org/pub/scm/linux/kernel/git/fustini/linux into soc/dt T-HEAD Devicetrees for v6.17 There are several additions for the T-Head TH1520 SoC: - Add PVT node for thermal sensor which works with the existing Moortec MR75203 driver. - Add "gpu-clkgen" reset property to the AON node which allows the power domain driver to detect the capability to power sequence the GPU. All of these patches have been tested in linux-next. Signed-off-by: Drew Fustini <fustini@kernel.org> * tag 'thead-dt-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/fustini/linux: riscv: dts: thead: Add PVT node riscv: dts: thead: th1520: Add GPU clkgen reset to AON node Link: https://lore.kernel.org/r/aHtnwthmTpfkIBMr@x1 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-23Merge tag 'v6.17-rockchip-dts64-2' of ↵Arnd Bergmann35-108/+1381
https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt New board: FriendlyElec NanoPi M5 Camera support for the PinePhone Pro. A bunch of cleanups to make DTC happier, fix ordering of DMA uart channels on rk3528 and some video output enablement as well as some button definitions. An interesting tidbit is the reset behaviour addition in that some boards have specific requirements as to how the PMIC needs to do the restart. DT-maintainers did not consider the header with helper-constants as part of the binding, so that header ended up in the Rockchip directory * tag 'v6.17-rockchip-dts64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (29 commits) arm64: dts: rockchip: Add maskrom button to NanoPi R5S + R5C arm64: dts: rockchip: Drop regulator-compatible property on rk3399 arm64: dts: rockchip: Drop unneeded address+size-cells on px30 arm64: dts: rockchip: Fix LCD panel port on rk3566-pinetab2 arm64: dts: rockchip: Move mipi_out node on rk3399 haikou demo dtso arm64: dts: rockchip: Simplify mipi_out endpoint on rk3399 RP64 dtso arm64: dts: rockchip: Simplify edp endpoints on several rk3399 boards arm64: dts: rockchip: Simplify VOP port definition on rk3328 arm64: dts: rockchip: Move dsi address+size-cells from SoC to rk3399 boards arm64: dts: rockchip: Move dsi address+size-cells from SoC to px30 boards arm64: dts: rockchip: Fix UART DMA support for RK3528 arm64: dts: rockchip: Add reset button to NanoPi R5S arm64: dts: rockchip: Add rtc0 alias for NanoPi R5S + R5C arm64: dts: rockchip: describe the OV8858 user camera on PinePhone Pro arm64: dts: rockchip: describe I2c Bus 1 and IMX258 world camera on PinePhone Pro arm64: dts: rockchip: Fix pinctrl node names for RK3528 arm64: dts: rockchip: Add FriendlyElec NanoPi M5 support dt-bindings: arm: rockchip: add FriendlyElec NanoPi M5 board arm64: dts: rockchip: force PMIC reset behavior to restart PMU on RK3588 Tiger arm64: dts: rockchip: force PMIC reset behavior to restart PMU on RK3588 Jaguar ... Link: https://lore.kernel.org/r/11552292.NyiUUSuA9g@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-23ARM: dts: st: spear: Use generic "ethernet" as node nameKrzysztof Kozlowski8-11/+11
Common name for Ethernet controllers is "ethernet", not "eth", also recommended by Devicetree specification in "Generic Names Recommendation". Verified lack of impact using dtx_diff. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Link: https://lore.kernel.org/r/20250717142245.92492-2-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22Merge tag 'v6.17-rockchip-defconfig64-1' of ↵Arnd Bergmann1-0/+3
https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/defconfig Enable Rockchip DFI + PM_DEVFREQ_EVENT and RGA modules. * tag 'v6.17-rockchip-defconfig64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: defconfig: enable further Rockchip platform drivers Link: https://lore.kernel.org/r/9025082.MhkbZ0Pkbq@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22Merge tag 'qcom-arm64-defconfig-for-6.17' of ↵Arnd Bergmann1-0/+3
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/defconfig Qualcomm Arm64 defconfig updates for v6.17 Enable camera and video clock controllers for SM8450, SM8550, and SM8650 platforms. * tag 'qcom-arm64-defconfig-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: arm64: defconfig: Enable camcc and videocc on Qualcomm SM8450+ Link: https://lore.kernel.org/r/20250720031134.286063-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22Merge tag 'at91-defconfig-6.17' of ↵Arnd Bergmann1-0/+1
https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/defconfig Microchip AT91 defconfig updates for v6.17 This update includes: - the WILC1000 SDIO module * tag 'at91-defconfig-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: configs: sama5_defconfig: Select CONFIG_WILC1000_SDIO Link: https://lore.kernel.org/r/20250721100904.568575-1-claudiu.beznea@tuxon.dev Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22arm64: dts: rockchip: Drop netdev led-triggers on NanoPi R5SDiederik de Haas1-3/+0
Sometimes the netdev triggers causes tasks to get blocked for more then 120 seconds, which in turn makes the (WAN) network port on the NanoPi R5S fail to come up. This results in the following (partial) trace: INFO: task kworker/0:1:11 blocked for more than 120 seconds. Not tainted 6.16-rc6+unreleased-arm64-cknow #1 Debian 6.16~rc6-1~exp1 "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this message. task:kworker/0:1 state:D stack:0 pid:11 tgid:11 ppid:2 task_flags:0x4208060 flags:0x00000010 Workqueue: events_power_efficient reg_check_chans_work [cfg80211] Call trace: __switch_to+0xf8/0x168 (T) __schedule+0x3f8/0xda8 schedule+0x3c/0x120 schedule_preempt_disabled+0x2c/0x58 __mutex_lock.constprop.0+0x4d0/0xab8 __mutex_lock_slowpath+0x1c/0x30 mutex_lock+0x50/0x68 rtnl_lock+0x20/0x38 reg_check_chans_work+0x40/0x478 [cfg80211] process_one_work+0x178/0x3e0 worker_thread+0x260/0x390 kthread+0x150/0x250 ret_from_fork+0x10/0x20 INFO: task kworker/0:1:11 is blocked on a mutex likely owned by task dhcpcd:615. task:dhcpcd state:D stack:0 pid:615 tgid:615 ppid:614 task_flags:0x400140 flags:0x00000018 Call trace: __switch_to+0xf8/0x168 (T) __schedule+0x3f8/0xda8 schedule+0x3c/0x120 schedule_preempt_disabled+0x2c/0x58 rwsem_down_write_slowpath+0x1e4/0x750 down_write+0x98/0xb0 led_trigger_register+0x134/0x1c0 phy_led_triggers_register+0xf4/0x258 [libphy] phy_attach_direct+0x30c/0x390 [libphy] phylink_fwnode_phy_connect+0xb0/0x138 [phylink] __stmmac_open+0xec/0x520 [stmmac] stmmac_open+0x4c/0xe8 [stmmac] __dev_open+0x130/0x2e0 __dev_change_flags+0x1c4/0x248 netif_change_flags+0x2c/0x80 dev_change_flags+0x88/0xc8 devinet_ioctl+0x35c/0x610 inet_ioctl+0x204/0x260 sock_do_ioctl+0x6c/0x140 sock_ioctl+0x2e4/0x388 __arm64_sys_ioctl+0xb4/0x120 invoke_syscall+0x6c/0x100 el0_svc_common.constprop.0+0x48/0xf0 do_el0_svc+0x24/0x38 el0_svc+0x3c/0x188 el0t_64_sync_handler+0x10c/0x140 el0t_64_sync+0x198/0x1a0 In order to not introduce a regression with kernel 6.16, drop the netdev triggers for now while the problem is being investigated further. Fixes: 1631cbdb8089 ("arm64: dts: rockchip: Improve LED config for NanoPi R5S") Helped-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Link: https://lore.kernel.org/r/20250722123628.25660-1-didi.debian@cknow.org Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22Merge branch 'newsoc/axiado' into soc/newsocArnd Bergmann6-0/+609
Support for the AX3000 SoC, from Harshit Shah <hshah@axiado.com>: The AX3000 is a multi-core system-on-chip featuring four ARM Cortex-A53 cores, secure vault, hardware firewall, and AI acceleration engines. This initial support enables basic bring-up of the SoC and evaluation platform with CPU, timer, UART, and I3C functionality. The series begins by adding the "axiado" vendor prefix and compatible strings for the SoC and board. It then introduces the device tree files and minimal ARCH_AXIADO platform support in arm64. * newsoc/axiado: MAINTAINERS: Add entry for Axiado arm64: defconfig: enable the Axiado family arm64: dts: axiado: Add initial support for AX3000 SoC and eval board arm64: add Axiado SoC family dt-bindings: i3c: cdns: add Axiado AX3000 I3C controller dt-bindings: serial: cdns: add Axiado AX3000 UART controller dt-bindings: gpio: cdns: add Axiado AX3000 GPIO variant dt-bindings: gpio: cdns: convert to YAML dt-bindings: arm: axiado: add AX3000 EVK compatible strings dt-bindings: vendor-prefixes: Add Axiado Corporation
2025-07-22arm64: defconfig: enable the Axiado familyHarshit Shah1-0/+1
Enable the Axiado SoC family in the arm64 defconfig. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Harshit Shah <hshah@axiado.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22arm64: dts: axiado: Add initial support for AX3000 SoC and eval boardHarshit Shah4-0/+602
Add initial device tree support for the AX3000 SoC and its evaluation platform. The AX3000 is a multi-core SoC featuring 4 Cortex-A53 cores, Secure Vault, AI Engine and Firewall. It adds support for Cortex-A53 CPUs, timer, UARTs, and I3C controllers on the AX3000 evaluation board. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Harshit Shah <hshah@axiado.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22arm64: add Axiado SoC familyHarshit Shah1-0/+6
Add ARCH_AXIADO for the support of the Axiado SoC for arm64 architecture. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Harshit Shah <hshah@axiado.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-11 11:44:59 +0300