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2026-01-18ARM: dts: imx: tolino-shine2: add tps65185Andreas Kemnade1-1/+54
Wire up the TPS65185 regulator needed for the display. Signed-off-by: Andreas Kemnade <andreas@kemnade.info> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2026-01-18arm64: dts: imx93-11x11-frdm: Add MQS audio supportDaniel Baluta1-0/+35
Enable Medium Quality Sound (MQS) output on the i.MX93 FRDM 11x11 board by adding sound card description and enabling sai1 and mqs1 dts nodes, together with necessary clocks and pinmux. This supports audio playback via SAI1 DAI which is connected to the MQS1 block. Co-developed-by: Tom Zheng <haidong.zheng@nxp.com> Signed-off-by: Tom Zheng <haidong.zheng@nxp.com> Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com> Tested-by: Francesco Valla <francesco@valla.it> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2026-01-18arm64: dts: imx952-evk: Add nxp,ctrl-ids for scmi miscPeng Fan1-0/+17
Add nxp,ctrl-ids in scmi_misc node for wakeup notification. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2026-01-18arm64: dts: imx952-evk: Add flexcan supportHaibo Chen1-0/+45
Add flexcan support, since flexcan1 share pins with PDM, default disable flexcan1. Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2026-01-18arm64: dts: imx952-evk: Enable TPM[3,6]Peng Fan1-1/+33
Enable TPM[3,6] for PWM. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2026-01-18arm64: dts: imx952-evk: Enable wdog3Peng Fan1-0/+5
Enable wdog3 to allow System manager reset Linux. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2026-01-18arm64: dts: imx952-evk: Enable USB[1,2]Peng Fan1-0/+76
Enable USB[1,2] and add ptn5110 connected to USB1. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2026-01-18arm64: dts: imx952-evk: Enable SPI7Peng Fan1-0/+17
Enable SPI7 for i.MX952-EVK. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2026-01-18arm64: dts: imx952-evk: Enable UART5Peng Fan1-0/+21
Enable UART5 for using Bluetooth. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2026-01-18arm64: dts: imx952-evk: Enable I2C[2,3,4,6,7] busPeng Fan1-0/+166
Enable I2C bus[2,3,4,6,7] and the io-expanders connected to each I2C bus. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2026-01-18arm64: dts: imx952-evk: Change the usdhc1_200mhz drive strength to DSE4Haibo Chen1-11/+11
Set usdhc1_200mhz drive strength need to use DSE4, according to validation team's suggestion, Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2026-01-18arm64: dts: imx952: Add idle-states nodePeng Fan1-1/+19
Add idle-states node and refer it in A55 nodes to enable cpuidle. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2026-01-18arm64: dts: imx8mn: Add ifm VHIP4 EvalBoard v1 and v2Fedor Ross9-0/+1148
Add support for ifm i.MX8MN VHIP4 EvalBoard v1 and v2 reference design. This system exists in two generations, v1 and v2, which share a lot of commonality. The boards come with either single gigabit ethernet or an KSZ8794 fast-ethernet switch, boot from eMMC, and offer CAN interfaces via Microchip MCP25xx SPI CAN controllers, UART, and USB host. The GPU is not available in the SoC populated on these devices. Signed-off-by: Fedor Ross <fedor.ross@ifm.com> Signed-off-by: Marek Vasut <marex@nabladev.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2026-01-18arm64: dts: imx8mn: Add SNVS LPGPRMarek Vasut1-0/+5
Add SNVS LPGPR bindings to MX8M Nano, the LPGPR is used to store boot counter. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Marek Vasut <marex@nabladev.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2026-01-18arm64: dts: imx8mq-librem5: Don't set mic-cfg for wm8962Sebastian Krzyszkowiak1-1/+0
The default values are fine, and MICDET_ENA is handled by the driver on its own anyway. Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2026-01-18arm64: dts: imx8mq-librem5: Set cap-power-off-card for usdhc2Sebastian Krzyszkowiak1-0/+1
This is needed for brcmfmac to turn the card off in suspend since 8c3170628a9ce24a59647bd24f897e666af919b8. Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2026-01-18arm64: dts: imx8mq-librem5: Limit uSDHC2 frequency to 50MHzSebastian Krzyszkowiak1-2/+2
SparkLAN card has stability issues at 100MHz. It still appears to be able to max out its throughput this way, so limit the frequency to ensure stable operation. Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2026-01-18arm64: dts: imx8mq-librem5: Enable SNVS RTCSebastian Krzyszkowiak1-5/+6
It has been disabled because it was being used for system clock instead of the discrete RTC. However, SNVS has some features that the discrete RTC does not, such as being able to turn the device on. Solve that issue with aliases instead and reenable SNVS RTC. Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2026-01-18arm64: dts: imx8mq-librem5: Set vibrator's PWM frequency to 20kHzSebastian Krzyszkowiak1-1/+1
1Hz as used previously was way too long. Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2026-01-18arm64: dts: imx8mq-librem5: Enable I2C recoverySebastian Krzyszkowiak1-4/+44
i2c-imx can perform bus recovery by temporarily switching I2C pins into GPIO mode. To do so, it needs GPIO and pinctrl handles to be provided in the device tree. Suggested-by: Denis Sergeevich <galilley@gmail.com> Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2026-01-17arm64: dts: exynos: gs101: add cmu_dpu and sysreg_dpu dt nodesPeter Griffin1-0/+17
Enable the cmu_dpu clock management unit. It feeds some of the display IPs. Additionally add the sysreg_dpu node which contains the BUSCOMPONENT_DRCG_EN and MEMCLK registers required by cmu_dpu to enable dynamic root clock gating of bus components. Reviewed-by: André Draszik <andre.draszik@linaro.org> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Link: https://patch.msgid.link/20260113-dpu-clocks-v3-5-cb85424f2c72@linaro.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2026-01-17x86/acpi: Add acpi=spcr to use SPCR-provided default consoleShenghao Yang1-3/+8
The SPCR provided console on x86 is only available as a boot console when earlycon is provided on the kernel command line, and will not be present in /proc/consoles. While it's possible to retain the boot console with the keep_bootcon parameter, that leaves the console using the less efficient 8250_early driver. Users wanting to use the firmware suggested console (to avoid maintaining unique serial console parameters for different server models in large fleets) with the conventional driver have to parse the kernel log for the console parameters and reinsert them. [ 0.005091] ACPI: SPCR 0x000000007FFB5000 000059 (v04 ALASKA A M I 01072009 INTL 20250404) [ 0.073387] ACPI: SPCR: console: uart,io,0x3f8,115200 In commit 0231d00082f6 ("ACPI: SPCR: Make SPCR available to x86")¹ the SPCR console was only added as an option for earlycon but not as an ordinary console so users don't see console output changes. So users can opt in to an automatic SPCR console, make ACPI init add it if acpi=spcr is set. ¹https://lore.kernel.org/lkml/20180118150951.28964-1-prarit@redhat.com/ [ bp: Touchups. ] Signed-off-by: Shenghao Yang <me@shenghaoyang.info> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://patch.msgid.link/20260117072827.355360-1-me@shenghaoyang.info
2026-01-17s390/pci: Use PCIBIOS return values in pci_read()/pci_write()Niklas Schnelle1-2/+6
While pci_read() and pci_write() have returned errno values since their inception with commit cd24834130ac ("s390/pci: base support") other config accessors in particular pci_generic_config_read() as well as pci_generic_config_write() return specific error values which are then converted to errno by pcibios_err_to_errno(). Since latter does handle the case where the error value already looks like an errno the previous behavior is unlikely to cause actual issues. Still, for consistency and in case any caller explicitly checks error values align pci_read() and pci_write() with the generic accessors. Reviewed-by: Benjamin Block <bblock@linux.ibm.com> Signed-off-by: Niklas Schnelle <schnelle@linux.ibm.com> Reviewed-by: Farhan Ali <alifm@linux.ibm.com> Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2026-01-17s390/pci: Handle futile config accesses of disabled devices directlyNiklas Schnelle1-8/+17
On s390 PCI busses and slots with multiple functions may have holes because PCI functions are passed-through by the hypervisor on a per function basis and some functions may be in standby or reserved. This fact is indicated by returning true from the hypervisor_isolated_pci_functions() helper and triggers common code to scan all possible devfn values. Via pci_scan_single_device() this in turn causes config reads for the device and vendor IDs, even for PCI functions which are in standby and thereofore disabled. So far these futile config reads, as well as potentially writes, which can never succeed were handled by the PCI load/store instructions themselves. This works as the platform just returns an error for a disabled and thus not usable function handle. It does cause spamming of error logs and additional overhead though. Instead check if the used function handle is enabled in zpci_cfg_load() and zpci_cfg_write() and if not enable directly return -ENODEV. Also refactor zpci_cfg_load() and zpci_cfg_store() slightly to accommodate the new logic while meeting modern kernel style guidelines. Cc: stable@vger.kernel.org Fixes: a50297cf8235 ("s390/pci: separate zbus creation from scanning") Signed-off-by: Niklas Schnelle <schnelle@linux.ibm.com> Reviewed-by: Benjamin Block <bblock@linux.ibm.com> Reviewed-by: Farhan Ali <alifm@linux.ibm.com> Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2026-01-17s390/preempt: Optimize __preempt_count_dec_and_test()Heiko Carstens1-0/+15
Provide an inline assembly using alternatives to avoid the need of a base register due to relocatable lowcore when adding or subtracting small constants from preempt_count. Main user is preempt_enable(), which subtracts one from preempt_count and tests if the result is zero. With this the generated code changes from 1000b8: a7 19 00 00 lghi %r1,0 1000bc: eb ff 13 a8 00 6e alsi 936(%r1),-1 1000c2: a7 54 00 05 jnhe 1000cc <__rcu_read_unlock+0x14> to something like this: 1000b8: eb ff 03 a8 00 6e alsi 936,-1 1000be: a7 54 00 05 jnhe 1000c8 <__rcu_read_unlock+0x10> Kernel image size is reduced by 45kb (bloat-o-meter -t, defconfig, gcc15). Reviewed-by: Sven Schnelle <svens@linux.ibm.com> Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2026-01-17s390/asm: Let __HAVE_ASM_FLAG_OUTPUTS__ define 1Heiko Carstens1-1/+1
With the empty define __is_enabled(__HAVE_ASM_FLAG_OUTPUTS__) evaluates to false. Therefore let __HAVE_ASM_FLAG_OUTPUTS__ define 1 if it is defined. This allows to make use of __is_defined(__HAVE_ASM_FLAG_OUTPUTS__) like expected. Reviewed-by: Sven Schnelle <svens@linux.ibm.com> Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2026-01-17s390/preempt: Optimize __preemp_count_add()/__preempt_count_sub()Heiko Carstens1-1/+11
Provide an inline assembly using alternatives to avoid the need of a base register due to relocatable lowcore when adding or subtracting small constants from preempt_count. Main user is preempt_disable(), which subtracts one from preempt_count. With this the generated code changes from 10012c: a7 b9 00 00 lghi %r11,0 100130: eb 01 b3 a8 00 6a asi 936(%r11),1 to something like this: 10012c: eb 01 03 a8 00 6a asi 936,1 Kernel image size is reduced by 13kb (bloat-o-meter -t, defconfig, gcc15). Reviewed-by: Sven Schnelle <svens@linux.ibm.com> Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2026-01-17s390/preempt: Optimize preempt_count()Heiko Carstens1-2/+18
Provide an inline assembly using alternatives to avoid the need of a base register when reading preempt_count() from lowcore. Use the LLGT instruction, which reads only the least significant 31 bits of preempt_count. This masks out the encoded PREEMPT_NEED_RESCHED bit. Generated code is changed from 000000000046e5d0 <vfree>: 46e5d0: c0 04 00 00 00 00 jgnop 46e5d0 <vfree> 46e5d6: a7 39 00 00 lghi %r3,0 46e5da: 58 10 33 a8 l %r1,936(%r3) 46e5de: c0 1b 00 ff ff 00 nilf %r1,16776960 46e5e4: a7 74 00 11 jne 46e606 <vfree+0x36> to something like this: 000000000046e5d0 <vfree>: 46e5d0: c0 04 00 00 00 00 jgnop 46e5d0 <vfree> 46e5d6: e3 10 03 a8 00 17 llgt %r1,936 46e5dc: ec 41 28 b7 00 55 risbgz %r4,%r1,40,55 46e5e2: a7 74 00 0f jne 46e600 <vfree+0x30> Overall savings are only 82 bytes according to bloat-o-meter. This is because of different inlining decisions, and there aren't many preempt_count() users in the kernel. Reviewed-by: Sven Schnelle <svens@linux.ibm.com> Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2026-01-17s390/vdso: Disable kstack eraseHeiko Carstens1-1/+1
For some reason gcc 8, 9, 10, and 11 generate a dynamic relocation in vdso.so.dbg if CONFIG_KSTACK_ERASE is enabled: >> arch/s390/kernel/vdso/vdso.so.dbg: dynamic relocations are not supported make[3]: *** [arch/s390/kernel/vdso/Makefile:54: arch/s390/kernel/vdso/vdso.so.dbg] Error 1 $ readelf -rW arch/s390/kernel/vdso/vdso.so.dbg Relocation section '.rela.dyn' at offset 0x15c0 contains 1 entry: Offset Info Type Symbol's Value Symbol's Name + Addend 00000000000015f0 000000010000000b R_390_JMP_SLOT 0000000000000000 __sanitizer_cov_stack_depth + 0 Add $(DISABLE_KSTACK_ERASE) to vdso compile flags to fix this. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/r/202601070505.xQcLr5KV-lkp@intel.com/ Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2026-01-17ARM: imx_v4_v5_defconfig: update for v6.19-rc1Josua Mayer1-10/+2
The i.MX ARM v4/v5 defconfig has gone out of sync with some dead options, some removed and some missing. 1. Add missing options no longer enabled by default: - CONFIG_I2C=y - CONFIG_LCD_CLASS_DEVICE=y 2. Remove options enabled by default: - CONFIG_CS89x0=y - CONFIG_MEDIA_CAMERA_SUPPORT=y 3. Remove options that have no effect: - # CONFIG_INET_XFRM_MODE_TRANSPORT is not set - # CONFIG_INET_XFRM_MODE_TUNNEL is not set - # CONFIG_INET_XFRM_MODE_BEET is not set 4. Remove options that have been removed completely from the kernel: - CONFIG_USB_EHCI_MXC=y Removed by commit e7018751d2e6 ("usb: host: ehci-mxc: Remove the driver"). - CONFIG_SMC911X=y Removed by commit a2fd08448f2b ("net: remove smc911x driver"). - -CONFIG_SND_SOC_MX27VIS_AIC32X4=y Removed by commit 3fbb01fb583f ("ASoC: mx27vis-aic32x4: Remove unused driver"). - CONFIG_SND_SOC_PHYCORE_AC97=y Removed by commit 440534a0ecfd ("ASoC: phycore-ac97: Remove unused driver"). - CONFIG_SND_SOC_IMX_MC13783=y Removed by commit 83e7e2278680 ("ASoC: imx-mc13783: Remove unused driver"). Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Josua Mayer <josua@solid-run.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2026-01-17arm64: dts: imx95: Use GPU_CGC as core clock for GPUMarek Vasut2-1/+2
The i.MX95 imx-sm introduced new GPU_CGC clock since imx-sm commit ca5e078833fa ("SM-128: Add clock management via CCM LPCG direct control") which are downstream clock of GPU clock. These new GPU_CGC clock gate the existing GPU clock. Currently, without clk_ignore_unused on kernel command line, those new GPU_CGC clock are unused and the kernel will disable them. This has no impact on i.MX95 A0/A1, but does prevent GPU register access from working at all on i.MX95 B0. The GPU_CGC clock are present on both i.MX95 A0/A1/B0, therefore update the DT such, that the GPU core clock are the GPU_CGC clock. When the panthor driver enables the GPU core clock, it enables both the GPU_CGC as well as its parent GPU clock. Fixes: 67934f248e64 ("arm64: dts: imx95: Describe Mali G310 GPU") Signed-off-by: Marek Vasut <marek.vasut@mailbox.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2026-01-17LoongArch: KVM: Fix kvm_device leak in kvm_pch_pic_destroy()Qiang Ma1-0/+1
In kvm_ioctl_create_device(), kvm_device has allocated memory, kvm_device->destroy() seems to be supposed to free its kvm_device struct, but kvm_pch_pic_destroy() is not currently doing this, that would lead to a memory leak. So, fix it. Cc: stable@vger.kernel.org Reviewed-by: Bibo Mao <maobibo@loongson.cn> Signed-off-by: Qiang Ma <maqianga@uniontech.com> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2026-01-17LoongArch: KVM: Fix kvm_device leak in kvm_eiointc_destroy()Qiang Ma1-0/+1
In kvm_ioctl_create_device(), kvm_device has allocated memory, kvm_device->destroy() seems to be supposed to free its kvm_device struct, but kvm_eiointc_destroy() is not currently doing this, that would lead to a memory leak. So, fix it. Cc: stable@vger.kernel.org Reviewed-by: Bibo Mao <maobibo@loongson.cn> Signed-off-by: Qiang Ma <maqianga@uniontech.com> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2026-01-17LoongArch: KVM: Fix kvm_device leak in kvm_ipi_destroy()Qiang Ma1-0/+1
In kvm_ioctl_create_device(), kvm_device has allocated memory, kvm_device->destroy() seems to be supposed to free its kvm_device struct, but kvm_ipi_destroy() is not currently doing this, that would lead to a memory leak. So, fix it. Cc: stable@vger.kernel.org Reviewed-by: Bibo Mao <maobibo@loongson.cn> Signed-off-by: Qiang Ma <maqianga@uniontech.com> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2026-01-17LoongArch: dts: loongson-2k1000: Fix i2c-gpio node namesBinbin Zhou1-2/+2
The binding wants the node to be named "i2c-number", but those are named "i2c-gpio-number" instead. Thus rename those to i2c-0, i2c-1 to adhere to the binding and suppress dtbs_check warnings. Cc: stable@vger.kernel.org Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2026-01-17LoongArch: dts: loongson-2k2000: Add default interrupt controller address cellsBinbin Zhou1-0/+3
Add missing address-cells 0 to the Local I/O, Extend I/O and PCH-PIC Interrupt Controller node to silence W=1 warning: loongson-2k2000.dtsi:364.5-49: Warning (interrupt_map): /bus@10000000/pcie@1a000000/pcie@9,0:interrupt-map: Missing property '#address-cells' in node /bus@10000000/interrupt-controller@10000000, using 0 as fallback Value '0' is correct because: 1. The LIO/EIO/PCH interrupt controller does not have children, 2. interrupt-map property (in PCI node) consists of five components and the fourth component "parent unit address", which size is defined by '#address-cells' of the node pointed to by the interrupt-parent component, is not used (=0) Cc: stable@vger.kernel.org Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2026-01-17LoongArch: dts: loongson-2k1000: Add default interrupt controller address cellsBinbin Zhou1-0/+2
Add missing address-cells 0 to the Local I/O interrupt controller node to silence W=1 warning: loongson-2k1000.dtsi:498.5-55: Warning (interrupt_map): /bus@10000000/pcie@1a000000/pcie@9,0:interrupt-map: Missing property '#address-cells' in node /bus@10000000/interrupt-controller@1fe01440, using 0 as fallback Value '0' is correct because: 1. The Local I/O interrupt controller does not have children, 2. interrupt-map property (in PCI node) consists of five components and the fourth component "parent unit address", which size is defined by '#address-cells' of the node pointed to by the interrupt-parent component, is not used (=0) Cc: stable@vger.kernel.org Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2026-01-17LoongArch: dts: loongson-2k0500: Add default interrupt controller address cellsBinbin Zhou1-0/+3
Add missing address-cells 0 to the Local I/O and Extend I/O interrupt controller node to silence W=1 warning: loongson-2k0500.dtsi:513.5-51: Warning (interrupt_map): /bus@10000000/pcie@1a000000/pcie@0,0:interrupt-map: Missing property '#address-cells' in node /bus@10000000/interrupt-controller@1fe11600, using 0 as fallback Value '0' is correct because: 1. The Local I/O & Extend I/O interrupt controller do not have children, 2. interrupt-map property (in PCI node) consists of five components and the fourth component "parent unit address", which size is defined by '#address-cells' of the node pointed to by the interrupt-parent component, is not used (=0) Cc: stable@vger.kernel.org Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2026-01-17LoongArch: dts: Describe PCI sideband IRQ through interrupt-extendedYao Zi2-36/+21
SoC integrated peripherals on LS2K1000 and LS2K2000 could be discovered as PCI devices, but require sideband interrupts to function, which are previously described by interrupts and interrupt-parent properties. However, pci/pci-device.yaml allows interrupts property to only specify PCI INTx interrupts, not sideband ones. Convert these devices to use interrupt-extended property, which describes sideband interrupts used by PCI devices since dt-schema commit e6ea659d2baa ("schemas: pci-device: Allow interrupts-extended for sideband interrupts"), eliminating dtbs_check warnings. Cc: stable@vger.kernel.org Fixes: 30a5532a3206 ("LoongArch: dts: DeviceTree for Loongson-2K1000") Signed-off-by: Yao Zi <me@ziyao.cc> Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2026-01-17LoongArch: Fix PMU counter allocation for mixed-type event groupsLisa Robinson1-3/+18
When validating a perf event group, validate_group() unconditionally attempts to allocate hardware PMU counters for the leader, sibling events and the new event being added. This is incorrect for mixed-type groups. If a PERF_TYPE_SOFTWARE event is part of the group, the current code still tries to allocate a hardware PMU counter for it, which can wrongly consume hardware PMU resources and cause spurious allocation failures. Fix this by only allocating PMU counters for hardware events during group validation, and skipping software events. A trimmed down reproducer is as simple as this: #include <stdio.h> #include <assert.h> #include <unistd.h> #include <string.h> #include <sys/syscall.h> #include <linux/perf_event.h> int main (int argc, char *argv[]) { struct perf_event_attr attr = { 0 }; int fds[5]; attr.disabled = 1; attr.exclude_kernel = 1; attr.exclude_hv = 1; attr.read_format = PERF_FORMAT_TOTAL_TIME_ENABLED | PERF_FORMAT_TOTAL_TIME_RUNNING | PERF_FORMAT_ID | PERF_FORMAT_GROUP; attr.size = sizeof (attr); attr.type = PERF_TYPE_SOFTWARE; attr.config = PERF_COUNT_SW_DUMMY; fds[0] = syscall (SYS_perf_event_open, &attr, 0, -1, -1, 0); assert (fds[0] >= 0); attr.type = PERF_TYPE_HARDWARE; attr.config = PERF_COUNT_HW_CPU_CYCLES; fds[1] = syscall (SYS_perf_event_open, &attr, 0, -1, fds[0], 0); assert (fds[1] >= 0); attr.type = PERF_TYPE_HARDWARE; attr.config = PERF_COUNT_HW_INSTRUCTIONS; fds[2] = syscall (SYS_perf_event_open, &attr, 0, -1, fds[0], 0); assert (fds[2] >= 0); attr.type = PERF_TYPE_HARDWARE; attr.config = PERF_COUNT_HW_BRANCH_MISSES; fds[3] = syscall (SYS_perf_event_open, &attr, 0, -1, fds[0], 0); assert (fds[3] >= 0); attr.type = PERF_TYPE_HARDWARE; attr.config = PERF_COUNT_HW_CACHE_REFERENCES; fds[4] = syscall (SYS_perf_event_open, &attr, 0, -1, fds[0], 0); assert (fds[4] >= 0); printf ("PASSED\n"); return 0; } Cc: stable@vger.kernel.org Fixes: b37042b2bb7c ("LoongArch: Add perf events support") Signed-off-by: Lisa Robinson <lisa@bytefly.space> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2026-01-17ARM: dts: imx: move nand related property under nand@0Frank Li15-22/+82
Add child node nand@0 and move NAND related property under it to align modern nand-controller.yaml. Fix below CHECK_DTBS warnings: arch/arm/boot/dts/nxp/imx/imx6ull-colibri-aster.dtb: nand-controller@1806000 (fsl,imx6q-gpmi-nand): Unevaluated properties are not allowed ('nand-ecc-mode', 'nand-ecc-step-size', 'nand-ecc-strength', 'nand-on-flash-bbt' were unexpected) from schema $id: http://devicetree.org/schemas/mtd/gpmi-nand.yaml# Since 2019 year, commit (212e496935929 dt-bindings: mtd: Add YAML schemas for the generic NAND options) NAND related property is preferred located under nand@<n> even though only one NAND chip supported. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2026-01-17ARM: dts: imx6sx: update gpmi #size-cells to 0Frank Li1-1/+1
Update gpmi #size-cells to 0 to fix below CHECK_DTB warnings: arch/arm/boot/dts/nxp/imx/imx6sx-nitrogen6sx.dtb: nand-controller@1806000 (fsl,imx6sx-gpmi-nand): #size-cells: 0 was expected from schema $id: http://devicetree.org/schemas/mtd/gpmi-nand.yaml# Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2026-01-17ARM: dts: imx6qdl: add '#address-cells' and '#size-cells' for gpmi-nandFrank Li1-0/+2
Add '#address-cells' and '#size-cells' for gpmi-nand to below CHECK_DTBS warings: arm/boot/dts/nxp/imx/imx6dl-aristainetos_4.dtb: nand-controller@112000 (fsl,imx6q-gpmi-nand): '#address-cells' is a required property from schema $id: http://devicetree.org/schemas/mtd/gpmi-nand.yaml# Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2026-01-17arm64: dts: imx91: Add thermal-sensor and thermal-zone supportFrank Li1-0/+58
Add thermal-sensor and thermal-zone support. Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2026-01-17riscv: Use 64-bit variable for output in __get_user_asmNathan Chancellor1-2/+12
After commit f6bff7827a48 ("riscv: uaccess: use 'asm_goto_output' for get_user()"), which was the first commit that started using asm goto with outputs on RISC-V, builds of clang built with assertions enabled start crashing in certain files that use get_user() with: clang: llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp:12743: Register FollowCopyChain(MachineRegisterInfo &, Register): Assertion `MI->getOpcode() == TargetOpcode::COPY && "start of copy chain MUST be COPY"' failed. Internally, LLVM generates an addiw instruction when the output of the inline asm (which may be any scalar type) needs to be sign extended for ABI reasons, such as a later function call, so that basic block does not have to do it. Use a temporary 64-bit variable as the output of the inline assembly in __get_user_asm() and explicitly cast it to truncate it if necessary, avoiding the addiw that triggers the assertion. Link: https://github.com/ClangBuiltLinux/linux/issues/2092 Signed-off-by: Nathan Chancellor <nathan@kernel.org> Link: https://patch.msgid.link/20260116-riscv-wa-llvm-asm-goto-outputs-assertion-failure-v3-1-55b5775f989b@kernel.org Signed-off-by: Paul Walmsley <pjw@kernel.org>
2026-01-17ARM: tegra: Adjust DSI nodes for Tegra20/Tegra30Svyatoslav Ryhel2-0/+12
Add missing nvidia,mipi-calibrate and cells properties to DSI nodes. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-01-17arm64: tegra: smaug: Add usb-role-switch supportDiogo Ivo1-0/+2
The USB2 port on Smaug is configured for OTG operation but lacked the required 'usb-role-switch' property, leading to a failed probe and a non-functioning USB port. Add the property along with setting the default role to host. Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt> Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-01-17arm64: tegra: smaug: Complete and enable tegra-udc nodeDiogo Ivo1-0/+11
Complete the missing properties in the tegra-udc node and enable it for Smaug. Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt> Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-01-17arm64: tegra: smaug: Enable DisplayPort via USB-C portDiogo Ivo1-0/+12
Enable both SOR and DPAUX modules allowing the USB-C port to transmit video in DP altmode. Tested on several monitors with USB-C to HDMI adapter. Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt> Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-01-17arm64: tegra: Correct CPU compatibles on Tegra264Krzysztof Kozlowski1-2/+2
"arm,armv8" CPU compatible is only for software models and must not be used in DTS for actual hardware. Replace them with Neoverse V3AE compatible, based what is written on Wikipedia [1]. Link: https://en.wikipedia.org/wiki/Tegra#Thor [1] Reported-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Closes: https://lore.kernel.org/all/59ae6b16-7866-413a-a1d2-4a735024c108@oss.qualcomm.com/ Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
generated by cgit v1.2.3 (git 2.39.0) at 2026-05-24 19:52:46 +0300