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2026-03-11Merge tag 'kvmarm-fixes-7.0-3' of ↵Paolo Bonzini5-8/+26
git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD KVM/arm64 fixes for 7.0, take #3 - Correctly handle deeactivation of out-of-LRs interrupts by starting the EOIcount deactivation walk *after* the last irq that made it into an LR. This avoids deactivating irqs that are in the LRs and that the vcpu hasn't deactivated yet. - Avoid calling into the stubs to probe for ICH_VTR_EL2.TDS when pKVM is already enabled -- not only thhis isn't possible (pKVM will reject the call), but it is also useless: this can only happen for a CPU that has already booted once, and the capability will not change.
2026-03-11Merge tag 'kvm-x86-generic-7.0-rc3' of https://github.com/kvm-x86/linux into ↵Paolo Bonzini10-16/+16
HEAD KVM generic changes for 7.0 - Remove a subtle pseudo-overlay of kvm_stats_desc, which, aside from being unnecessary and confusing, triggered compiler warnings due to -Wflex-array-member-not-at-end. - Document that vcpu->mutex is take outside of kvm->slots_lock and kvm->slots_arch_lock, which is intentional and desirable despite being rather unintuitive.
2026-03-11Merge tag 'kvm-riscv-fixes-7.0-1' of https://github.com/kvm-riscv/linux into ↵Paolo Bonzini8-44/+109
HEAD KVM/riscv fixes for 7.0, take #1 - Prevent speculative out-of-bounds access using array_index_nospec() in APLIC interrupt handling, ONE_REG regiser access, AIA CSR access, float register access, and PMU counter access - Fix potential use-after-free issues in kvm_riscv_gstage_get_leaf(), kvm_riscv_aia_aplic_has_attr(), and kvm_riscv_aia_imsic_has_attr() - Fix potential null pointer dereference in kvm_riscv_vcpu_aia_rmw_topei() - Fix off-by-one array access in SBI PMU - Skip THP support check during dirty logging - Fix error code returned for Smstateen and Ssaia ONE_REG interface - Check host Ssaia extension when creating AIA irqchip
2026-03-11KVM: arm64: Fix out-of-tree build for nVHE/pKVM tracingVincent Donnefort1-1/+1
simple_ring_buffer.c is located in the source tree and isn't duplicated to objtree. Fix its include path. Signed-off-by: Vincent Donnefort <vdonnefort@google.com> Link: https://patch.msgid.link/20260311164956.1424119-1-vdonnefort@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2026-03-11x86/hyperv: Use __naked attribute to fix stackless C functionArd Biesheuvel1-39/+43
hv_crash_c_entry() is a C function that is entered without a stack, and this is only allowed for functions that have the __naked attribute, which informs the compiler that it must not emit the usual prologue and epilogue or emit any other kind of instrumentation that relies on a stack frame. So split up the function, and set the __naked attribute on the initial part that sets up the stack, GDT, IDT and other pieces that are needed for ordinary C execution. Given that function calls are not permitted either, use the existing long return coded in an asm() block to call the second part of the function, which is an ordinary function that is permitted to call other functions as usual. Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com> # asm parts, not hv parts Reviewed-by: Mukesh Rathor <mrathor@linux.microsoft.com> Acked-by: Uros Bizjak <ubizjak@gmail.com> Cc: Wei Liu <wei.liu@kernel.org> Cc: linux-hyperv@vger.kernel.org Fixes: 94212d34618c ("x86/hyperv: Implement hypervisor RAM collection into vmcore") Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Wei Liu <wei.liu@kernel.org>
2026-03-11Merge tag 'powerpc-7.0-2' of ↵Linus Torvalds34-661/+367
git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux Pull powerpc fixes from Madhavan Srinivasan: - Correct MSI allocation tracking - Always use 64 bits PTE for powerpc/e500 - Fix inline assembly for clang build on PPC32 - Fixes for clang build issues in powerpc64/ftrace - Fixes for powerpc64/bpf JIT and tailcall support - Cleanup MPC83XX devicetrees - Fix keymile vendor prefix - Fix to use big-endian types for crash variables Thanks to Abhishek Dubey, Christophe Leroy (CS GROUP), Hari Bathini, Heiko Schocher, J. Neuschäfer, Mahesh Salgaonkar, Nam Cao, Nilay Shroff, Rob Herring (Arm), Saket Kumar Bhaskar, Sourabh Jain, Stan Johnson, and Venkat Rao Bagalkote. * tag 'powerpc-7.0-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (23 commits) powerpc/pseries: Correct MSI allocation tracking powerpc: dts: mpc83xx: Add unit addresses to /memory powerpc: dts: mpc8315erdb: Add missing #cells properties to SPI bus powerpc: dts: mpc8315erdb: Rename LED nodes to comply with schema powerpc: dts: mpc8315erdb: Use IRQ_TYPE_* macros powerpc: dts: mpc8313erdb: Use IRQ_TYPE_* macros powerpc: 83xx: km83xx: Fix keymile vendor prefix dt-bindings: powerpc: Add Freescale/NXP MPC83xx SoCs powerpc64/bpf: fix kfunc call support powerpc64/bpf: fix handling of BPF stack in exception callback powerpc64/bpf: remove BPF redzone protection in trampoline stack powerpc64/bpf: use consistent tailcall offset in trampoline powerpc64/bpf: fix the address returned by bpf_get_func_ip powerpc64/bpf: do not increment tailcall count when prog is NULL powerpc64/ftrace: workaround clang recording GEP in __patchable_function_entries powerpc64/ftrace: fix OOL stub count with clang powerpc64: make clang cross-build friendly powerpc/crash: adjust the elfcorehdr size powerpc/kexec/core: use big-endian types for crash variables powerpc/prom_init: Fixup missing #size-cells on PowerMac media-bay nodes ...
2026-03-11arm64: defconfig: Enable Qualcomm WCD937x headphone codec as moduleAjay Kumar Nandam1-0/+1
Enable the Qualcomm WCD937x headphone audio codec as a loadable module, as it is now required on the QCM6490 IDP platform. Signed-off-by: Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260121102606.1753970-1-ajay.nandam@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-11arm64: defconfig: Enable QCOMTEE module for QTEE-enabled Qualcomm SoCsHarshal Dev1-0/+1
All Qualcomm SoCs starting from SM8650 provide access to the Qualcomm Trusted Execution Environment (QTEE) through the SMCInvoke interface, implemented by the QCOMTEE driver. QTEE runs in the Secure World domain on ARM64 CPUs and exposes secure services to Linux running in the Normal World domain. This change enables the QCOMTEE driver as a module to support communication with QTEE. QCOMTEE has been tested on a Qualcomm RB3Gen2 board by loading and executing a Trusted Application via tests hosted at github.com/qualcomm/minkipc. Signed-off-by: Harshal Dev <harshal.dev@oss.qualcomm.com> Reviewed-by: Kuldeep Singh <kuldeep.singh@oss.qualcomm.com> Tested-by: Kuldeep Singh <kuldeep.singh@oss.qualcomm.com> Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com> Reviewed-by: Amirreza Zarrabi <amirreza.zarrabi@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260114-qcom_qcomtee_defconfig-v4-1-ec676311171f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-11MIPS: vdso: Explicitly include asm/vdso/vdso.hThomas Weißschuh1-0/+1
The usage of __VDSO_PAGES requires asm/vdso/vdso.h. Currently this header is included transitively, but that transitive inclusion is about to go away. Explicitly include the header. Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://patch.msgid.link/20260227-vdso-header-cleanups-v2-8-35d60acf7410@linutronix.de
2026-03-11MIPS: vdso: Add include guard to asm/vdso/vdso.hThomas Weißschuh1-0/+5
An upcomming patch will lead to the header file being included multiple times from the same source file. Add an include guard so this is possible. Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://patch.msgid.link/20260227-vdso-header-cleanups-v2-7-35d60acf7410@linutronix.de
2026-03-11LoongArch: vDSO: Explicitly include asm/vdso/vdso.hThomas Weißschuh2-0/+2
The usage of 'struct old_timespec32' requires asm/vdso/vdso.h. Currently this header is included transitively, but that transitive inclusion is about to go away. Explicitly include the header. Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://patch.msgid.link/20260227-vdso-header-cleanups-v2-6-35d60acf7410@linutronix.de
2026-03-11powerpc/vdso: Explicitly include asm/cputable.h and asm/feature-fixups.hThomas Weißschuh1-0/+3
The usage of ASM_FTR_IFCLR(CPU_TR_ARCH_31) requires asm/cputable.h and asm/feature-fixups.h. Currently these headers are included transitively, but that transitive inclusion is about to go away. Explicitly include the headers. Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://patch.msgid.link/20260227-vdso-header-cleanups-v2-5-35d60acf7410@linutronix.de
2026-03-11powerpc/vdso/gettimeofday: Explicitly include vdso/time32.hThomas Weißschuh1-0/+1
The usage of 'struct old_timespec32' requires vdso/time32.h. Currently this header is included transitively, but that transitive inclusion is about to go away. Explicitly include the header. Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://patch.msgid.link/20260227-vdso-header-cleanups-v2-4-35d60acf7410@linutronix.de
2026-03-11ARM: vdso: gettimeofday: Add explicit includesThomas Weißschuh1-0/+2
The reference to VDSO_CLOCKMODE_NONE requires vdso/clocksource.h and 'struct old_timespec32' requires vdso/time32.h. Currently these headers are included transitively, but those transitive inclusions are about to go away. Explicitly include the headers. Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://patch.msgid.link/20260227-vdso-header-cleanups-v2-3-35d60acf7410@linutronix.de
2026-03-11arm64: vDSO: compat_gettimeofday: Add explicit includesThomas Weißschuh1-0/+3
The reference to VDSO_CLOCKMODE_ARCHTIMER requires vdso/clocksource.h and 'struct old_timespec32' requires vdso/time32.h. Currently these headers are included transitively, but those transitive inclusions are about to go away. Explicitly include the headers. Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Link: https://patch.msgid.link/20260227-vdso-header-cleanups-v2-2-35d60acf7410@linutronix.de
2026-03-11arm64: vDSO: gettimeofday: Explicitly include vdso/clocksource.hThomas Weißschuh1-0/+2
The reference to VDSO_CLOCKMODE_NONE requires vdso/clocksource.h. Currently this header is included transitively, but that transitive inclusion is about to go away. Explicitly include the header. Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Link: https://patch.msgid.link/20260227-vdso-header-cleanups-v2-1-35d60acf7410@linutronix.de
2026-03-11x86/mce, EDAC/mce_amd: Add new SMCA bank typesYazen Ghannam2-0/+32
Recognize new SMCA bank types and include their short names for sysfs and long names for decoding. Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://patch.msgid.link/20260307163316.345923-4-yazen.ghannam@amd.com
2026-03-11x86/mce, EDAC/mce_amd: Update CS bank type namingYazen Ghannam2-2/+2
Recent documentation updated the "CS" bank type name from "Coherent Slave" to "Coherent Station". Apply this change in the kernel also. Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://patch.msgid.link/20260307163316.345923-3-yazen.ghannam@amd.com
2026-03-11x86/mce, EDAC/mce_amd: Reorder SMCA bank type enumsYazen Ghannam2-90/+76
Originally, the SMCA bank type enums were ordered based on processor documentation. However, the ordering became inconsistent after new bank types were added over time. Sort the bank type enums alphanumerically in most places. Sort the "enum to HWID/McaType" mapping by HWID/McaType. Drop redundant code comments. No functional changes. [ bp: Sort them alphanumerically. ] Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://patch.msgid.link/20260307163316.345923-2-yazen.ghannam@amd.com
2026-03-11sparc64: vdso: Implement clock_gettime64()Thomas Weißschuh3-2/+28
To be y2038-safe, 32-bit userspace needs to explicitly call the 64-bit safe time APIs. Implement clock_gettime64() in the 32-bit vDSO. Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Tested-by: Andreas Larsson <andreas@gaisler.com> Reviewed-by: Andreas Larsson <andreas@gaisler.com> Acked-by: Andreas Larsson <andreas@gaisler.com> Link: https://patch.msgid.link/20260304-vdso-sparc64-generic-2-v6-13-d8eb3b0e1410@linutronix.de
2026-03-11sparc64: vdso2c: Remove symbol handlingThomas Weißschuh2-50/+1
There are no handled symbols left. Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Tested-by: Andreas Larsson <andreas@gaisler.com> Reviewed-by: Andreas Larsson <andreas@gaisler.com> Acked-by: Andreas Larsson <andreas@gaisler.com> Link: https://patch.msgid.link/20260304-vdso-sparc64-generic-2-v6-12-d8eb3b0e1410@linutronix.de
2026-03-11sparc64: vdso2c: Drop sym_vvar_start handlingThomas Weißschuh3-12/+0
After the adoption of the generic vDSO library this symbol does not exist. The alignment invariant is now guaranteed by the generic code. Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Tested-by: Andreas Larsson <andreas@gaisler.com> Reviewed-by: Andreas Larsson <andreas@gaisler.com> Acked-by: Andreas Larsson <andreas@gaisler.com> Link: https://patch.msgid.link/20260304-vdso-sparc64-generic-2-v6-11-d8eb3b0e1410@linutronix.de
2026-03-11sparc64: vdso: Switch to the generic vDSO libraryThomas Weißschuh13-375/+118
The generic vDSO provides a lot common functionality shared between different architectures. SPARC is the last architecture not using it, preventing some necessary code cleanup. Make use of the generic infrastructure. Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Tested-by: Andreas Larsson <andreas@gaisler.com> Reviewed-by: Andreas Larsson <andreas@gaisler.com> Acked-by: Andreas Larsson <andreas@gaisler.com> Link: https://patch.msgid.link/20260304-vdso-sparc64-generic-2-v6-10-d8eb3b0e1410@linutronix.de
2026-03-11sparc64: vdso: Introduce vdso/processor.hThomas Weißschuh4-27/+44
The generic vDSO library expects a vdso/processor.h with an definition of cpu_relax(). Split out cpu_relax() into this dedicated header. Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Tested-by: Andreas Larsson <andreas@gaisler.com> Reviewed-by: Andreas Larsson <andreas@gaisler.com> Acked-by: Andreas Larsson <andreas@gaisler.com> Link: https://patch.msgid.link/20260304-vdso-sparc64-generic-2-v6-9-d8eb3b0e1410@linutronix.de
2026-03-11sparc64: vdso: Move syscall fallbacks into headerThomas Weißschuh2-49/+52
The generic vDSO libraries expected the syscall fallbacks in asm/vdso/gettimeofday.h. To prepare the adoption of the generic library, move the existing functions there. While at it, rename them so they match what the generic library expects. Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Tested-by: Andreas Larsson <andreas@gaisler.com> Reviewed-by: Andreas Larsson <andreas@gaisler.com> Acked-by: Andreas Larsson <andreas@gaisler.com> Link: https://patch.msgid.link/20260304-vdso-sparc64-generic-2-v6-8-d8eb3b0e1410@linutronix.de
2026-03-11sparc64: vdso: Move hardware counter read into headerThomas Weißschuh2-66/+82
The generic vDSO libraries expected the architecture glue around hardware counter reading in asm/vdso/gettimeofday.h. To prepare the adoption of the generic library, move the existing functions there. While at it, perform some trivial alignment with the generic vDSO library: * Drop 'notrace', as the functions are __always_inline anyways * Use the same parameter types * Use the same function names Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Tested-by: Andreas Larsson <andreas@gaisler.com> Reviewed-by: Andreas Larsson <andreas@gaisler.com> Acked-by: Andreas Larsson <andreas@gaisler.com> Link: https://patch.msgid.link/20260304-vdso-sparc64-generic-2-v6-7-d8eb3b0e1410@linutronix.de
2026-03-11sparc64: vdso: Replace code patching with runtime conditionalThomas Weißschuh4-316/+4
The patching logic is unnecessarily complicated and stands in the way of the adoption of the generic vDSO framework. Replace it by a simple runtime switch, similar to other architectures. Suggested-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Tested-by: Andreas Larsson <andreas@gaisler.com> Reviewed-by: Andreas Larsson <andreas@gaisler.com> Acked-by: Andreas Larsson <andreas@gaisler.com> Link: https://lore.kernel.org/lkml/87ecu9tfhw.ffs@tglx/ Link: https://patch.msgid.link/20260304-vdso-sparc64-generic-2-v6-6-d8eb3b0e1410@linutronix.de
2026-03-11sparc64: vdso: Remove obsolete "fake section table" reservationThomas Weißschuh2-29/+0
When the vDSO logic was copied from x86 to SPARC some unused remnants of the fake section handling were copied, too. In x86 the original fake section handling had already been removed incompletely in commit da861e18eccc ("x86, vdso: Get rid of the fake section mechanism"). On x86 the reservation was only cleaned up in commit 24b7c77bbb24 ("x86/vdso: Remove obsolete "fake section table" reservation"). Remove the reservation for SPARC, too. Fixes: 9a08862a5d2e ("vDSO for sparc") Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Tested-by: Andreas Larsson <andreas@gaisler.com> Reviewed-by: Andreas Larsson <andreas@gaisler.com> Acked-by: Andreas Larsson <andreas@gaisler.com> Link: https://patch.msgid.link/20260304-vdso-sparc64-generic-2-v6-5-d8eb3b0e1410@linutronix.de
2026-03-11sparc64: vdso: Link with -z noexecstackThomas Weißschuh1-1/+1
The vDSO stack does not need to be executable. Prevent the linker from creating executable. For more background see commit ffcf9c5700e4 ("x86: link vdso and boot with -z noexecstack --no-warn-rwx-segments"). Also prevent the following warning from the linker: sparc64-linux-ld: warning: arch/sparc/vdso/vdso-note.o: missing .note.GNU-stack section implies executable stack sparc64-linux-ld: NOTE: This behaviour is deprecated and will be removed in a future version of the linker Fixes: 9a08862a5d2e ("vDSO for sparc") Suggested-by: Arnd Bergmann <arnd@kernel.org> Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Tested-by: Andreas Larsson <andreas@gaisler.com> Reviewed-by: Andreas Larsson <andreas@gaisler.com> Acked-by: Andreas Larsson <andreas@gaisler.com> Link: https://lore.kernel.org/lkml/20250707144726.4008707-1-arnd@kernel.org/ Link: https://patch.msgid.link/20260304-vdso-sparc64-generic-2-v6-4-d8eb3b0e1410@linutronix.de
2026-03-11powerpc/audit: Directly include unistd_32.h from compat_audit.cThomas Weißschuh1-2/+1
This source file undefines '__powerpc64__' to get the 32-bit system call numbers from asm/unistd.h. However this symbol is also evaluated by other headers, among them is asm/bitsperlong.h. The undefinition leads to an inconsistency between __BITS_PER_LONG and the C type 'long'. An upcoming consistency check will be tripped by this. Directly include asm/unistd_32.h to get access to the 32-bit system call numbers instead. Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Link: https://patch.msgid.link/20260302-vdso-compat-checkflags-v2-4-78e55baa58ba@linutronix.de
2026-03-11s390: Add -m64 to KBUILD_CPPFLAGSThomas Weißschuh1-2/+1
Some non-code files, like linkescripts, are preprocessed with the C preprocessor and make use of regular kernel headers. As -m64 is not passed to those preprocessor invocations this leads to an inconsistency between __BITS_PER_LONG and the C type 'long'. An upcoming consistency check will be tripped by this. Make sure -m64 is also defined for those preprocessing steps. As KBUILD_CPPFLAGS is inherited by both KBUILD_AFLAGS and KBUILD_CFLAGS, drop -m64 from these variables. Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Link: https://patch.msgid.link/20260302-vdso-compat-checkflags-v2-3-78e55baa58ba@linutronix.de
2026-03-11sparc64: vdso: Use 32-bit CHECKFLAGS for compat vDSOThomas Weißschuh1-0/+3
When building the compat vDSO the CHECKFLAGS from the 64-bit kernel are used. These are combined with the 32-bit CFLAGS. This confuses sparse, producing false-positive warnings or potentially missing real issues. Manually override the CHECKFLAGS for the compat vDSO with the correct 32-bit configuration. Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Link: https://patch.msgid.link/20260302-vdso-compat-checkflags-v2-2-78e55baa58ba@linutronix.de Closes: https://lore.kernel.org/lkml/202511030021.9v1mIgts-lkp@intel.com/
2026-03-11x86/vdso: Use 32-bit CHECKFLAGS for compat vDSOThomas Weißschuh1-0/+4
When building the compat vDSO the CHECKFLAGS from the 64-bit kernel are used. These are combined with the 32-bit CFLAGS. This confuses sparse, producing false-positive warnings or potentially missing real issues. Manually override the CHECKFLAGS for the compat vDSO with the correct 32-bit configuration. Reported-by: Sun Jian <sun.jian.kdev@gmail.com> Reported-by: kernel test robot <lkp@intel.com> Reported-by: Dan Carpenter <dan.carpenter@linaro.org> Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Link: https://patch.msgid.link/20260302-vdso-compat-checkflags-v2-1-78e55baa58ba@linutronix.de Closes: https://lore.kernel.org/lkml/20260114084529.1676356-1-sun.jian.kdev@gmail.com/ Closes: https://lore.kernel.org/lkml/20260117215542.342638347@kernel.org/ Closes: https://lore.kernel.org/r/202602111941.PIhubgrb-lkp@intel.com/
2026-03-11KVM: arm64: Add selftest event support to nVHE/pKVM hypVincent Donnefort4-0/+42
Add a selftest event that can be triggered from a `write_event` tracefs file. This intends to be used by trace remote selftests. Signed-off-by: Vincent Donnefort <vdonnefort@google.com> Link: https://patch.msgid.link/20260309162516.2623589-30-vdonnefort@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2026-03-11KVM: arm64: Add hyp_enter/hyp_exit events to nVHE/pKVM hypVincent Donnefort10-17/+131
The hyp_enter and hyp_exit events are logged by the hypervisor any time it is entered and exited. Signed-off-by: Vincent Donnefort <vdonnefort@google.com> Link: https://patch.msgid.link/20260309162516.2623589-29-vdonnefort@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2026-03-11KVM: arm64: Add event support to the nVHE/pKVM hyp and trace remoteVincent Donnefort13-2/+184
Allow the creation of hypervisor and trace remote events with a single macro HYP_EVENT(). That macro expands in the kernel side to add all the required declarations (based on REMOTE_EVENT()) as well as in the hypervisor side to create the trace_<event>() function. Signed-off-by: Vincent Donnefort <vdonnefort@google.com> Link: https://patch.msgid.link/20260309162516.2623589-28-vdonnefort@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2026-03-11KVM: arm64: Add trace reset to the nVHE/pKVM hypVincent Donnefort5-1/+29
Make the hypervisor reset either the whole tracing buffer or a specific ring-buffer, on remotes/hypervisor/trace or per_cpu/<cpu>/trace write access. Signed-off-by: Vincent Donnefort <vdonnefort@google.com> Link: https://patch.msgid.link/20260309162516.2623589-27-vdonnefort@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2026-03-11KVM: arm64: Sync boot clock with the nVHE/pKVM hypVincent Donnefort5-0/+179
Configure the hypervisor tracing clock with the kernel boot clock. For tracing purposes, the boot clock is interesting: it doesn't stop on suspend. However, it is corrected on a regular basis, which implies the need to re-evaluate it every once in a while. Cc: John Stultz <jstultz@google.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Christopher S. Hall <christopher.s.hall@intel.com> Cc: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Vincent Donnefort <vdonnefort@google.com> Link: https://patch.msgid.link/20260309162516.2623589-26-vdonnefort@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2026-03-11KVM: arm64: Add trace remote for the nVHE/pKVM hypVincent Donnefort5-0/+238
In both protected and nVHE mode, the hypervisor is capable of writing events into tracefs compatible ring-buffers. Create a trace remote so the kernel can read those buffers. This currently doesn't provide any event support which will come later. Signed-off-by: Vincent Donnefort <vdonnefort@google.com> Link: https://patch.msgid.link/20260309162516.2623589-25-vdonnefort@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2026-03-11KVM: arm64: Add tracing capability for the nVHE/pKVM hypVincent Donnefort7-1/+354
There is currently no way to inspect or log what's happening at EL2 when the nVHE or pKVM hypervisor is used. With the growing set of features for pKVM, the need for tooling is more pressing. And tracefs, by its reliability, versatility and support for user-space is fit for purpose. Add support to write into a tracefs compatible ring-buffer. There's no way the hypervisor could log events directly into the host tracefs ring-buffers. So instead let's use our own, where the hypervisor is the writer and the host the reader. Signed-off-by: Vincent Donnefort <vdonnefort@google.com> Link: https://patch.msgid.link/20260309162516.2623589-24-vdonnefort@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2026-03-11KVM: arm64: Support unaligned fixmap in the pKVM hypVincent Donnefort1-2/+2
Return the fixmap VA with the page offset, instead of the page base address. This allows to use hyp_fixmap_map() seamlessly regardless of the address alignment. While at it, do the same for hyp_fixblock_map(). Signed-off-by: Vincent Donnefort <vdonnefort@google.com> Link: https://patch.msgid.link/20260309162516.2623589-23-vdonnefort@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2026-03-11KVM: arm64: Initialise hyp_nr_cpus for nVHE hypVincent Donnefort5-13/+10
Knowing the number of CPUs is necessary for determining the boundaries of per-cpu variables, which will be used for upcoming hypervisor tracing. hyp_nr_cpus which stores this value, is only initialised for the pKVM hypervisor. Make it accessible for the nVHE hypervisor as well. With the kernel now responsible for initialising hyp_nr_cpus, the nr_cpus parameter is no longer needed in __pkvm_init. Signed-off-by: Vincent Donnefort <vdonnefort@google.com> Link: https://patch.msgid.link/20260309162516.2623589-22-vdonnefort@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2026-03-11KVM: arm64: Add clock support to nVHE/pKVM hypVincent Donnefort3-1/+83
In preparation for supporting tracing from the nVHE hyp, add support to generate timestamps with a clock fed by the CNTCVT counter. The clock can be kept in sync with the kernel's by updating the slope values. This will be done later. As current we do only create a trace clock, make the whole support dependent on the upcoming CONFIG_NVHE_EL2_TRACING. Signed-off-by: Vincent Donnefort <vdonnefort@google.com> Link: https://patch.msgid.link/20260309162516.2623589-21-vdonnefort@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2026-03-11KVM: arm64: Add PKVM_DISABLE_STAGE2_ON_PANICVincent Donnefort5-30/+46
On NVHE_EL2_DEBUG, when using pKVM, the host stage-2 is relaxed to grant the kernel access to the stacktrace, hypervisor bug table and text to symbolize addresses. This is unsafe for production. In preparation for adding more debug options to NVHE_EL2_DEBUG, decouple the stage-2 relaxation into a separate option. While at it, rename PROTECTED_NVHE_STACKTRACE into PKVM_STACKTRACE, following the same naming scheme as PKVM_DISABLE_STAGE2_ON_PANIC. Reviewed-by: Kalesh Singh <kaleshsingh@google.com> Signed-off-by: Vincent Donnefort <vdonnefort@google.com> Link: https://patch.msgid.link/20260309162516.2623589-20-vdonnefort@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
2026-03-10arm64: dts: allwinner: sun55i-t527: avaota-a1: Add SPI NANDChen-Yu Tsai1-0/+15
The Avaota A1 board has a SPI NAND chip connected to spi0 on the PJ pins with support for QSPI. Enable spi0 and add a device node for the SPI NAND chip. Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://patch.msgid.link/20260302153559.3199783-4-wens@kernel.org Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
2026-03-10arm64: dts: allwinner: sun55i-a523: Add pinmux for spi0 on PJ pinsChen-Yu Tsai1-0/+35
The Avaota A1 board uses spi0 on the PJ pins to connect a SPI NAND chip. Add the full set of pins. Even though this board doesn't use CS1, other boards may do so in the future. Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://patch.msgid.link/20260302153559.3199783-3-wens@kernel.org Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
2026-03-10x86/64/defconfig: Add CONFIG_IRQ_REMAPShashank Balaji1-0/+1
x2apic is enabled in the defconfig, and interrupt remapping is an architectural dependency of x2apic as per the Intel SDM: Routing of device interrupts to local APIC units operating in x2APIC mode requires use of the interrupt-remapping architecture specified in the Intel® Virtualization Technology for Directed I/O (Revision 1.3 and/or later versions). Enable CONFIG_IRQ_REMAP in defconfig so that a defconfig kernel on bare metal actually uses x2apic. Co-developed-by: Rahul Bukte <rahul.bukte@sony.com> Signed-off-by: Rahul Bukte <rahul.bukte@sony.com> Signed-off-by: Shashank Balaji <shashank.mahadasyam@sony.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Sohil Mehta <sohil.mehta@intel.com> Acked-by: Thomas Gleixner <tglx@kernel.org> Link: https://patch.msgid.link/20260306-x2apic-fix-v2-2-bee99c12efa3@sony.com
2026-03-10arm64: remove ARCH_INLINE_*Jisheng Zhang1-26/+0
Since commit 7dadeaa6e851 ("sched: Further restrict the preemption modes"), arm64 only has two preemption models: full and lazy. Both implies PREEMPTION, so !PREEMPTION is always false for arm64, it's time to remove ARCH_INLINE_*. Signed-off-by: Jisheng Zhang <jszhang@kernel.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2026-03-10arm64: dts: exynos8895: Move I2C address/size-cells to DTSIKrzysztof Kozlowski2-2/+128
Convention followed in all other DTSI files is to define I2C controller address/size-cells in the DTSI thus reducing code needed in each DTS. It's also logical, since I2C is a bus and needs definition of addressing children, even if the bus is enabled without the nodes. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260305-dts-exynos-i2c-v1-2-2c8d3df3b9ca@oss.qualcomm.com Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2026-03-10arm64: dts: exynos7870: Move I2C address/size-cells to DTSIKrzysztof Kozlowski6-32/+48
Convention followed in all other DTSI files is to define I2C controller address/size-cells in the DTSI thus reducing code needed in each DTS. It's also logical, since I2C is a bus and needs definition of addressing children, even if the bus is enabled without the nodes. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260305-dts-exynos-i2c-v1-1-2c8d3df3b9ca@oss.qualcomm.com Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>