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2010-08-04powerpc/85xx: Cleanup QE initialization for MPC85xxMDS boardsAnton Vorontsov1-129/+143
The mpc85xx_mds_setup_arch() function is incomprehensible and unmaintainable. Factor out all QE specific stuff into mpc85xx_mds_qe_init() and mpc85xx_mds_reset_ucc_phys(). Also move QE stuff out of mpc85xx_mds_pic_init(). The diff is unreadable, but only because the code was so. ;-) It should be better now, and less indented. Signed-off-by: Anton Vorontsov <avorontsov@mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-04powerpc/85xx: Fix booting for P1021MDS boardsAnton Vorontsov2-6/+38
P1021 processors have no dedicated ROM to store the QE microcode, so the fimrware is stored externally, and it is U-Boot responsibility to load it. It might be that the board is booting without QE, e.g. currently U-Boot doesn't support QE for P1021MDS boards, which means that QE isn't initialized, and so the board hangs early at boot. This patch fixes the issue by marking QE as disabled and checking the state in the probing code. U-Boot should fixup the state if it initialized the QE. Signed-off-by: Anton Vorontsov <avorontsov@mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-04powerpc/85xx: Fix SWIOTLB initalization for MPC85xxMDS boardsAnton Vorontsov1-8/+8
The code inside '#ifdef CONFIG_QUICC_ENGINE' makes the mpc85xx_mds_setup_arch() return early if no QE nodes present, and so SWIOTLB is never initialized. This patch fixes the issue by moving SWIOTLB code above QE. Signed-off-by: Anton Vorontsov <avorontsov@mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-02powerpc/85xx: kexec for SMP 85xx BookE systemsMatthew McClintock2-5/+68
Adds support for kexec on 85xx machines for the BookE platform. Including support for SMP machines Based off work from Maxim Uvarov <muvarov@mvista.com> Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-31powerpc/kexec: Fix orphaned offline CPUs across kexecMatt Evans1-1/+25
When CPU hotplug is used, some CPUs may be offline at the time a kexec is performed. The subsequent kernel may expect these CPUs to be already running, and will declare them stuck. On pseries, there's also a soft-offline (cede) state that CPUs may be in; this can also cause problems as the kexeced kernel may ask RTAS if they're online -- and RTAS would say they are. The CPU will either appear stuck, or will cause a crash as we replace its cede loop beneath it. This patch kicks each present offline CPU awake before the kexec, so that none are forever lost to these assumptions in the subsequent kernel. Now, the behaviour is that all available CPUs that were offlined are now online & usable after the kexec. This mimics the behaviour of a full reboot (on which all CPUs will be restarted). Signed-off-by: Matt Evans <matt@ozlabs.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-31powerpc/kexec: Add to and tidy debug/comments in machine_kexec64.cMatt Evans1-5/+24
Tidies some typos, KERN_INFO-ise an info msg, and add a debug msg showing when the final sequence starts. Also adds a comment to kexec_prepare_cpus_wait() to make note of a possible problem; the need for kexec to deal with CPUs that failed to originally start up. Signed-off-by: Matt Evans <matt@ozlabs.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-31powerpc: Print decimal values in prom_init.cMichael Neuling1-9/+35
Currently we look pretty stupid when printing out a bunch of things in prom_init.c. eg. Max number of cores passed to firmware: 0x0000000000000080 So I've change this to print in decimal: Max number of cores passed to firmware: 128 (NR_CPUS = 256) This required adding a prom_print_dec() function and changing some prom_printk() calls from %x to %lu. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-31powerpc: ONLINE to OFFLINE CPU state transition during removalRobert Jennings1-0/+1
If a CPU remove is attempted using the 'release' interface on hardware which supports extended cede, the CPU will be put in the INACTIVE state rather than the OFFLINE state due to the default preferred_offline_state in that situation. In the INACTIVE state it will fail to be removed. This patch changes the preferred offline state to OFFLINE when an CPU is in the ONLINE state. After cpu_down() is called in dlpar_offline_cpu() the CPU will be OFFLINE and CPU removal can continue. Signed-off-by: Robert Jennings <rcj@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-31powerpc/powermac: Add PowerMac10,2 machine descriptorBenjamin Herrenschmidt1-1/+5
This adds support for the Mac Mini's that were quietly rolled out in 2005. Work still needs to be done to support suspend and WakeOnLan. Signed-off-by: Mark Crichton <crichton@gmail.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-31powerpc/pseries: Increase cpu die timeoutBenjamin Herrenschmidt1-2/+2
In testing SMT disable, we have been regularly seeing the following message: Querying DEAD? cpu %i (%i) shows %i This indicates the current delay in pseries_cpu_die where we wait for the specified CPU to die, is insufficient. Usually, this does not cause a problem, but we've seen this result in BUG_ON's going off in the timer code when we try to migrate the timers off the dead cpu while a timer is still running. Increasing this delay, as is done in this patch, seems to resolve this issue. Signed-off-by: Brian King <brking@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-31powerpc/smp: remove the incorrect decrementer initial codes for APTiejun Chen1-8/+0
We already defined start_cpu_decrementer() to invoke decrementer for AP as the following path: start_secondary() -> secondary_cpu_time_init() -> start_cpu_decrementer() So remove these incorrect codes introduced from commit: e7f75ad0 powerpc/47x: Base ppc476 support And actually we really should not enable decrementer before calling set_dec(). Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-31powerpc: Fix GENERIC_ISA_DMA dependencyAnton Vorontsov1-1/+1
On PowerPC we should always use generic ISA DMA API implementation as there is simply no other implementation exist. Without this patch, the following build error pops up: sound/built-in.o: In function 'snd_dma_pointer': (.text+0x74ae): undefined reference to 'dma_spin_lock' ... make: *** [.tmp_vmlinux1] Error 1 This is PPC_85xx, SMP and some sound drivers set to =y. Signed-off-by: Anton Vorontsov <avorontsov@mvista.com> Acked-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-31powerpc: Remove redundant xics badness warningBrian King1-2/+0
While testing cpu offlining, we are regularly seeing the WARN_ON go off in xics_ipi_dispatch. It can occur when an IPI gets sent to the CPU while it is going offline. There is already a similar WARN_ON in the handlers for PPC_MSG_CALL_FUNCTION and PPC_MSG_CALL_FUNC_SINGLE, so the warning is not needed in that path. The debugger handler handles this case by simply ignoring IPIs for offline CPUs, so no warning is needed there. And the reschedule IPI, which is what is occurring in our test environment, can be safely ignored, so we can simply remove the WARN_ON from xics_ipi_dispatch. Signed-off-by: Brian King <brking@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-31powerpc: Add vmcoreinfo symbols to allow makdumpfile to filter core files ↵Neil Horman1-0/+12
properly Signed-off-by: Neil Horman <nhorman@tuxdriver.com> machine_kexec.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) Reviewed-by: WANG Cong <xiyou.wangcong@gmail.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-31powerpc: Remove unnecessary casts of private_dataJoe Perches1-1/+1
Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-31powerpc/crashdump: Fix issues with kexec and 36bit physical addrMatthew McClintock2-7/+7
Fix sizes of variables so correct values are exported via /proc. Cast variable in comparison to avoid compiler error. Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-31powerpc/kexec: Switch to a static PACA on the way outMatt Evans4-11/+31
With dynamic PACAs, the kexecing CPU's PACA won't lie within the kernel static data and there is a chance that something may stomp it when preparing to kexec. This patch switches this final CPU to a static PACA just before we pull the switch. Signed-off-by: Matt Evans <matt@ozlabs.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-30Merge commit 'jwb/next' into nextBenjamin Herrenschmidt4-27/+115
2010-07-26powerpc/40x: Distinguish AMCC PowerPC 405EX and 405EXr correctlyLee Nipper1-7/+111
The recent AMCC 405EX Rev D without Security uses a PVR value that matches the old 405EXr Rev A/B with Security. The 405EX Rev D without Security would be shown incorrectly as an 405EXr. The pvr_mask of 0xffff0004 is no longer sufficient to distinguish the 405EX from 405EXr. This patch replaces 2 entries in the cpu_specs table and adds 8 more, each using pvr_mask of 0xffff000f and appropriate pvr_value to distinguish the AMCC PowerPC 405EX and 405EXr instances. The cpu_name for these entries now includes the Rev, in similar fashion to the 440GX. Signed-off-by: Lee Nipper <lee.nipper@gmail.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2010-07-26powerpc/44x: Fix UART2/3 interrupt assignment in PPC460EX/GT dts filesStefan Roese2-4/+4
UART2 and UART3 on 460EX/GT have incorrect interrupt mappings right now. UART2 should be 28 (0x1c) and UART3 29 (0x1d). This patch fixes this and switches to using decimal number instead of hex, since the AppliedMicro (AMCC) users manuals describe their inerrupt numbers in decimal. Thanks to Fabien Proriol for pointing this out. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Fabien Proriol <Fabien.Proriol@jdsu.com> Cc: Josh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2010-07-26Remove REDWOOD_[456] config options and conditional codeChristian Dietrich1-16/+0
The config options for REDWOOD_[456] were commented out in the powerpc Kconfig. The ifdefs referencing this options therefore are dead and all references to this can be removed (Also dependencies in other KConfig files). Signed-off-by: Christian Dietrich <qy03fugy@stud.informatik.uni-erlangen.de> Signed-off-by: Christoph Egger <siccegge@cs.fau.de> Acked-by: David S. Miller <davem@davemloft.net> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2010-07-14powerpc/oprofile: Don't build server oprofile drivers on 64-bit BookEBenjamin Herrenschmidt2-2/+2
They will fail to build due to the lack of mtmsrd, and wouldn't be useful anyways Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-14powerpc/book3e: Adjust the page sizes list based on MMU configBenjamin Herrenschmidt3-32/+109
Use the MMU config registers to scan for available direct and indirect page sizes and print out the result. Will be needed for future hugetlbfs implementation. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-14powerpc/book3e: Add TLB dump in xmon for Book3EBenjamin Herrenschmidt1-0/+152
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-14powerpc/book3e: Fix single step when using HW page tablesBenjamin Herrenschmidt2-4/+15
We patch the TLB miss exception vectors to point to alternate functions when using HW page table on BookE. However, we were patching in a new branch in the first instruction of the exception handler instead of the second one, thus overriding the nop that is in the first instruction. This cause problems when single stepping as we rely on that nop for the single step to stop properly within the exception vector range rather than on the target of the branch. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-14powerpc/book3e: Add generic 64-bit idle powersave supportBenjamin Herrenschmidt4-1/+111
We use a similar technique to ppc32: We set a thread local flag to indicate that we are about to enter or have entered the stop state, and have fixup code in the async interrupt entry code that reacts to this flag to make us return to a different location (sets NIP to LINK in our case). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> -- v2. Fix lockdep bug Re-mask interrupts when coming back from idle
2010-07-09powerpc/book3e: Resend doorbell exceptions to ourselfMichael Ellerman3-2/+13
If we are soft disabled and receive a doorbell exception we don't process it immediately. This means we need to check on the way out of irq restore if there are any doorbell exceptions to process. The problem is at that point we don't know what our regs are, and that in turn makes xmon unhappy. To workaround the problem, instead of checking for and processing doorbells, we check for any doorbells and if there were any we send ourselves another. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-09powerpc/book3e: Use set_irq_regs() in the msgsnd/msgrcv IPI pathDavid Gibson1-1/+6
include/asm-generic/irq_regs.h declares per-cpu irq_regs variables and get_irq_regs() and set_irq_regs() helper functions to maintain them. These can be used to access the proper pt_regs structure related to the current interrupt entry (if any). In the powerpc arch code, this is used to maintain irq regs on decrementer and external interrupt exceptions. However, for the doorbell exceptions used by the msgsnd/msgrcv IPI mechanism of newer BookE CPUs, the irq_regs are not kept up to date. In particular this means that xmon will not work properly on SMP, because the secondary xmon instances started by IPI will blow up when they cannot retrieve the irq regs. This patch fixes the problem by adding calls to maintain the irq regs across doorbell exceptions. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-09powerpc/book3e: Hookup doorbells exceptions on 64-bit Book3EBenjamin Herrenschmidt3-4/+25
Note that critical doorbells are an unimplemented stub just like other critical or machine check handlers, since we haven't done support for "levelled" exceptions yet. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-09powerpc/book3e: Don't re-trigger decrementer on lazy irq restoreBenjamin Herrenschmidt1-0/+9
The decrementer on BookE acts as a level interrupt and doesn't need to be re-triggered when going negative. It doesn't go negative anyways (unless programmed to auto-reload with a negative value) as it stops when reaching 0. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-09powerpc/book3e: More doorbell cleanups. Sample the PIR registerBenjamin Herrenschmidt3-18/+40
The doorbells use the content of the PIR register to match messages from other CPUs. This may or may not be the same as our linux CPU number, so using that as the "target" is no right. Instead, we sample the PIR register at boot on every processor and use that value subsequently when sending IPIs. We also use a per-cpu message mask rather than a global array which should limit cache line contention. Note: We could use the CPU number in the device-tree instead of the PIR register, as they are supposed to be equivalent. This might prove useful if doorbells are to be used to kick CPUs out of FW at boot time, thus before we can sample the PIR. This is however not the case now and using the PIR just works. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-09powerpc/book3e: Move doorbell_exception from traps.c to dbell.cBenjamin Herrenschmidt2-22/+21
... where it belongs Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-09powerpc/book3e: Hack to get gdb moving along on Book3E 64-bitBenjamin Herrenschmidt2-2/+24
Our handling of debug interrupts on Book3E 64-bit is not quite the way it should be just yet. This is a workaround to let gdb work at least for now. We ensure that when context switching, we set the appropriate DBCR0 value for the new task. We also make sure that we turn off MSR[DE] within the kernel, and set it as part of the bits that get set when going back to userspace. In the long run, we will probably set the userspace DBCR0 on the exception exit code path and ensure we have some proper kernel value to set on the way into the kernel, a bit like ppc32 does, but that will take more work. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-09powerpc/book3e: mtmsr should not be mtmsrd on book3e 64-bitBenjamin Herrenschmidt1-1/+1
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-09powerpc: Removing dead CONFIG_SMP_750Christoph Egger1-15/+0
CONFIG_SMP_750 doesn't exist in Kconfig, therefore removing all references for it from the source code. Signed-off-by: Christoph Egger <siccegge@cs.fau.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-09powerpc/pseries: Use kstrdupJulia Lawall1-3/+1
Use kstrdup when the goal of an allocation is copy a string into the allocated region. The semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression from,to; expression flag,E1,E2; statement S; @@ - to = kmalloc(strlen(from) + 1,flag); + to = kstrdup(from, flag); ... when != \(from = E1 \| to = E1 \) if (to==NULL || ...) S ... when != \(from = E2 \| to = E2 \) - strcpy(to, from); // </smpl> Signed-off-by: Julia Lawall <julia@diku.dk> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-09powerpc/iseries: Use kstrdupJulia Lawall1-2/+1
Use kstrdup when the goal of an allocation is copy a string into the allocated region. The semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression from,to; expression flag,E1,E2; statement S; @@ - to = kmalloc(strlen(from) + 1,flag); + to = kstrdup(from, flag); ... when != \(from = E1 \| to = E1 \) if (to==NULL || ...) S ... when != \(from = E2 \| to = E2 \) - strcpy(to, from); // </smpl> Signed-off-by: Julia Lawall <julia@diku.dk> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-09powerpc/numa: Use form 1 affinity to setup node distanceAnton Blanchard2-33/+92
Form 1 affinity allows multiple entries in ibm,associativity-reference-points which represent affinity domains in decreasing order of importance. The Linux concept of a node is always the first entry, but using the other values as an input to node_distance() allows the memory allocator to make better decisions on which node to go first when local memory has been exhausted. We keep things simple and create an array indexed by NUMA node, capped at 4 entries. Each time we lookup an associativity property we initialise the array which is overkill, but since we should only hit this path during boot it didn't seem worth adding a per node valid bit. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-09powerpc: Remove all rcu head initializationsPaul E. McKenney1-1/+0
Remove all rcu head inits. We don't care about the RCU head state before passing it to call_rcu() anyway. Only leave the "on_stack" variants so debugobjects can keep track of objects on stack. Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com> Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-09powerpc: Add i8042 keyboard and mouse irq parsingMartyn Welch1-0/+13
Currently the irqs for the i8042, which historically provides keyboard and mouse (aux) support, is hardwired in the driver rather than parsing the dts. This patch modifies the powerpc legacy IO code to attempt to parse the device tree for this information, failing back to the hardcoded values if it fails. Signed-off-by: Martyn Welch <martyn.welch@ge.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-09powerpc/pseries: Add WARN_ON() to request_event_sources_irqs() on irq ↵Mark Nelson1-8/+15
allocation/request failure At the moment if request_event_sources_irqs() can't allocate or request the interrupt, it just does a KERN_ERR printk. This may be fine for the existing RAS code where if we miss an EPOW event it just means that the event won't be logged and if we miss one of the RAS errors then we could miss an event that we perhaps should take action on. But, for the upcoming IO events code that will use event-sources if we can't allocate or request the interrupt it means we'd potentially miss an interrupt from the device. So, let's add a WARN_ON() in this error case so that we're a bit more vocal when something's amiss. While we're at it, also use pr_err() to neaten the code up a bit. Signed-off-by: Mark Nelson <markn@au1.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-09powerpc/pseries: Rename RAS_VECTOR_OFFSET to RTAS_VECTOR_EXTERNAL_INTERRUPT ↵Mark Nelson2-3/+5
and move to rtas.h The RAS code has a #define, RAS_VECTOR_OFFSET, that's used in the check-exception RTAS call for the vector offset of the exception. We'll be using this same vector offset for the upcoming IO Event interrupts code (0x500) so let's move it to include/asm/rtas.h and call it RTAS_VECTOR_EXTERNAL_INTERRUPT. Signed-off-by: Mark Nelson <markn@au1.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-09powerpc: Optimise per cpu accesses on 64bitAnton Blanchard3-6/+7
Now we dynamically allocate the paca array, it takes an extra load whenever we want to access another cpu's paca. One place we do that a lot is per cpu variables. A simple example: DEFINE_PER_CPU(unsigned long, vara); unsigned long test4(int cpu) { return per_cpu(vara, cpu); } This takes 4 loads, 5 if you include the actual load of the per cpu variable: ld r11,-32760(r30) # load address of paca pointer ld r9,-32768(r30) # load link address of percpu variable sldi r3,r29,9 # get offset into paca (each entry is 512 bytes) ld r0,0(r11) # load paca pointer add r3,r0,r3 # paca + offset ld r11,64(r3) # load paca[cpu].data_offset ldx r3,r9,r11 # load per cpu variable If we remove the ppc64 specific per_cpu_offset(), we get the generic one which indexes into a statically allocated array. This removes one load and one add: ld r11,-32760(r30) # load address of __per_cpu_offset ld r9,-32768(r30) # load link address of percpu variable sldi r3,r29,3 # get offset into __per_cpu_offset (each entry 8 bytes) ldx r11,r11,r3 # load __per_cpu_offset[cpu] ldx r3,r9,r11 # load per cpu variable Having all the offsets in one array also helps when iterating over a per cpu variable across a number of cpus, such as in the scheduler. Before we would need to load one paca cacheline when calculating each per cpu offset. Now we have 16 (128 / sizeof(long)) per cpu offsets in each cacheline. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-09powerpc/iseries: Fix constant warningDenis Kirjanov1-1/+1
Fix smatch warning: constant 0x8000000000000000 is so big it is unsigned long Signed-off-by: Denis Kirjanov <dkirjanov@kernel.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-09powerpc/mpic: Add ability to reset a core via MPICMatthew McClintock2-0/+19
We need the ability to reset cores for use with kexec/kdump for SMP systems. Calling this function with the specific core you want to reset will cause the CPU to spin in reset. Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-09powerpc/fsl-booke: Fix comments in mmu code that mention BATSBecky Bruce1-3/+4
There are no BATS on BookE - we have the TLBCAM instead. Also correct the page size information to included extended sizes. We don't actually allow a 4G page size to be used, so comment on that as well. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-09powerpc/pseries/eeh: Use for_each_pci_dev()Kulikov Vasiliy1-2/+1
Use for_each_pci_dev() to simplify the code. Signed-off-by: Kulikov Vasiliy <segooon@gmail.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-09powerpc/pseries: Partition hibernation supportBrian King5-1/+223
Enables support for HMC initiated partition hibernation. This is a firmware assisted hibernation, since the firmware handles writing the memory out to disk, along with other partition information, so we just mimic suspend to ram. Signed-off-by: Brian King <brking@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-09powerpc/pseries: Migration code reorganization / hibernation prepBrian King3-35/+81
Partition hibernation will use some of the same code as is currently used for Live Partition Migration. This function further abstracts this code such that code outside of rtas.c can utilize it. It also changes the error field in the suspend me data structure to be an atomic type, since it is set and checked on different cpus without any barriers or locking. Signed-off-by: Brian King <brking@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2010-07-09powerpc: Clean up obsolete code relating to decrementer and timebasePaul Mackerras7-153/+9
Since the decrementer and timekeeping code was moved over to using the generic clockevents and timekeeping infrastructure, several variables and functions have been obsolete and effectively unused. This deletes them. In particular, wakeup_decrementer() is no longer needed since the generic code reprograms the decrementer as part of the process of resuming the timekeeping code, which happens during sysdev resume. Thus the wakeup_decrementer calls in the suspend_enter methods for 52xx platforms have been removed. The call in the powermac cpu frequency change code has been replaced by set_dec(1), which will cause a timer interrupt as soon as interrupts are enabled, and the generic code will then reprogram the decrementer with the correct value. This also simplifies the generic_suspend_en/disable_irqs functions and makes them static since they are not referenced outside time.c. The preempt_enable/disable calls are removed because the generic code has disabled all but the boot cpu at the point where these functions are called, so we can't be moved to another cpu. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>