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2010-04-13sparc64: Add function graph tracer support.David S. Miller10-15/+132
Signed-off-by: David S. Miller <davem@davemloft.net>
2010-04-13sparc64: Give a stack frame to the ftrace call sites.David S. Miller1-15/+16
It's the only way we'll be able to implement the function graph tracer properly. A positive is that we no longer have to worry about the linker over-optimizing the tail call, since we don't use a tail call any more. Signed-off-by: David S. Miller <davem@davemloft.net>
2010-04-13sparc64: Use a seperate counter for timer interrupts and NMI checks, like x86.David S. Miller3-3/+3
This keeps us from having to use kstat_irqs_cpu() from the NMI handler, the former of which is a profiled function. Instead we use a currently empty slot in the cpu_data Signed-off-by: David S. Miller <davem@davemloft.net>
2010-04-13sparc64: Remove profiling from some low-level bits.David S. Miller1-1/+8
These include the timer implementation, perf events support, and the performance counter register (pcr) programming layer. Signed-off-by: David S. Miller <davem@davemloft.net>
2010-04-13sparc64: Kill unnecessary static on local var in ftrace_call_replace().David S. Miller1-1/+1
Signed-off-by: David S. Miller <davem@davemloft.net>
2010-04-13sparc64: Kill CONFIG_STACK_DEBUG code.David S. Miller2-78/+1
The generic stack tracer does this job just as well. Signed-off-by: David S. Miller <davem@davemloft.net>
2010-04-13sparc64: Add HAVE_FUNCTION_TRACE_MCOUNT_TEST and tidy up.David S. Miller2-7/+16
Check function_trace_stop at ftrace_caller Toss mcount_call and dummy call of ftrace_stub, unnecessary. Document problems we'll have if the final kernel image link ever turns on relaxation. Properly size 'ftrace_call' so it looks right when inspecting instructions under gdb et al. Signed-off-by: David S. Miller <davem@davemloft.net>
2010-04-13sparc64: Adjust __raw_local_irq_save() to cooperate in NMIs.David S. Miller1-2/+12
If we are in an NMI then doing a plain raw_local_irq_disable() will write PIL_NORMAL_MAX into %pil, which is lower than PIL_NMI, and thus we'll re-enable NMIs and recurse. Doing a simple: %pil = %pil | PIL_NORMAL_MAX does what we want, if we're already at PIL_NMI (15) we leave it at that setting, else we set it to PIL_NORMAL_MAX (14). This should get the function tracer working on sparc64. Signed-off-by: David S. Miller <davem@davemloft.net>
2010-04-13sparc64: Use kstack_valid() in die_if_kernel().David S. Miller1-23/+3
This gets rid of a local function (is_kernel_stack()) which tries to do the same thing, yet poorly in that it doesn't handle IRQ stacks properly. Signed-off-by: David S. Miller <davem@davemloft.net>
2010-04-13Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds19-77/+412
* master.kernel.org:/home/rmk/linux-2.6-arm: (21 commits) ARM: Fix ioremap_cached()/ioremap_wc() for SMP platforms ARM: 6043/1: AT91 slow-clock resume: Don't wait for a disabled PLL to lock ARM: 6031/1: fix Thumb-2 decompressor ARM: 6029/1: ep93xx: gpio.c: local functions should be static ARM: 6028/1: ARM: add MAINTAINERS for U300 ARM: 6024/1: bcmring: fix missing down on semaphore in dma.c MXC: mach_armadillo5x0: Add USB Host support. ARM mach-mx3: duplicated include ARM mach-mx3: duplicated include imx31: add watchdog device on litekit board. imx3: Add watchdog platform device support MXC: mach-mx31_3ds: add support for freescale mc13783 power management device. MXC: mach-mx31_3ds: Add SPI1 device support. MXC: mach-mx31_3ds: Add support for on board NAND Flash. MXC: mach-mx31_3ds: Update variable names over recent mach name modification. imx31: fix parent clock for rtc i.MX51: remove NFC AXI static mapping i.MX51: determine silicon revision dynamically i.MX51: map TZIC dynamically i.MX51: Use correct clock for gpt ...
2010-04-12MIPS: Calculate proper ebase value for 64-bit kernelsDavid Daney1-1/+1
The ebase is relative to CKSEG0 not CAC_BASE. On a 32-bit kernel they are the same thing, for a 64-bit kernel they are not. It happens to kind of work on a 64-bit kernel as they both reference the same physical memory. However since the CPU uses the CKSEG0 base, determining if a J instruction will reach always gives the wrong result unless we use the same number the CPU uses. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1093/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: Alchemy: DB1200: Remove custom wait implementationManuel Lauss1-40/+0
While playing with the out-of-tree MAE driver module, the system would panic after a while in the db1200 custom wait code after wakeup due to a clobbered k0 register being used as target address of a store op. Remove the custom wait implementation and revert back to the Alchemy- recommended implementation already set as default. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/1092/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: Big Sur: Make defconfig more useful.Ralf Baechle1-190/+490
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: Fix __vmalloc() etc. on MIPS for non-GPL modulesAnton Altaparmakov1-1/+1
Commit b3594a089f1c17ff919f8f78505c3f20e1f6f8ce (lmo) rsp. 351336929ccf222ae38ff0cb7a8dd5fd5c6236a0 (kernel.org) break non-GPL modules that use __vmalloc() or any of the vmap(), vm_map_ram(), etc functions on MIPS. All those functions are EXPORT_SYMBOL() so are meant to be allowed to be used by non-GPL kernel modules. These calls all take page protection as an argument which is normally a constant like PAGE_KERNEL. This commit causes all protection constants like PAGE_KERNEL to not be constants and instead to contain the GPL-only symbol _page_cachable_default. This means that all calls to __vmalloc(), vmap(), etc, cause non-GPL modules to fail to link with the complaint that they are trying to use the GPL-only symbol _page_cachable_default... Change EXPORT_SYMBOL_GPL(_page_cachable_default) to EXPORT_SYMBOL() for non-GPL modules that call __vmalloc(), vmap(), vm_map_ram() etc. Signed-off-by: Anton Altaparmakov <aia21@cantab.net> Cc: Chris Dearman <chris@mips.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: http://patchwork.linux-mips.org/patch/1084/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: Sibyte: Fix M3 TLB exception handler workaround.Ralf Baechle1-6/+16
The M3 workaround needs to cmpare the region and VPN2 fields only. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: BCM63xx: Fix build failure in board_bcm963xx.cFlorian Fainelli1-70/+70
Since 2083e8327aeeaf818b0e4522a9d2539835c60423, the SPROM is now registered in the board_prom_init callback, but it references variables and functions which are declared below. Move the variables and functions above board_prom_init. Signed-off-by: Florian Fainelli <ffainelli@freebox.fr> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1077/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: uasm: Add OR instruction.Ralf Baechle2-1/+4
This is needed for the fix of the M3 workaround. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: Sibyte: Apply M3 workaround only on affected chip types and versions.Ralf Baechle2-1/+20
Previously it was unconditionally used on all Sibyte family SOCs. The M3 bug has to be handled in the TLB exception handler which is extremly performance sensitive, so this modification is expected to deliver around 2-3% performance improvment. This is important as required changes to the M3 workaround will make it more costly. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: BCM63xx: Initialize gpio_out_low & out_high to current value at boot.Maxime Bizon1-0/+2
To avoid a glitch during GPIO initialisation read GPIO output register values left by the firmware. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/903/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: BCM63xx: Register SSB SPROM fallback in board's first stage callbackFlorian Fainelli1-11/+11
Signed-off-by: Florian Fainelli <ffainelli@freebox.fr> To: Maxime Bizon <mbizon@freebox.fr> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1017/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: BCM63xx: Fix typo in cpu-feature-overrides file.Maxime Bizon1-1/+1
Fix typo: CONFIG_BCMCPU_IS_63xx does not exist; CONFIG_BCM63XX_CPU_63xx is the valid config option. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> To: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Patchwork: http://patchwork.linux-mips.org/patch/901/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: BCM63xx: Add support for second uart.Maxime Bizon6-19/+102
The BCm63xx SOC has two uarts. Some boards use the second one for bluetooth. This patch changes platform device registration code to handle this. Changes to the UART driver were already merged in 6a2c7eabfd09ca7986bf96b8958a87ca041a19d8. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> To: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Patchwork: http://patchwork.linux-mips.org/patch/900/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: BCM63xx: Fix double gpio registration.Maxime Bizon1-2/+0
bcm63xx_gpio_init is already called from prom_init to allow board to use them early, so we can remove the unneeded arch_initcall. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> To: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Patchwork: http://patchwork.linux-mips.org/patch/899/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: BCM63xx: Add DWVS0 boardFlorian Fainelli1-0/+22
The DWVS0 board is a BCM6358-based board with an on-board OHCI controler. Signed-off-by: Florian Fainelli <florian@openwrt.org> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1015/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: BCM63xx: Add the RTA1025W-16 BCM6348-based board to suppported boards.Florian Fainelli1-0/+20
Signed-off-by: Florian Fainelli <florian@openwrt.org> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1014/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: BCM63xx: Fix BCM6338 and BCM6345 gpio countFlorian Fainelli1-0/+4
The number of GPIOs on BCM6338 is 8, while BCM6345 has only 16 GPIOs available. Signed-off-by: Florian Fainelli <florian@openwrt.org> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1016/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: libgcc.h: Checkpatch cleanupAndrea Gelmini1-2/+1
arch/mips/lib/libgcc.h:21: ERROR: open brace '{' following union go on the same line Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> To: linux-kernel@vger.kernel.org Cc: Paul Mundt <lethal@linux-sh.org> Cc: linux-mips@linux-mips.org Cc: linux-sh@vger.kernel.org Patchwork: http://patchwork.linux-mips.org/patch/1007/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: Loongson-2F: Flush the branch target history in BTB and RASWu Zhangjin1-0/+19
As per chapter 15 "Errata: Issue of Out-of-order in loongson"[1] to work around the Loongson 2F erratum we need to do: "When switching from user mode to kernel mode, you should flush the branch target history such as BTB and RAS." [1] Chinese version: http://www.loongson.cn/uploadfile/file/200808211 [2] English version of chapter 15: http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: Shinya Kuribayashi <shinya.kuribayashi@necel.com> Patchwork: http://patchwork.linux-mips.org/patch/1066/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: Move signal trampolines off of the stack.David Daney5-135/+43
This is a follow on to the vdso patch. Since all processes now have signal trampolines permanently mapped, we can use those instead of putting the trampoline on the stack and invalidating the corresponding icache across all CPUs. We also get rid of a bunch of ICACHE_REFILLS_WORKAROUND_WAR code. [Ralf: GDB 7.1 which has the necessary modifications to allow backtracing over signal frames will supposedly be released tomorrow. The old signal frame format obsoleted by this patch exists in two variations, for sane processors and for those requiring ICACHE_REFILLS_WORKAROUND_WAR. So there was never a GDB which did support backtracing over signal frames on all MIPS systems. This convinved me this series should be applied and pushed upstream as soon as possible.] Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/974/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: Preliminary VDSODavid Daney8-6/+165
This is a preliminary patch to add a vdso to all user processes. Still missing are ELF headers and .eh_frame information. But it is enough to allow us to move signal trampolines off of the stack. Note that emulation of branch delay slots in the FPU emulator still requires the stack. We allocate a single page (the vdso) and write all possible signal trampolines into it. The stack is moved down by one page and the vdso is mapped into this space. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/975/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: Add SYSCALL to uasm.David Daney2-2/+18
Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/976/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: make CAC_ADDR and UNCAC_ADDR account for PHYS_OFFSETFlorian Fainelli1-2/+4
On AR7, we already redefine PHYS_OFFSET to match the system specifities, it is however not sufficient when unsing dma_{map,unmap}_single, specifically in the ethernet driver, we must also adjust CAC_ADDR and UNCAC_ADDR for DMA to work correctly. This patch fixes the following issue, seen in cpmac_open: ops[#1]: Cpu 0 $ 0 : 00000000 10008400 a0f5b120 00000000 $ 4 : 94c59000 94270f64 00000020 00000010 $ 8 : 00000010 94103ce0 0000000a 94c03400 $12 : ffffffff 94c03408 94c03410 00000001 $16 : a0f5ba20 00000041 94c592c0 94c59200 $20 : 94c59000 000005ee 00002000 9438c8f0 $24 : 00000010 00000000 $28 : 94fac000 94fadd58 94390000 942724a8 Hi : 00000000 Lo : 00000001 epc : 94272518 cpmac_open+0x208/0x3f8 Not tainted ra : 942724a8 cpmac_open+0x198/0x3f8 Status: 10008403 KERNEL EXL IE Cause : 3080000c BadVA : 00000000 PrId : 00018448 (MIPS 4KEc) Modules linked in: Process ifconfig (pid: 278, threadinfo=94fac000, task=94e79590, tls=00000000) Stack : 7f8da120 2ab05cb0 94c59000 943356f0 00000000 943d0000 94c59000 943356f0 94c59030 943d0000 943c27c0 94fade10 00000000 94fade20 94c59000 9428e5a4 00000000 94c59000 00000041 94289768 94c59000 00000041 00001002 00001043 00000000 9428d810 00000000 94fade10 7f8da4e8 9428e6b8 00000000 7f8da4a8 7f8da4e8 00008914 00000000 942f7f2c 00000000 00000008 00408000 00008913 ... Call Trace: [<94272518>] cpmac_open+0x208/0x3f8 [<9428e5a4>] dev_open+0x164/0x264 [<9428d810>] dev_change_flags+0xd0/0x1bc [<942f7f2c>] devinet_ioctl+0x2d8/0x908 [<942771f8>] sock_ioctl+0x29c/0x2fc [<941a0fb4>] vfs_ioctl+0x2c/0x7c [<941a16ec>] do_vfs_ioctl+0x5dc/0x630 [<941a1790>] sys_ioctl+0x50/0x88 [<94101e10>] stack_done+0x20/0x3c Signed-off-by: peter fuerst <post@pfrst.de> Signed-off-by: Florian Fainelli <florian@openwrt.org> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1050/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: AR7: Fix phat finger of cpmac fixed_phy_addAlexander Clouter1-0/+1
Seems I trimmed one too many lines in 29ca2d81bd2a62fa86bc9a72ddadcf03d7daf795 (lmo) rsp 7084338eb8eb0cc021ba86c340157bad397f3f0b (kernel.org) which led to no functioning Ethernet on my WAG54Gv2. This patch restores the AWOL line. Signed-off-by: Alexander Clouter <alex@digriz.org.uk> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1065/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: AR7: Fix phat finger of reset bit in vlynq_high_dataAlexander Clouter1-1/+1
Seems in my whitespace cleanup 0f2536082d01448daeced8d9e82c3ba1751fefa3 (lmo) rsp. 8c2961da46abd85a71d20f2b169bf80618e (kernel.org) caused AR7 to no longer get as far as init. Fixed my phat fingering. Signed-off-by: Alexander Clouter <alex@digriz.org.uk> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1064/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: Loongson: Add module info to the loongson2_clock driverWu Zhangjin1-0/+4
This patch fixes a kernel warning when loading the the loongson2_clock driver: "Feb 25 23:42:27 localhost kernel: [ 4.965000] loongson2_clock: module license 'unspecified' taints kernel." Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Reported-by: Liu Shiwei <liushiwei@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1045/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: Lemote 2F: Ensure atomic execution of _rdmsr and _wrmsrWu Zhangjin1-0/+10
On Lemote 2F CS5536 MSRs are accessed through a index / data register pair. The access sequence must be protected by a spinlock to be atomic. Without this rebooting in fs2f_reboot() may fail. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: David Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1058/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: Initialize an atomic_t properly with ATOMIC_INIT(0).Robert P. J. Day1-1/+1
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1008/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: Fix elfcore.c build warningRalf Baechle1-0/+1
kernel/elfcore.c includes <linux/elf.h> which includes the <asm/elf.h>. In <asm/elf.h>, struct pt_regs is declared inside the parameter list of the elf_dump_regs function which causes a kernel build warning. Fixed by adding a forward declaration of struct pt_regs. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: Octeon: Remove redundant declaration of octeon_reserve32_memoryYang Shi1-3/+0
octeon_reserve32_memory is defined In Octeon's setup.c, so remove the redundant extern declaration of this variable. Signed-off-by: Yang Shi <yang.shi@windriver.com> To: f.fainelli@gmail.com Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1022/ Acked-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: Trace: Don't trace irqsoff for the idle processWu Zhangjin1-1/+6
Like x86 did in arch/x86/kernel/{process_32.c,process_64.c}, also don't trace irqsoff for idle. If there's no useful work to be done, we don't care about the irqsoff duration. If we trace the idle process, the max duration of irqsoff will be the idle time and make the irqsoff tracer useless. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Ingo Molnar <mingo@redhat.com> Patchwork: http://patchwork.linux-mips.org/patch/1044/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: delay: Fix use of current_cpu_data in preemptable code.Ralf Baechle1-2/+2
This may lead to warnings like: BUG: using smp_processor_id() in preemptible [00000000] code: reboot/1989 caller is __udelay+0x14/0x70 Call Trace: [<ffffffff8110ad28>] dump_stack+0x8/0x34 [<ffffffff812dde04>] debug_smp_processor_id+0xf4/0x110 [<ffffffff812d90bc>] __udelay+0x14/0x70 [<ffffffff81378274>] md_notify_reboot+0x12c/0x148 [<ffffffff81161054>] notifier_call_chain+0x64/0xc8 [<ffffffff811614dc>] __blocking_notifier_call_chain+0x64/0xc0 [<ffffffff8115566c>] kernel_restart_prepare+0x1c/0x38 [<ffffffff811556cc>] kernel_restart+0x14/0x50 [<ffffffff8115581c>] SyS_reboot+0x10c/0x1f0 [<ffffffff81103684>] handle_sysn32+0x44/0x84 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: Octeon: Remove #if 0 code.David Daney1-12/+0
Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1029/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: Octeon: Remove vestiges of CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLBDavid Daney1-66/+1
The config option CAVIUM_RESERVE32_USE_WIRED_TLB is not supported. Remove the dead code controlled by it. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1028/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: Cavium: Remove unused watchdog code.Ralf Baechle1-8/+0
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12MIPS: Fix build breakage if CONFIG_DEBUG_FS is enabled.Ralf Baechle1-1/+5
Caused by 38b7827fcdd660f591d645bd3ae6644456a4773c - no, cpu_local_* was not unused. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Cc: Christoph Lameter <cl@linux-foundation.org> Acked-by: David Daney <ddaney@caviumnetworks.com>
2010-04-09ARM: Fix ioremap_cached()/ioremap_wc() for SMP platformsRussell King1-0/+4
Write combining/cached device mappings are not setting the shared bit, which could potentially cause problems on SMP systems since the cache lines won't participate in the cache coherency protocol. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-04-09[S390] Update default configuration.Martin Schwidefsky1-10/+30
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2010-04-09[S390] nss: add missing .previous statement to asm functionHeiko Carstens1-1/+2
The savesys_ipl_nss asm function is put into the .init.text section however it is missing a ".previous" section which would restore the previous section. Luckily all functions in early.c are init functions so it doesn't matter currently. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2010-04-09[S390] increase default size of vmalloc areaMartin Schwidefsky1-3/+3
The default size of the vmalloc area is currently 1 GB. The memory resource controller uses about 10 MB of vmalloc space per gigabyte of memory. That turns a system with more than ~100 GB memory unbootable with the default vmalloc size. It costs us nothing to increase the default size to some more adequate value, e.g. 128 GB. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2010-04-09[S390] s390: disable change bit overrideChristian Borntraeger1-8/+3
commit 6a985c6194017de2c062916ad1cd00dee0302c40 ([S390] s390: use change recording override for kernel mapping) deactivated the change bit recording for the kernel mapping to improve the performance. This works most of the time, but there are cases (e.g. kernel runs in home space, futex atomic compare xcmg) where we modify user memory with the kernel mapping instead of the user mapping. Instead of fixing these cases, this patch just deactivates change bit override to avoid future problems with other kernel code that might use the kernel mapping for user memory. CC: stable@kernel.org Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
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