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2020-07-13ARM: dts: omap5-uevm: Add watchdog timers for IPU and DSPSuman Anna1-0/+2
The watchdog timers have been added for the IPU and DSP remoteproc devices for the OMAP5 uEVM board. The following timers (same as the timers on OMAP4 Panda boards) are used as the watchdog timers, DSP : GPT6 IPU : GPT9 & GPT11 (one for each Cortex-M4 core) The MPU-side drivers will use this data to initialize the watchdog timers, and listen for any watchdog triggers. The BIOS-side code needs to configure and refresh these timers properly to not throw a watchdog error. These timers can be changed or removed as per the system integration needs, alongside appropriate equivalent changes on the firmware side. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13ARM: dts: omap4-panda-common: Add watchdog timers for IPU and DSPSuman Anna1-0/+2
The watchdog timers have been added for the IPU and DSP remoteproc devices on all the OMAP4-based Panda boards. The following timers are used as the watchdog timers, DSP : GPT6 IPU : GPT9 & GPT11 (one for each Cortex-M3 core) The MPU-side drivers will use this data to initialize the watchdog timers, and listen for any watchdog triggers. The BIOS-side code needs to configure and refresh these timers properly to not throw a watchdog error. These timers can be changed or removed as per the system integration needs, alongside appropriate equivalent changes on the firmware side. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13ARM: dts: omap5-uevm: Add system timers to DSP and IPUSuman Anna1-0/+2
The BIOS System Tick timers have been added for the IPU and DSP remoteproc devices for the OMAP5 uEVM boards. The following timers (same as the timers on OMAP4 Panda boards) are chosen: IPU : GPT3 (SMP-mode) DSP : GPT5 IPU has two Cortex-M4 processors, and is currently expected to be running in SMP-mode, so only a single timer suffices to provide the BIOS tick timer. An additional timer should be added for the second processor in IPU if it were to be run in non-SMP mode. The timer value also needs to be unique from the ones used by other processors so that they can be run simultaneously. The timers are optional, but are mandatory to support device management features such as power management and watchdog support. The above are added to successfully boot and execute firmware images configured with the respective timers, images that use internal processor subsystem timers are not affected. The timers can be changed or removed as per the system integration needs, alongside equivalent changes on the firmware side. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13ARM: dts: omap5-uevm: Add CMA pools and enable IPU & DSPSuman Anna1-0/+30
The CMA reserved memory nodes have been added for the IPU and DSP remoteproc devices on the OMAP5 uEVM board. These nodes are assigned to the respective rproc device nodes, and both the IPU and DSP remote processors are enabled for this board. The current CMA pools and sizes are defined statically for each device. The starting addresses are fixed to meet current dependencies on the remote processor firmwares, and will go away when the remote-side code has been improved to gather this information runtime during its initialization. An associated pair of the rproc node and its CMA node can be disabled later on if there is no use-case defined to use that remote processor. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13ARM: dts: omap5: Add aliases for rproc nodesSuman Anna1-0/+2
Add aliases for the DSP and IPU remoteproc processor nodes common to all OMAP5 boards. The aliases uses the stem "rproc", and are identical to the values chosen on OMAP4 boards. The aliases can be overridden, if needed, in the respective board files. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13ARM: dts: omap5: Add DSP and IPU nodesSuman Anna1-0/+23
OMAP5, like OMAP4, also has two remote processor subsystems, DSP and IPU. The IPU subsystem though has dual Cortex-M4 processors instead of the dual Cortex-M3 processors in OMAP4, but otherwise has almost the same set of features. Add the DT nodes for these two processor sub-systems for all OMAP5 SoCs. The nodes have the 'iommus', 'clocks', 'resets', 'firmware' and 'mboxes' properties added, and are disabled for now. The IPU node has its L2 RAM memory specified through the 'reg' and 'reg-names' properties. The DSP node doesn't have these since it doesn't have any L2 RAM memories, but has an additional 'ti,bootreg' property instead as it has a specific boot register that needs to be programmed for booting. These nodes should be enabled as per the individual product configuration in the corresponding board dts files. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13ARM: dts: omap4-panda-common:: Add system timers to DSP and IPUSuman Anna1-0/+2
The BIOS System Tick timers have been added for the IPU and DSP remoteproc devices on all the OMAP4-based Panda boards. The following DMTimers are chosen: IPU : GPT3 (SMP-mode) DSP : GPT5 IPU has two Cortex-M3 processors, and is currently expected to be running in SMP-mode, so only a single timer suffices to provide the BIOS tick timer. An additional timer should be added for the second processor in IPU if it were to be run in non-SMP mode. The timer value also needs to be unique from the ones used by other processors so that they can be run simultaneously. The timers are optional, but are mandatory to support device management features such as power management and watchdog support. The above are added to successfully boot and execute firmware images configured with the respective timers, images that use internal processor subsystem timers are not affected. The timers can be changed or removed as per the system integration needs, alongside equivalent changes on the firmware side. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13ARM: dts: omap4-panda-common: Add CMA pools and enable IPU & DSPSuman Anna1-0/+30
The CMA reserved memory nodes have been added for the IPU and DSP remoteproc devices on all the OMAP4-based Panda boards. These nodes are assigned to the respective rproc device nodes, and both the IPU and DSP remote processors are enabled for all these boards. The current CMA pools and sizes are defined statically for each device. The starting addresses are fixed to meet current dependencies on the remote processor firmwares, and will go away when the remote-side code has been improved to gather this information runtime during its initialization. An associated pair of the rproc node and its CMA node can be disabled later on if there is no use-case defined to use that remote processor. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13ARM: dts: omap4: Add aliases for rproc nodesSuman Anna1-0/+2
Add aliases for the DSP and IPU remoteproc processor nodes common to all OMAP4 boards. The aliases uses the stem "rproc". The aliases can be overridden, if needed, in the respective board files. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13ARM: dts: omap4: Add IPU DT nodeSuman Anna1-0/+12
The DT node for the Dual-Cortex M3 IPU processor sub-system has been added for OMAP4 SoCs. The L2RAM memory region information has been added to the node through the 'reg' and 'reg-names' properties. The node has the 'iommus', 'clocks', 'resets', 'mboxes' and 'firmware' properties also added, and is disabled for now. It should be enabled as per the individual product configuration in the corresponding board dts files. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13ARM: dts: omap4: Update the DSP nodeSuman Anna1-4/+11
The compatible property for the DSP node is updated to match the OMAP remoteproc bindings. The node is moved from the soc node to the ocp node to better reflect the connectivity from MPU side. The node is updated with the 'ti,bootreg', 'clocks', 'resets', 'iommus', 'mboxes' and 'firmware' properties. Note that the node does not have any 'reg' or 'reg-names' properties since it doesn't have any L2 RAM memory, but only Unicaches. The node is disabled for now, and should be enabled as per the individual product configuration in the corresponding board dts files. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13ARM: dts: omap5: Add timer_sys_ck clocks for timersSuman Anna2-22/+33
The commit d41e53040926 ("clk: ti: omap5: cleanup unnecessary clock aliases") has cleaned up all timer_sys_ck clock aliases and retained only the timer_32k_ck clock alias. The OMAP clocksource timer driver though still uses this clock alias when reconfiguring the parent clock source for the timer functional clocks, so add these clocks to all the timer nodes except for the always-on timers 1 and 12. This is required by the OMAP remoteproc driver to successfully acquire a timer and configure the source clock to be driven from timer_sys_ck clock. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13ARM: dts: omap4: Add timer_sys_ck clocks for timersSuman Anna2-22/+33
The commit 1c7de9f27a65 ("clk: ti: omap4: cleanup unnecessary clock aliases") has cleaned up all timer_sys_ck clock aliases and retained only the timer_32k_ck clock alias. The OMAP clocksource timer driver though still uses this clock alias when reconfiguring the parent clock source for the timer functional clocks, so add these clocks to all the timer nodes. This is required by the OMAP remoteproc driver to successfully acquire a timer and configure the source clock to be driven from timer_sys_ck clock. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13ARM: dts: am335x-pocketbeagle: set default mux for gpio pinsDrew Fustini1-0/+125
These pins on the PocketBeagle P1 and P2 headers are connected to AM3358 balls with gpio lines, and these pins are not used for any other peripherals by default. These GPIO lines are unclaimed and could be used by userspace program through the gpiod ABI. This patch adds a "default" state in the am33xx_pinmux node and sets the mux for those pins to gpio (mode 7) and input enable. The "pinctrl-single,bias-pullup" and "pinctrl-single,bias-pulldown" pinconf properties are also set for each pin per the ball reset state in section 4.2 of the datasheet [0]. This is the AM335x pin control register format in Table 9-60 [1]: bit attribute value ---------------------------------- 31-7 reserved 0 on reset 6 slew { 0: fast, 1: slow } 5 rx_active { 0: rx disable, 1: rx enabled } 4 pu_typesel { 0: pulldown select, 1: pullup select } 3 puden { 0: pud enable, 1: disabled } 2 mode 3 bits to selec mode 0 to 7 1 mode 0 mode The values for the bias pinconf properties are derived as follows: pinctrl-single,bias-pullup = <[input] [enabled] [disable] [mask]>; pinctrl-single,bias-pullup = < 0x10 0x10 0x10 0x18 >; 2^5 2^4 2^3 2^2 2^1 2^0 | 0x20 0x10 0x08 0x04 0x02 0x01 | --------------------------------------------------| input x 1 0 x x x | 0x10 enabled x 1 0 x x x | 0x10 disabled x 0 0 x x x | 0x00 mask x 1 1 x x x | 0x18 pinctrl-single,bias-pulldown = <[input] [enabled] [disable] [mask]>; pinctrl-single,bias-pulldown = < 0x0 0x0 0x10 0x18 >; 2^5 2^4 2^3 2^2 2^1 2^0 | 0x20 0x10 0x08 0x04 0x02 0x01 | --------------------------------------------------| input x 0 0 x x x | 0x00 enabled x 0 0 x x x | 0x00 disabled x 1 0 x x x | 0x10 mask x 1 1 x x x | 0x18 [0] http://www.ti.com/lit/ds/symlink/am3358.pdf [1] https://www.ti.com/lit/ug/spruh73q/spruh73q.pdf Signed-off-by: Drew Fustini <drew@beagleboard.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-29ARM: dts: am335x-pocketbeagle: add gpio-line-namesDrew Fustini1-0/+144
The BeagleBoard.org PocketBeagle has P1 and P2 headers [0] which expose many of the TI AM3358 SoC balls to stacking expansion boards called "capes", or to other external connections like jumper wires connected to a breadboard. Note: the AM3358 die is actually embedded inside of the OSD335x-SM System-in-Package (SiP) [1] but that is irrelevant to the gpio driver. Many of the P1 and P2 header pins can muxed to a GPIO line. The gpio-line-names describe which P1 or P2 pin that line goes to and the default mux for that P1 or P2 pin if it is not GPIO. Some GPIO lines are named "[NC]" as the corresponding balls are not routed to anything on the PCB. The goal for these names is to make it easier for a user viewing the output of gpioinfo to determine which P1 or P2 pin is connected to a GPIO line. The output of gpioinfo on a PocketBeagle would be: gpiochip0 - 32 lines: line 0: "[NC]" unused input active-high line 1: "[NC]" unused input active-high line 2: "P1.08 [SPI0_CLK]" unused input active-high line 3: "P1.10 [SPI0_MISO]" unused input active-high line 4: "P1.12 [SPI0_MOSI]" unused input active-high line 5: "P1.06 [SPI0_CS]" unused input active-high line 6: "[MMC0_CD]" "cd" input active-low [used] line 7: "P2.29 [SPI1_CLK]" unused input active-high line 8: "[SYSBOOT]" unused input active-high line 9: "[SYSBOOT]" unused input active-high line 10: "[SYSBOOT]" unused input active-high line 11: "[SYSBOOT]" unused input active-high line 12: "P1.26 [I2C2_SDA]" unused input active-high line 13: "P1.28 [I2C2_SCL]" unused input active-high line 14: "P2.11 [I2C1_SDA]" unused input active-high line 15: "P2.09 [I2C1_SCL]" unused input active-high line 16: "[NC]" unused input active-high line 17: "[NC]" unused input active-high line 18: "[NC]" unused input active-high line 19: "P2.31 [SPI1_CS]" unused input active-high line 20: "P1.20 [PRU0.16]" unused input active-high line 21: "[NC]" unused input active-high line 22: "[NC]" unused input active-high line 23: "P2.03" unused input active-high line 24: "[NC]" unused input active-high line 25: "[NC]" unused input active-high line 26: "P1.34" unused input active-high line 27: "P2.19" unused input active-high line 28: "[NC]" unused input active-high line 29: "[NC]" unused input active-high line 30: "P2.05 [UART4_RX]" unused input active-high line 31: "P2.07 [UART4_TX]" unused input active-high gpiochip1 - 32 lines: line 0: "[NC]" unused input active-high line 1: "[NC]" unused input active-high line 2: "[NC]" unused input active-high line 3: "[NC]" unused input active-high line 4: "[NC]" unused input active-high line 5: "[NC]" unused input active-high line 6: "[NC]" unused input active-high line 7: "[NC]" unused input active-high line 8: "[NC]" unused input active-high line 9: "P2.25 [SPI1_MOSI]" unused input active-high line 10: "P1.32 [UART0_RX]" unused input active-high line 11: "P1.30 [UART0_TX]" unused input active-high line 12: "P2.24" unused input active-high line 13: "P2.33" unused input active-high line 14: "P2.22" unused input active-high line 15: "P2.18" unused input active-high line 16: "[NC]" unused input active-high line 17: "[NC]" unused input active-high line 18: "P2.01 [PWM1A]" unused input active-high line 19: "[NC]" unused input active-high line 20: "P2.10" unused input active-high line 21: "[USR LED 0]" "beaglebone:green:usr0" output active-high [used] line 22: "[USR LED 1]" "beaglebone:green:usr1" output active-high [used] line 23: "[USR LED 2]" "beaglebone:green:usr2" output active-high [used] line 24: "[USR LED 3]" "beaglebone:green:usr3" output active-high [used] line 25: "P2.06" unused input active-high line 26: "P2.04" unused input active-high line 27: "P2.02" unused input active-high line 28: "P2.08" unused input active-high line 29: "[NC]" unused input active-high line 30: "[NC]" unused input active-high line 31: "[NC]" unused input active-high gpiochip2 - 32 lines: line 0: "P2.20" unused input active-high line 1: "P2.17" unused input active-high line 2: "[NC]" unused input active-high line 3: "[NC]" unused input active-high line 4: "[NC]" unused input active-high line 5: "[EEPROM_WP]" unused input active-high line 6: "[SYSBOOT]" unused input active-high line 7: "[SYSBOOT]" unused input active-high line 8: "[SYSBOOT]" unused input active-high line 9: "[SYSBOOT]" unused input active-high line 10: "[SYSBOOT]" unused input active-high line 11: "[SYSBOOT]" unused input active-high line 12: "[SYSBOOT]" unused input active-high line 13: "[SYSBOOT]" unused input active-high line 14: "[SYSBOOT]" unused input active-high line 15: "[SYSBOOT]" unused input active-high line 16: "[SYSBOOT]" unused input active-high line 17: "[SYSBOOT]" unused input active-high line 18: "[NC]" unused input active-high line 19: "[NC]" unused input active-high line 20: "[NC]" unused input active-high line 21: "[NC]" unused input active-high line 22: "P2.35 [AIN5]" unused input active-high line 23: "P1.02 [AIN6]" unused input active-high line 24: "P1.35 [PRU1.10]" unused input active-high line 25: "P1.04 [PRU1.11]" unused input active-high line 26: "[MMC0_DAT3]" unused input active-high line 27: "[MMC0_DAT2]" unused input active-high line 28: "[MMC0_DAT1]" unused input active-high line 29: "[MMC0_DAT0]" unused input active-high line 30: "[MMC0_CLK]" unused input active-high line 31: "[MMC0_CMD]" unused input active-high gpiochip3 - 32 lines: line 0: "[NC]" unused input active-high line 1: "[NC]" unused input active-high line 2: "[NC]" unused input active-high line 3: "[NC]" unused input active-high line 4: "[NC]" unused input active-high line 5: "[I2C0_SDA]" unused input active-high line 6: "[I2C0_SCL]" unused input active-high line 7: "[JTAG]" unused input active-high line 8: "[JTAG]" unused input active-high line 9: "[NC]" unused input active-high line 10: "[NC]" unused input active-high line 11: "[NC]" unused input active-high line 12: "[NC]" unused input active-high line 13: "P1.03 [USB1]" unused input active-high line 14: "P1.36 [PWM0A]" unused input active-high line 15: "P1.33 [PRU0.1]" unused input active-high line 16: "P2.32 [PRU0.2]" unused input active-high line 17: "P2.30 [PRU0.3]" unused input active-high line 18: "P1.31 [PRU0.4]" unused input active-high line 19: "P2.34 [PRU0.5]" unused input active-high line 20: "P2.28 [PRU0.6]" unused input active-high line 21: "P1.29 [PRU0.7]" unused input active-high line 22: "[NC]" unused input active-high line 23: "[NC]" unused input active-high line 24: "[NC]" unused input active-high line 25: "[NC]" unused input active-high line 26: "[NC]" unused input active-high line 27: "[NC]" unused input active-high line 28: "[NC]" unused input active-high line 29: "[NC]" unused input active-high line 30: "[NC]" unused input active-high line 31: "[NC]" unused input active-high [0] https://github.com/beagleboard/pocketbeagle/wiki/System-Reference-Manual#71_Expansion_Header_Connectors [1] https://octavosystems.com/app_notes/osd335x-family-pin-assignments/ Reviewed-by: Jason Kridner <jason@beagleboard.org> Reviewed-by: Robert Nelson <robertcnelson@gmail.com> Signed-off-by: Drew Fustini <drew@beagleboard.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-29ARM: dts: am335x-boneblack: add gpio-line-namesDrew Fustini1-0/+144
The BeagleBone Black has P8 and P9 headers [0] which expose many of the AM3358 ZCZ SoC balls to stacking expansion boards called "capes", or to other external connections like jumper wires connected to a breadboard. BeagleBone users will often refer to the "Cape Exanpsion Headers" pin diagram [1] as it is in the "Bone101" getting started tutorial. [2] Most of the P8 and P9 header pins can muxed to a GPIO line. The gpio-line-names describe which P8 or P9 pin that line goes to and the default mux for that P8 or P9 pin if it is not GPIO. For example, gpiochip 1 line 0 is connected to P8 header pin 25 (P8_25) however the default device tree has the corresponding BGA ball (ZCZ U7) muxed to mmc1_dat0 as it is used for the on-board eMMC chip. For that GPIO line to be used, one would need to modify the device tree to disable the eMMC and change the pin mux for that ball to GPIO mode. Some of the AM3358 ZCZ balls corresponding to GPIO lines are not routed to a P8 or P9 header, but are instead wired to some peripheral device like on-board eMMC, HDMI framer IC, or status LEDs. Those names are in brackets to denote those GPIO lines can not be used. Some GPIO lines are named "[NC]" as the corresponding balls are not routed to anything on the PCB. The goal for these names is to make it easier for a user viewing the output of gpioinfo to determine which P8 or P9 pin is connected to a GPIO line. The output of gpioinfo on a BeagleBone Black would be: gpiochip0 - 32 lines: line 0: "[ethernet]" unused input active-high line 1: "[ethernet]" unused input active-high line 2: "P9_22 [spi0_sclk]" unused input active-high line 3: "P9_21 [spi0_d0]" unused input active-high line 4: "P9_18 [spi0_d1]" unused input active-high line 5: "P9_17 [spi0_cs0]" unused input active-high line 6: "[sd card]" "cd" input active-low [used] line 7: "P9_42A [ecappwm0]" unused input active-high line 8: "P8_35 [hdmi]" unused input active-high line 9: "P8_33 [hdmi]" unused input active-high line 10: "P8_31 [hdmi]" unused input active-high line 11: "P8_32 [hdmi]" unused input active-high line 12: "P9_20 [i2c2_sda]" unused input active-high line 13: "P9_19 [i2c2_scl]" unused input active-high line 14: "P9_26 [uart1_rxd]" unused input active-high line 15: "P9_24 [uart1_txd]" unused input active-high line 16: "[ethernet]" unused input active-high line 17: "[ethernet]" unused input active-high line 18: "[usb]" unused input active-high line 19: "[hdmi]" unused input active-high line 20: "P9_41B" unused input active-high line 21: "[ethernet]" unused input active-high line 22: "P8_19 [ehrpwm2a]" unused input active-high line 23: "P8_13 [ehrpwm2b]" unused input active-high line 24: "[NC]" unused input active-high line 25: "[NC]" unused input active-high line 26: "P8_14" unused input active-high line 27: "P8_17" unused input active-high line 28: "[ethernet]" unused input active-high line 29: "[ethernet]" unused input active-high line 30: "P9_11 [uart4_rxd]" unused input active-high line 31: "P9_13 [uart4_txd]" unused input active-high gpiochip1 - 32 lines: line 0: "P8_25 [emmc]" unused input active-high line 1: "[emmc]" unused input active-high line 2: "P8_5 [emmc]" unused input active-high line 3: "P8_6 [emmc]" unused input active-high line 4: "P8_23 [emmc]" unused input active-high line 5: "P8_22 [emmc]" unused input active-high line 6: "P8_3 [emmc]" unused input active-high line 7: "P8_4 [emmc]" unused input active-high line 8: "[NC]" unused input active-high line 9: "[NC]" unused input active-high line 10: "[NC]" unused input active-high line 11: "[NC]" unused input active-high line 12: "P8_12" unused input active-high line 13: "P8_11" unused input active-high line 14: "P8_16" unused input active-high line 15: "P8_15" unused input active-high line 16: "P9_15A" unused input active-high line 17: "P9_23" unused input active-high line 18: "P9_14 [ehrpwm1a]" unused input active-high line 19: "P9_16 [ehrpwm1b]" unused input active-high line 20: "[emmc]" unused input active-high line 21: "[usr0 led]" "beaglebone:green:heartbeat" output active-high [used] line 22: "[usr1 led]" "beaglebone:green:mmc0" output active-high [used] line 23: "[usr2 led]" "beaglebone:green:usr2" output active-high [used] line 24: "[usr3 led]" "beaglebone:green:usr3" output active-high [used] line 25: "[hdmi]" "interrupt" input active-high [used] line 26: "[usb]" unused input active-high line 27: "[hdmi audio]" "enable" output active-high [used] line 28: "P9_12" unused input active-high line 29: "P8_26" unused input active-high line 30: "P8_21 [emmc]" unused input active-high line 31: "P8_20 [emmc]" unused input active-high gpiochip2 - 32 lines: line 0: "P9_15B" unused input active-high line 1: "P8_18" unused input active-high line 2: "P8_7" unused input active-high line 3: "P8_8" unused input active-high line 4: "P8_10" unused input active-high line 5: "P8_9" unused input active-high line 6: "P8_45 [hdmi]" unused input active-high line 7: "P8_46 [hdmi]" unused input active-high line 8: "P8_43 [hdmi]" unused input active-high line 9: "P8_44 [hdmi]" unused input active-high line 10: "P8_41 [hdmi]" unused input active-high line 11: "P8_42 [hdmi]" unused input active-high line 12: "P8_39 [hdmi]" unused input active-high line 13: "P8_40 [hdmi]" unused input active-high line 14: "P8_37 [hdmi]" unused input active-high line 15: "P8_38 [hdmi]" unused input active-high line 16: "P8_36 [hdmi]" unused input active-high line 17: "P8_34 [hdmi]" unused input active-high line 18: "[ethernet]" unused input active-high line 19: "[ethernet]" unused input active-high line 20: "[ethernet]" unused input active-high line 21: "[ethernet]" unused input active-high line 22: "P8_27 [hdmi]" unused input active-high line 23: "P8_29 [hdmi]" unused input active-high line 24: "P8_28 [hdmi]" unused input active-high line 25: "P8_30 [hdmi]" unused input active-high line 26: "[emmc]" unused input active-high line 27: "[emmc]" unused input active-high line 28: "[emmc]" unused input active-high line 29: "[emmc]" unused input active-high line 30: "[emmc]" unused input active-high line 31: "[emmc]" unused input active-high gpiochip3 - 32 lines: line 0: "[ethernet]" unused input active-high line 1: "[ethernet]" unused input active-high line 2: "[ethernet]" unused input active-high line 3: "[ethernet]" unused input active-high line 4: "[ethernet]" unused input active-high line 5: "[i2c0]" unused input active-high line 6: "[i2c0]" unused input active-high line 7: "[emu]" unused input active-high line 8: "[emu]" unused input active-high line 9: "[ethernet]" unused input active-high line 10: "[ethernet]" unused input active-high line 11: "[NC]" unused input active-high line 12: "[NC]" unused input active-high line 13: "[usb]" unused input active-high line 14: "P9_31 [spi1_sclk]" unused input active-high line 15: "P9_29 [spi1_d0]" unused input active-high line 16: "P9_30 [spi1_d1]" unused input active-high line 17: "P9_28 [spi1_cs0]" unused input active-high line 18: "P9_42B [ecappwm0]" unused input active-high line 19: "P9_27" unused input active-high line 20: "P9_41A" unused input active-high line 21: "P9_25" unused input active-high line 22: "[NC]" unused input active-high line 23: "[NC]" unused input active-high line 24: "[NC]" unused input active-high line 25: "[NC]" unused input active-high line 26: "[NC]" unused input active-high line 27: "[NC]" unused input active-high line 28: "[NC]" unused input active-high line 29: "[NC]" unused input active-high line 30: "[NC]" unused input active-high line 31: "[NC]" unused input active-high [0] https://git.io/JfgOd [1] https://beagleboard.org/capes [1] https://beagleboard.org/Support/bone101 [2] https://beagleboard.org/static/images/cape-headers.png Reviewed-by: Jason Kridner <jason@beagleboard.org> Reviewed-by: Robert Nelson <robertcnelson@gmail.com> Signed-off-by: Drew Fustini <drew@beagleboard.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-29ARM: dts: am33xx-l4: add gpio-rangesDrew Fustini1-0/+24
Add gpio-ranges properties to the gpio controller nodes. These gpio-ranges were created based on "Table 9-10. CONTROL_MODULE REGISTERS" in the "AM335x Technical Reference Manual" [0] and "Table 4-2. Pin Attributes" in the "AM335x Sitara Processor datasheet" [1]. A csv file with this data is available for reference [2]. These mappings are valid for all SoC's that are using am33xx-l4.dtsi. In addition, the only TI AM33xx parts that actually exist are [0]: AM3351, AM3352, AM3354, AM3356, AM3357, AM3358, AM3359 These gpio-ranges properties should be added as they describe the relationship between a gpio line and pin control register that exists in the hardware. For example, GPMC_A0 pin has mode 7 which is labeled gpio1_16. conf_gpmc_a0 register is at offset 840h which makes it pin 16. [0] https://www.ti.com/lit/ug/spruh73q/spruh73q.pdf [1] http://www.ti.com/lit/ds/symlink/am3358.pdf [2] https://gist.github.com/pdp7/6ffaddc8867973c1c3e8612cfaf72020 [3] http://www.ti.com/processors/sitara-arm/am335x-cortex-a8/overview.html Signed-off-by: Drew Fustini <drew@beagleboard.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-29ARM: dts: am5729-beaglebone-ai: Disable ununsed mailboxesSuman Anna1-52/+0
The IPU and DSP remote processors use sub-mailbox nodes only from a limited set of System Mailboxes 5 and 6 to achieve the Remote Processor Messaging (RPMsg) communication stack between the MPU host processor and the respective remote processor. These are all defined and enabled through the inherited common dra74-ipu-dsp-common.dtsi file. The other System Mailboxes do not define any actual sub-mailboxes, so they serve no purpose and can all be safely dropped. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-29ARM: dts: am5729-beaglebone-ai: Enable IPU & DSP rprocsSuman Anna1-0/+21
Assign the previously added CMA reserved memory nodes to the respective IPU and DSP rproc device nodes, and enable these rproc nodes so that these remote processors can be booted on the AM5729 BeagleBone AI board. The addresses and sizes of the CMA pools are identical to those used on various other TI AM572x/AM574x based boards. The mailboxes, timers and watchdog-timers for all these remoteprocs are inherited by including the common dra72-ipu-dsp-common.dtsi file. An associated pair of the rproc node and its CMA node can be disabled later on if there is no use-case defined to use that remote processor. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-29ARM: dts: am: Align L2 cache-controller nodename with dtschemaKrzysztof Kozlowski1-1/+1
Fix dtschema validator warnings like: l2-cache-controller@48242000: $nodename:0: 'l2-cache-controller@48242000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-29ARM: dts: omap: Align L2 cache-controller nodename with dtschemaKrzysztof Kozlowski1-1/+1
Fix dtschema validator warnings like: l2-cache-controller@48242000: $nodename:0: 'l2-cache-controller@48242000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-13Merge tag 'kbuild-v5.8-2' of ↵Linus Torvalds39-303/+303
git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild Pull more Kbuild updates from Masahiro Yamada: - fix build rules in binderfs sample - fix build errors when Kbuild recurses to the top Makefile - covert '---help---' in Kconfig to 'help' * tag 'kbuild-v5.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild: treewide: replace '---help---' in Kconfig files with 'help' kbuild: fix broken builds because of GZIP,BZIP2,LZOP variables samples: binderfs: really compile this sample and fix build issues
2020-06-13Merge tag 'powerpc-5.8-2' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux Pull powerpc fix from Michael Ellerman: "One fix for a recent change which broke nested KVM guests on Power9. Thanks to Alexey Kardashevskiy" * tag 'powerpc-5.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: KVM: PPC: Fix nested guest RC bits update
2020-06-13Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-armLinus Torvalds2-2/+64
Pull ARM fixes from Russell King: - fix for "hex" Kconfig default to use 0x0 rather than 0 to allow these to be removed from defconfigs - fix from Ard Biesheuvel for EFI HYP mode booting * tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: ARM: 8985/1: efi/decompressor: deal with HYP mode boot gracefully ARM: 8984/1: Kconfig: set default ZBOOT_ROM_TEXT/BSS value to 0x0
2020-06-13Merge tag 'for-linus' of git://github.com/openrisc/linuxLinus Torvalds1-2/+2
Pull OpenRISC update from Stafford Horne: "One patch found wile I was getting the glibc port ready: fix issue with clone TLS arg getting overwritten" * tag 'for-linus' of git://github.com/openrisc/linux: openrisc: Fix issue with argument clobbering for clone/fork
2020-06-13Merge branch 'for-linus' of ↵Linus Torvalds8-30/+121
git://git.kernel.org/pub/scm/linux/kernel/git/mattst88/alpha Pull alpha updates from Matt Turner: "A few changes for alpha. They're mostly small janitorial fixes but there's also a build fix and most notably a patch from Mikulas that fixes a hang on boot on the Avanti platform, which required quite a bit of work and review" * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mattst88/alpha: alpha: Fix build around srm_sysrq_reboot_op alpha: c_next should increase position index alpha: Replace sg++ with sg = sg_next(sg) alpha: fix memory barriers so that they conform to the specification alpha: remove unneeded semicolon in sys_eiger.c alpha: remove unneeded semicolon in osf_sys.c alpha: Replace strncmp with str_has_prefix alpha: fix rtc port ranges alpha: Kconfig: pedantic formatting
2020-06-13Merge tag 'ras-core-2020-06-12' of ↵Linus Torvalds10-180/+233
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 RAS updates from Thomas Gleixner: "RAS updates from Borislav Petkov: - Unmap a whole guest page if an MCE is encountered in it to avoid follow-on MCEs leading to the guest crashing, by Tony Luck. This change collided with the entry changes and the merge resolution would have been rather unpleasant. To avoid that the entry branch was merged in before applying this. The resulting code did not change over the rebase. - AMD MCE error thresholding machinery cleanup and hotplug sanitization, by Thomas Gleixner. - Change the MCE notifiers to denote whether they have handled the error and not break the chain early by returning NOTIFY_STOP, thus giving the opportunity for the later handlers in the chain to see it. By Tony Luck. - Add AMD family 0x17, models 0x60-6f support, by Alexander Monakov. - Last but not least, the usual round of fixes and improvements" * tag 'ras-core-2020-06-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (23 commits) x86/mce/dev-mcelog: Fix -Wstringop-truncation warning about strncpy() x86/{mce,mm}: Unmap the entire page if the whole page is affected and poisoned EDAC/amd64: Add AMD family 17h model 60h PCI IDs hwmon: (k10temp) Add AMD family 17h model 60h PCI match x86/amd_nb: Add AMD family 17h model 60h PCI IDs x86/mcelog: Add compat_ioctl for 32-bit mcelog support x86/mce: Drop bogus comment about mce.kflags x86/mce: Fixup exception only for the correct MCEs EDAC: Drop the EDAC report status checks x86/mce: Add mce=print_all option x86/mce: Change default MCE logger to check mce->kflags x86/mce: Fix all mce notifiers to update the mce->kflags bitmask x86/mce: Add a struct mce.kflags field x86/mce: Convert the CEC to use the MCE notifier x86/mce: Rename "first" function as "early" x86/mce/amd, edac: Remove report_gart_errors x86/mce/amd: Make threshold bank setting hotplug robust x86/mce/amd: Cleanup threshold device remove path x86/mce/amd: Straighten CPU hotplug path x86/mce/amd: Sanitize thresholding device creation hotplug path ...
2020-06-13Merge tag 'x86-entry-2020-06-12' of ↵Linus Torvalds88-2269/+2554
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 entry updates from Thomas Gleixner: "The x86 entry, exception and interrupt code rework This all started about 6 month ago with the attempt to move the Posix CPU timer heavy lifting out of the timer interrupt code and just have lockless quick checks in that code path. Trivial 5 patches. This unearthed an inconsistency in the KVM handling of task work and the review requested to move all of this into generic code so other architectures can share. Valid request and solved with another 25 patches but those unearthed inconsistencies vs. RCU and instrumentation. Digging into this made it obvious that there are quite some inconsistencies vs. instrumentation in general. The int3 text poke handling in particular was completely unprotected and with the batched update of trace events even more likely to expose to endless int3 recursion. In parallel the RCU implications of instrumenting fragile entry code came up in several discussions. The conclusion of the x86 maintainer team was to go all the way and make the protection against any form of instrumentation of fragile and dangerous code pathes enforcable and verifiable by tooling. A first batch of preparatory work hit mainline with commit d5f744f9a2ac ("Pull x86 entry code updates from Thomas Gleixner") That (almost) full solution introduced a new code section '.noinstr.text' into which all code which needs to be protected from instrumentation of all sorts goes into. Any call into instrumentable code out of this section has to be annotated. objtool has support to validate this. Kprobes now excludes this section fully which also prevents BPF from fiddling with it and all 'noinstr' annotated functions also keep ftrace off. The section, kprobes and objtool changes are already merged. The major changes coming with this are: - Preparatory cleanups - Annotating of relevant functions to move them into the noinstr.text section or enforcing inlining by marking them __always_inline so the compiler cannot misplace or instrument them. - Splitting and simplifying the idtentry macro maze so that it is now clearly separated into simple exception entries and the more interesting ones which use interrupt stacks and have the paranoid handling vs. CR3 and GS. - Move quite some of the low level ASM functionality into C code: - enter_from and exit to user space handling. The ASM code now calls into C after doing the really necessary ASM handling and the return path goes back out without bells and whistels in ASM. - exception entry/exit got the equivivalent treatment - move all IRQ tracepoints from ASM to C so they can be placed as appropriate which is especially important for the int3 recursion issue. - Consolidate the declaration and definition of entry points between 32 and 64 bit. They share a common header and macros now. - Remove the extra device interrupt entry maze and just use the regular exception entry code. - All ASM entry points except NMI are now generated from the shared header file and the corresponding macros in the 32 and 64 bit entry ASM. - The C code entry points are consolidated as well with the help of DEFINE_IDTENTRY*() macros. This allows to ensure at one central point that all corresponding entry points share the same semantics. The actual function body for most entry points is in an instrumentable and sane state. There are special macros for the more sensitive entry points, e.g. INT3 and of course the nasty paranoid #NMI, #MCE, #DB and #DF. They allow to put the whole entry instrumentation and RCU handling into safe places instead of the previous pray that it is correct approach. - The INT3 text poke handling is now completely isolated and the recursion issue banned. Aside of the entry rework this required other isolation work, e.g. the ability to force inline bsearch. - Prevent #DB on fragile entry code, entry relevant memory and disable it on NMI, #MC entry, which allowed to get rid of the nested #DB IST stack shifting hackery. - A few other cleanups and enhancements which have been made possible through this and already merged changes, e.g. consolidating and further restricting the IDT code so the IDT table becomes RO after init which removes yet another popular attack vector - About 680 lines of ASM maze are gone. There are a few open issues: - An escape out of the noinstr section in the MCE handler which needs some more thought but under the aspect that MCE is a complete trainwreck by design and the propability to survive it is low, this was not high on the priority list. - Paravirtualization When PV is enabled then objtool complains about a bunch of indirect calls out of the noinstr section. There are a few straight forward ways to fix this, but the other issues vs. general correctness were more pressing than parawitz. - KVM KVM is inconsistent as well. Patches have been posted, but they have not yet been commented on or picked up by the KVM folks. - IDLE Pretty much the same problems can be found in the low level idle code especially the parts where RCU stopped watching. This was beyond the scope of the more obvious and exposable problems and is on the todo list. The lesson learned from this brain melting exercise to morph the evolved code base into something which can be validated and understood is that once again the violation of the most important engineering principle "correctness first" has caused quite a few people to spend valuable time on problems which could have been avoided in the first place. The "features first" tinkering mindset really has to stop. With that I want to say thanks to everyone involved in contributing to this effort. Special thanks go to the following people (alphabetical order): Alexandre Chartre, Andy Lutomirski, Borislav Petkov, Brian Gerst, Frederic Weisbecker, Josh Poimboeuf, Juergen Gross, Lai Jiangshan, Macro Elver, Paolo Bonzin,i Paul McKenney, Peter Zijlstra, Vitaly Kuznetsov, and Will Deacon" * tag 'x86-entry-2020-06-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (142 commits) x86/entry: Force rcu_irq_enter() when in idle task x86/entry: Make NMI use IDTENTRY_RAW x86/entry: Treat BUG/WARN as NMI-like entries x86/entry: Unbreak __irqentry_text_start/end magic x86/entry: __always_inline CR2 for noinstr lockdep: __always_inline more for noinstr x86/entry: Re-order #DB handler to avoid *SAN instrumentation x86/entry: __always_inline arch_atomic_* for noinstr x86/entry: __always_inline irqflags for noinstr x86/entry: __always_inline debugreg for noinstr x86/idt: Consolidate idt functionality x86/idt: Cleanup trap_init() x86/idt: Use proper constants for table size x86/idt: Add comments about early #PF handling x86/idt: Mark init only functions __init x86/entry: Rename trace_hardirqs_off_prepare() x86/entry: Clarify irq_{enter,exit}_rcu() x86/entry: Remove DBn stacks x86/entry: Remove debug IDT frobbing x86/entry: Optimize local_db_save() for virt ...
2020-06-13treewide: replace '---help---' in Kconfig files with 'help'Masahiro Yamada35-297/+297
Since commit 84af7a6194e4 ("checkpatch: kconfig: prefer 'help' over '---help---'"), the number of '---help---' has been gradually decreasing, but there are still more than 2400 instances. This commit finishes the conversion. While I touched the lines, I also fixed the indentation. There are a variety of indentation styles found. a) 4 spaces + '---help---' b) 7 spaces + '---help---' c) 8 spaces + '---help---' d) 1 space + 1 tab + '---help---' e) 1 tab + '---help---' (correct indentation) f) 1 tab + 1 space + '---help---' g) 1 tab + 2 spaces + '---help---' In order to convert all of them to 1 tab + 'help', I ran the following commend: $ find . -name 'Kconfig*' | xargs sed -i 's/^[[:space:]]*---help---/\thelp/' Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
2020-06-13ARM: 8985/1: efi/decompressor: deal with HYP mode boot gracefullyArd Biesheuvel1-0/+62
EFI on ARM only supports short descriptors, and given that it mandates that the MMU and caches are on, it is implied that booting in HYP mode is not supported. However, implementations of EFI exist (i.e., U-Boot) that ignore this requirement, which is not entirely unreasonable, given that it makes HYP mode inaccessible to the operating system. So let's make sure that we can deal with this condition gracefully. We already tolerate booting the EFI stub with the caches off (even though this violates the EFI spec as well), and so we should deal with HYP mode boot with MMU and caches either on or off. - When the MMU and caches are on, we can ignore the HYP stub altogether, since we can carry on executing at HYP. We do need to ensure that we disable the MMU at HYP before entering the kernel proper. - When the MMU and caches are off, we have to drop to SVC mode so that we can set up the page tables using short descriptors. In this case, we need to install the HYP stub as usual, so that we can return to HYP mode before handing over to the kernel proper. Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-06-13ARM: 8984/1: Kconfig: set default ZBOOT_ROM_TEXT/BSS value to 0x0Chris Packham1-2/+2
ZBOOT_ROM_TEXT and ZBOOT_ROM_BSS are defined as 'hex' but had a default of "0". Kconfig will helpfully expand a text entry of 0 to 0x0 but because this is not the same as the default value it was treated as being explicitly set when running 'make savedefconfig' so most arm defconfigs have CONFIG_ZBOOT_ROM_TEXT=0x0 and CONFIG_ZBOOT_ROM_BSS=0x0. Change the default to 0x0 which will mean next time the defconfigs are re-generated the spurious config entries will be removed. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-06-13alpha: Fix build around srm_sysrq_reboot_opJoerg Roedel1-1/+6
The patch introducing the struct was probably never compile tested, because it sets a handler with a wrong function signature. Wrap the handler into a functions with the correct signature to fix the build. Fixes: 0f1c9688a194 ("tty/sysrq: alpha: export and use __sysrq_get_key_op()") Cc: Emil Velikov <emil.l.velikov@gmail.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Tested-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Joerg Roedel <jroedel@suse.de> Signed-off-by: Matt Turner <mattst88@gmail.com>
2020-06-13alpha: c_next should increase position indexMatt Turner1-0/+1
Signed-off-by: Matt Turner <mattst88@gmail.com>
2020-06-13alpha: Replace sg++ with sg = sg_next(sg)Xu Wang1-1/+1
Replace sg++ with sg = sg_next(sg). Signed-off-by: Xu Wang <vulab@iscas.ac.cn> Signed-off-by: Matt Turner <mattst88@gmail.com>
2020-06-13alpha: fix memory barriers so that they conform to the specificationMikulas Patocka2-22/+112
The commits cd0e00c10672 and 92d7223a7423 broke boot on the Alpha Avanti platform. The patches move memory barriers after a write before the write. The result is that if there's iowrite followed by ioread, there is no barrier between them. The Alpha architecture allows reordering of the accesses to the I/O space, and the missing barrier between write and read causes hang with serial port and real time clock. This patch makes barriers confiorm to the specification. 1. We add mb() before readX_relaxed and writeX_relaxed - memory-barriers.txt claims that these functions must be ordered w.r.t. each other. Alpha doesn't order them, so we need an explicit barrier. 2. We add mb() before reads from the I/O space - so that if there's a write followed by a read, there should be a barrier between them. Signed-off-by: Mikulas Patocka <mpatocka@redhat.com> Fixes: cd0e00c10672 ("alpha: io: reorder barriers to guarantee writeX() and iowriteX() ordering") Fixes: 92d7223a7423 ("alpha: io: reorder barriers to guarantee writeX() and iowriteX() ordering #2") Cc: stable@vger.kernel.org # v4.17+ Acked-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Reviewed-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Matt Turner <mattst88@gmail.com>
2020-06-13alpha: remove unneeded semicolon in sys_eiger.cJason Yan1-1/+1
Fix the following coccicheck warning: arch/alpha/kernel/sys_eiger.c:179:2-3: Unneeded semicolon Signed-off-by: Jason Yan <yanaijie@huawei.com> Signed-off-by: Matt Turner <mattst88@gmail.com>
2020-06-13alpha: remove unneeded semicolon in osf_sys.cJason Yan1-1/+1
Fix the following coccicheck warning: arch/alpha/kernel/osf_sys.c:680:2-3: Unneeded semicolon Signed-off-by: Jason Yan <yanaijie@huawei.com> Signed-off-by: Matt Turner <mattst88@gmail.com>
2020-06-13alpha: Replace strncmp with str_has_prefixChuhong Yuan2-2/+2
In commit b6b2735514bc ("tracing: Use str_has_prefix() instead of using fixed sizes") the newly introduced str_has_prefix() was used to replace error-prone strncmp(str, const, len). Here fix codes with the same pattern. Signed-off-by: Chuhong Yuan <hslester96@gmail.com> Signed-off-by: Matt Turner <mattst88@gmail.com>
2020-06-13alpha: fix rtc port rangesMikulas Patocka1-1/+1
Alpha incorrectly reports "0070-0080 : rtc" in /proc/ioports. Fix this, so that it is "0070-007f". Signed-off-by: Mikulas Patocka <mpatocka@redhat.com> Signed-off-by: Matt Turner <mattst88@gmail.com>
2020-06-13alpha: Kconfig: pedantic formattingEnrico Weigelt, metux IT consult1-2/+2
Formatting of Kconfig files doesn't look so pretty, so let the Great White Handkerchief come around and clean it up. Signed-off-by: Enrico Weigelt, metux IT consult <info@metux.net> Signed-off-by: Matt Turner <mattst88@gmail.com>
2020-06-12x86/entry: Force rcu_irq_enter() when in idle taskThomas Gleixner1-7/+28
The idea of conditionally calling into rcu_irq_enter() only when RCU is not watching turned out to be not completely thought through. Paul noticed occasional premature end of grace periods in RCU torture testing. Bisection led to the commit which made the invocation of rcu_irq_enter() conditional on !rcu_is_watching(). It turned out that this conditional breaks RCU assumptions about the idle task when the scheduler tick happens to be a nested interrupt. Nested interrupts can happen when the first interrupt invokes softirq processing on return which enables interrupts. If that nested tick interrupt does not invoke rcu_irq_enter() then the RCU's irq-nesting checks will believe that this interrupt came directly from idle, which will cause RCU to report a quiescent state. Because this interrupt instead came from a softirq handler which might have been executing an RCU read-side critical section, this can cause the grace period to end prematurely. Change the condition from !rcu_is_watching() to is_idle_task(current) which enforces that interrupts in the idle task unconditionally invoke rcu_irq_enter() independent of the RCU state. This is also correct vs. user mode entries in NOHZ full scenarios because user mode entries bring RCU out of EQS and force the RCU irq nesting state accounting to nested. As only the first interrupt can enter from user mode a nested tick interrupt will enter from kernel mode and as the nesting state accounting is forced to nesting it will not do anything stupid even if rcu_irq_enter() has not been invoked. Fixes: 3eeec3858488 ("x86/entry: Provide idtentry_entry/exit_cond_rcu()") Reported-by: "Paul E. McKenney" <paulmck@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: "Paul E. McKenney" <paulmck@kernel.org> Reviewed-by: "Paul E. McKenney" <paulmck@kernel.org> Acked-by: Andy Lutomirski <luto@kernel.org> Acked-by: Frederic Weisbecker <frederic@kernel.org> Link: https://lkml.kernel.org/r/87wo4cxubv.fsf@nanos.tec.linutronix.de
2020-06-12Merge tag 'nios2-v5.8-rc1' of ↵Linus Torvalds1-0/+1
git://git.kernel.org/pub/scm/linux/kernel/git/lftan/nios2 Pull nios2 update from Ley Foon Tan: "Mark expected switch fall-through in signal handling" * tag 'nios2-v5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/lftan/nios2: nios2: signal: Mark expected switch fall-through
2020-06-12Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds68-669/+1707
Pull more KVM updates from Paolo Bonzini: "The guest side of the asynchronous page fault work has been delayed to 5.9 in order to sync with Thomas's interrupt entry rework, but here's the rest of the KVM updates for this merge window. MIPS: - Loongson port PPC: - Fixes ARM: - Fixes x86: - KVM_SET_USER_MEMORY_REGION optimizations - Fixes - Selftest fixes" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (62 commits) KVM: x86: do not pass poisoned hva to __kvm_set_memory_region KVM: selftests: fix sync_with_host() in smm_test KVM: async_pf: Inject 'page ready' event only if 'page not present' was previously injected KVM: async_pf: Cleanup kvm_setup_async_pf() kvm: i8254: remove redundant assignment to pointer s KVM: x86: respect singlestep when emulating instruction KVM: selftests: Don't probe KVM_CAP_HYPERV_ENLIGHTENED_VMCS when nested VMX is unsupported KVM: selftests: do not substitute SVM/VMX check with KVM_CAP_NESTED_STATE check KVM: nVMX: Consult only the "basic" exit reason when routing nested exit KVM: arm64: Move hyp_symbol_addr() to kvm_asm.h KVM: arm64: Synchronize sysreg state on injecting an AArch32 exception KVM: arm64: Make vcpu_cp1x() work on Big Endian hosts KVM: arm64: Remove host_cpu_context member from vcpu structure KVM: arm64: Stop sparse from moaning at __hyp_this_cpu_ptr KVM: arm64: Handle PtrAuth traps early KVM: x86: Unexport x86_fpu_cache and make it static KVM: selftests: Ignore KVM 5-level paging support for VM_MODE_PXXV48_4K KVM: arm64: Save the host's PtrAuth keys in non-preemptible context KVM: arm64: Stop save/restoring ACTLR_EL1 KVM: arm64: Add emulation for 32bit guests accessing ACTLR2 ...
2020-06-12x86/entry: Make NMI use IDTENTRY_RAWThomas Gleixner2-3/+3
For no reason other than beginning brainmelt, IDTENTRY_NMI was mapped to IDTENTRY_IST. This is not a problem on 64bit because the IST default entry point maps to IDTENTRY_RAW which does not any entry handling. The surplus function declaration for the noist C entry point is unused and as there is no ASM code emitted for NMI this went unnoticed. On 32bit IDTENTRY_IST maps to a regular IDTENTRY which does the normal entry handling. That is clearly the wrong thing to do for NMI. Map it to IDTENTRY_RAW to unbreak it. The IDTENTRY_NMI mapping needs to stay to avoid emitting ASM code. Fixes: 6271fef00b34 ("x86/entry: Convert NMI to IDTENTRY_NMI") Reported-by: Naresh Kamboju <naresh.kamboju@linaro.org> Debugged-by: Andy Lutomirski <luto@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/CA+G9fYvF3cyrY+-iw_SZtpN-i2qA2BruHg4M=QYECU2-dNdsMw@mail.gmail.com
2020-06-12x86/entry: Treat BUG/WARN as NMI-like entriesAndy Lutomirski3-29/+52
BUG/WARN are cleverly optimized using UD2 to handle the BUG/WARN out of line in an exception fixup. But if BUG or WARN is issued in a funny RCU context, then the idtentry_enter...() path might helpfully WARN that the RCU context is invalid, which results in infinite recursion. Split the BUG/WARN handling into an nmi_enter()/nmi_exit() path in exc_invalid_op() to increase the chance to survive the experience. [ tglx: Make the declaration match the implementation ] Signed-off-by: Andy Lutomirski <luto@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/f8fe40e0088749734b4435b554f73eee53dcf7a8.1591932307.git.luto@kernel.org
2020-06-12KVM: PPC: Fix nested guest RC bits updateAlexey Kardashevskiy1-1/+1
Before commit 6cdf30375f82 ("powerpc/kvm/book3s: Use kvm helpers to walk shadow or secondary table") we called __find_linux_pte() with a page table pointer from a kvm_nested_guest struct but now we rely on kvmhv_find_nested() which takes an L1 LPID and returns a kvm_nested_guest pointer, however we pass a L0 LPID there and the L2 guest hangs. This fixes the LPID passed to kvmppc_hv_handle_set_rc(). Fixes: 6cdf30375f82 ("powerpc/kvm/book3s: Use kvm helpers to walk shadow or secondary table") Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20200611030559.75257-1-aik@ozlabs.ru
2020-06-12nios2: signal: Mark expected switch fall-throughLey Foon Tan1-0/+1
Mark switch cases where we are expecting to fall through. Fix the following warning through the use of the new the new pseudo-keyword fallthrough; arch/nios2/kernel/signal.c:254:12: warning: this statement may fall through [-Wimplicit-fallthrough=] 254 | restart = -2; | ~~~~~~~~^~~~ arch/nios2/kernel/signal.c:255:3: note: here 255 | case ERESTARTNOHAND: | ^~~~ Reported-by: Christian Brauner <christian.brauner@ubuntu.com> Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-06-12Merge tag 'locking-kcsan-2020-06-11' of ↵Linus Torvalds14-7/+68
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull the Kernel Concurrency Sanitizer from Thomas Gleixner: "The Kernel Concurrency Sanitizer (KCSAN) is a dynamic race detector, which relies on compile-time instrumentation, and uses a watchpoint-based sampling approach to detect races. The feature was under development for quite some time and has already found legitimate bugs. Unfortunately it comes with a limitation, which was only understood late in the development cycle: It requires an up to date CLANG-11 compiler CLANG-11 is not yet released (scheduled for June), but it's the only compiler today which handles the kernel requirements and especially the annotations of functions to exclude them from KCSAN instrumentation correctly. These annotations really need to work so that low level entry code and especially int3 text poke handling can be completely isolated. A detailed discussion of the requirements and compiler issues can be found here: https://lore.kernel.org/lkml/CANpmjNMTsY_8241bS7=XAfqvZHFLrVEkv_uM4aDUWE_kh3Rvbw@mail.gmail.com/ We came to the conclusion that trying to work around compiler limitations and bugs again would end up in a major trainwreck, so requiring a working compiler seemed to be the best choice. For Continous Integration purposes the compiler restriction is manageable and that's where most xxSAN reports come from. For a change this limitation might make GCC people actually look at their bugs. Some issues with CSAN in GCC are 7 years old and one has been 'fixed' 3 years ago with a half baken solution which 'solved' the reported issue but not the underlying problem. The KCSAN developers also ponder to use a GCC plugin to become independent, but that's not something which will show up in a few days. Blocking KCSAN until wide spread compiler support is available is not a really good alternative because the continuous growth of lockless optimizations in the kernel demands proper tooling support" * tag 'locking-kcsan-2020-06-11' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (76 commits) compiler_types.h, kasan: Use __SANITIZE_ADDRESS__ instead of CONFIG_KASAN to decide inlining compiler.h: Move function attributes to compiler_types.h compiler.h: Avoid nested statement expression in data_race() compiler.h: Remove data_race() and unnecessary checks from {READ,WRITE}_ONCE() kcsan: Update Documentation to change supported compilers kcsan: Remove 'noinline' from __no_kcsan_or_inline kcsan: Pass option tsan-instrument-read-before-write to Clang kcsan: Support distinguishing volatile accesses kcsan: Restrict supported compilers kcsan: Avoid inserting __tsan_func_entry/exit if possible ubsan, kcsan: Don't combine sanitizer with kcov on clang objtool, kcsan: Add kcsan_disable_current() and kcsan_enable_current_nowarn() kcsan: Add __kcsan_{enable,disable}_current() variants checkpatch: Warn about data_race() without comment kcsan: Use GFP_ATOMIC under spin lock Improve KCSAN documentation a bit kcsan: Make reporting aware of KCSAN tests kcsan: Fix function matching in report kcsan: Change data_race() to no longer require marking racing accesses kcsan: Move kcsan_{disable,enable}_current() to kcsan-checks.h ...
2020-06-12Merge tag 'locking-urgent-2020-06-11' of ↵Linus Torvalds4-10/+37
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull atomics rework from Thomas Gleixner: "Peter Zijlstras rework of atomics and fallbacks. This solves two problems: 1) Compilers uninline small atomic_* static inline functions which can expose them to instrumentation. 2) The instrumentation of atomic primitives was done at the architecture level while composites or fallbacks were provided at the generic level. As a result there are no uninstrumented variants of the fallbacks. Both issues were in the way of fully isolating fragile entry code pathes and especially the text poke int3 handler which is prone to an endless recursion problem when anything in that code path is about to be instrumented. This was always a problem, but got elevated due to the new batch mode updates of tracing. The solution is to mark the functions __always_inline and to flip the fallback and instrumentation so the non-instrumented variants are at the architecture level and the instrumentation is done in generic code. The latter introduces another fallback variant which will go away once all architectures have been moved over to arch_atomic_*" * tag 'locking-urgent-2020-06-11' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: locking/atomics: Flip fallbacks and instrumentation asm-generic/atomic: Use __always_inline for fallback wrappers
2020-06-12Merge tag 'x86-urgent-2020-06-11' of ↵Linus Torvalds9-63/+98
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull more x86 updates from Thomas Gleixner: "A set of fixes and updates for x86: - Unbreak paravirt VDSO clocks. While the VDSO code was moved into lib for sharing a subtle check for the validity of paravirt clocks got replaced. While the replacement works perfectly fine for bare metal as the update of the VDSO clock mode is synchronous, it fails for paravirt clocks because the hypervisor can invalidate them asynchronously. Bring it back as an optional function so it does not inflict this on architectures which are free of PV damage. - Fix the jiffies to jiffies64 mapping on 64bit so it does not trigger an ODR violation on newer compilers - Three fixes for the SSBD and *IB* speculation mitigation maze to ensure consistency, not disabling of some *IB* variants wrongly and to prevent a rogue cross process shutdown of SSBD. All marked for stable. - Add yet more CPU models to the splitlock detection capable list !@#%$! - Bring the pr_info() back which tells that TSC deadline timer is enabled. - Reboot quirk for MacBook6,1" * tag 'x86-urgent-2020-06-11' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/vdso: Unbreak paravirt VDSO clocks lib/vdso: Provide sanity check for cycles (again) clocksource: Remove obsolete ifdef x86_64: Fix jiffies ODR violation x86/speculation: PR_SPEC_FORCE_DISABLE enforcement for indirect branches. x86/speculation: Prevent rogue cross-process SSBD shutdown x86/speculation: Avoid force-disabling IBPB based on STIBP and enhanced IBRS. x86/cpu: Add Sapphire Rapids CPU model number x86/split_lock: Add Icelake microserver and Tigerlake CPU models x86/apic: Make TSC deadline timer detection message visible x86/reboot/quirks: Add MacBook6,1 reboot quirk
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