Age | Commit message (Collapse) | Author | Files | Lines |
|
From "Christian Daudt" <csd@broadcom.com>:
Remove mach-bcmring as this is no longer maintained or used.
Updated the removal with:
- drop the edit to mach-types requested by Russell King
- eliminate defconfig mod from patch 1 requested Olof Johansson
Also switched to using git send-email to avoid word-wrapping
problems
* bcmring/removal:
ARM: Remove mach-bcmring
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
Doing a large-scale cleaning and removing the platform in another
branch don't mix well, so do the trivial merge here.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
Remove mach-bcmring as this is no longer maintained or used.
Signed-off-by: Christian Daudt <csd@broadcom.com>
Reviewed-by: Jiandong Zheng <jdzheng@broadcom.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
Various cleanups for the clps711x platform from
Alexander Shiyan <shc_work@mail.ru> via email:
* clps711x/cleanup:
ARM: clps711x: Remove board support for CEIVA
ARM: clps711x: Fix register definitions
ARM: clps711x: Fix lowlevel debug-macro
ARM: clps711x: Added simple clock framework
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
The current kernel does not fit in the CEIVA ROM. Also, some functional
has already been removed due migrate from 2.6 to 3.0, and it seems that
no one uses this platform. So, remove support for this board and modules
specific only to this board.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
|
|
This patch contain some fixes:
- Fixes the address of register PORTE.
- Corrects name for DAIDR0 register.
- Removes unused definition for SYNCIO_CFGLEN.
- Fixes definition SYNCIO_FRMLEN.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
|
|
CTS signal can not be used for the port and tied to any logic state.
In this case we have an infinite loop waiting for the signal. For fix
this problem, checking CTS removed, waiting for the signal "busy" was
postponed after the byte write to the port.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
|
|
Modern CPUs from CLPS711X-line can operate at frequencies other than 73 MHz.
This patch adds simple clock framework for handling all possible CPU rates.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/cleanup2
ARM: tegra: second round of cleanups
This branch mainly removes dead code following the removal of all board
files. The removals depend on various changes in other branches, so they
are all merged together and form the basis of this branch, as enumerated
below.
Finally, there are no remaining users of pinconf-tegra.h outside the
pinctrl subsystem, so that header is incorporated into an existing file
there. This reduces the number of headers in mach-tegra/include, and so
helps move towards single zImage.
This branch is based on tegra-for-3.7-cleanup, followed by a merge of
tegra-for-3.7-board-removal, followed by a merge of
tegra-for-3.7-common-clk, followed by a merge of:
git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git xceiv-for-v3.7
By Stephen Warren (16) and others
via Stephen Warren
* tag 'tegra-for-3.7-cleanup2' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (29 commits)
pinctrl: tegra: move pinconf-tegra.h content into drivers/pinctrl
ARM: tegra: delete unused headers
ARM: tegra: remove useless includes of <mach/*.h>
ARM: tegra: remove dead code
ARM: dt: tegra: harmony: configure power off
ARM: dt: tegra: harmony: add regulators
ARM: tegra: remove board (but not DT) support for Harmony
ARM: tegra: remove board (but not DT) support for Paz00
ARM: tegra: remove board (but not DT) support for TrimSlice
ARM: Tegra: Add smp_twd clock for Tegra20
ARM: tegra: cpu-tegra: explicitly manage re-parenting
ARM: tegra: fix overflow in tegra20_pll_clk_round_rate()
ARM: tegra: Fix data type for io address
ARM: tegra: remove tegra_timer from tegra_list_clks
ARM: tegra30: clocks: fix the wrong tegra_audio_sync_clk_ops name
ARM: tegra: clocks: separate tegra_clk_32k_ops from Tegra20 and Tegra30
ARM: tegra: Remove duplicate code
ARM: tegra: Port tegra to generic clock framework
ARM: tegra: Add clk_tegra structure and helper functions
ARM: tegra: Rename tegra20 clock file
...
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into next/cleanup2
usb: xceiv: patches for v3.7 merge window
nop xceiv got its own header to avoid polluting otg.h. It has also
learned to work as USB2 and USB3 phys so we can use it on USB3
controllers.
Together with those two changes to nop xceiv, we're adding basic
PHY support to dwc3 driver, this is to allow platforms which actually
have a SW-controllable PHY talk to them through dwc3 driver.
We're adding a new phy driver for the OMAP architecture. This driver
is for the PHY found in OMAP4 SoCs, and a new phy driver for the
marvell architecture. An extra phy driver - for Tegra SoCs - is now
moving from arch/arm/mach-tegra* to drivers/usb/phy.
Also here, there's the creation of <linux/usb/phy.h> which should be
used from now on for PHY drivers, even those which don't support
OTG.
* tag 'xceiv-for-v3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb:
usb: otg: mxs-phy: Fix mx23 operation
usb: dwc3: add basic PHY support
usb: dwc3: exynos: add nop transceiver support
usb: dwc3: omap: add nop transceiver support
usb: dwc3: pci: add nop transceiver support
usb: otg: move the dereference below the NULL test
arm: omap: phy: remove unused functions from omap-phy-internal.c
usb: twl4030: Add device tree support for twl4030 usb
usb: twl6030: Add dt support for twl6030 usb
usb: otg: make twl6030_usb as a comparator driver to omap_usb2
usb: phy: add a new driver for omap usb2 phy
usb: phy: fix build break
usb: move phy driver from mach-tegra to drivers/usb
usb: otg: Move phy interface to separate file.
usb: phy: isp1301: Remove unused static array and define
usb: phy: mv_u3d: Add usb phy driver for mv_u3d
usb: otg: Remove the unneeded NULL check
usb: xceiv: nop: let it work as USB2 and USB3 phy
usb: xceiv: create nop-usb-xceiv.h and avoid pollution on otg.h
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
git://git.linaro.org/people/mszyprowski/linux-dma-mapping
Pull one more DMA-mapping fix from Marek Szyprowski:
"This patch fixes very subtle bug (typical off-by-one error) which
might appear in very rare circumstances."
* 'fixes-for-3.6' of git://git.linaro.org/people/mszyprowski/linux-dma-mapping:
arm: mm: fix DMA pool affiliation check
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull perf fixes from Ingo Molnar:
"This tree includes various fixes"
Ingo really needs to improve on the whole "explain git pull" part.
"Various fixes" indeed.
* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
perf/hwpb: Invoke __perf_event_disable() if interrupts are already disabled
perf/x86: Enable Intel Cedarview Atom suppport
perf_event: Switch to internal refcount, fix race with close()
oprofile, s390: Fix uninitialized memory access when writing to oprofilefs
perf/x86: Fix microcode revision check for SNB-PEBS
|
|
Now that Tegra's pinmux is configured solely from device tree, there's
no need for the pinconf types to be defined in arch/arm/mach-tegra/.
Move it into the pinctrl directory to clean up mach-tegra, as a pre-
requisite for single-zImage.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
|
|
Nothing includes these headers any more; remove them.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
|
|
Nothing from these files is needed, so remove the includes. This helps
single zImage work by reducing use of the mach-tegra/include/mach/
directory.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
|
|
Now that all boards are converted to device tree, devices.[ch] and
board-pinmux.[ch] are no longer used. So, remove them.
The only exception is the EHCI platform data in devices.h. Move that
data to board-dt-tegra20.c - the only places it's used.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
|
|
|
|
|
|
|
|
Add DT property to tell the TPS6586x that it should provide the
pm_power_off() implementation. This allows "shutdown" to work.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
|
|
Harmony uses a TPS6586x regulator. Instantiate this, and hook up a
couple of fixed GPIO-controlled regulators too.
Based on Ventana regulator patch by Stephen Warren <swarren@nvidia.com>
and converted to Harmony.
swarren made the following changes:
* Added ldo0 regulator configuration to device tree, and updated
board-harmony-pcie.c for the new regulator name.
* Fixed vdd_1v05's voltage from 10.5V to 1.05V.
* Modified board-harmony-pcie.c to obtain the en_vdd_1v05 GPIO number at
run-time from device tree instead of hard-coding it.
* Removed board-harmony{-power.c,.h} now that they're unused.
* Disabled vdd_1v05 regulator; the code in board-harmony-pcie.c hijacks
this GPIO for now. This will be fixed when the PCIe driver is re-
written as a driver. The code can't regulator_get("vdd_1v05") right
now, because the vdd_1v05 regulator's probe gets deferred due to its
supply being the PMIC, which gets probed after the regulator the first
time around, and this dependency is only resolved by repeated probing,
which happens when deferred_probe_initcall() is called, which happens
in a late initcall, whose runtime order relative to harmony_pcie_init()
is undefined, since that's also called from a late initcall.
* Removed unused harmony_pcie_initcall().
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
|
|
Harmony can be booted using device tree with equal functionality as when
booted using a board file. Remove as much of the board file as is
possible, since it's no longer needed.
Two special-cases are still left in board-dt-tegra20.c, since the Tegra
PCIe driver doesn't support device tree yet, and the Harmony .dts file
doesn't yet describe regulators which are needed for PCIe. This logic is
now enabled unconditionally rather than via CONFIG_MACH_HARMONY. While
this is more code than other boards, it's still unlikely to be much of a
problem, and both regulators and PCIe should be supported via device tree
in the near future, allowing the remaining code to be removed.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
|
|
Paz00 (Toshiba AC100) can be booted using device tree with equal
functionality as when booted using a board file. Remove as much of the
board file as is possible, since it's no longer needed.
One special-case is still left in board-dt-tegra20.c, since there is no
way to create a WiFi rfkill device from device tree yet. This logic is
now enabled unconditionally rather than via CONFIG_MACH_PAZ00. The extra
cases where it's enabled (.configs which did not enable Paz00 support)
shouldn't impact much since the amount of code is tiny.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-By: Marc Dietrich <marvin24@gmx.de>
|
|
TrimSlice can be booted using device tree with equal functionality as
when booted using a board file. Remove the board file since it's no
longer needed.
One special-case is still left in board-dt-tegra20.c, since the Tegra
PCIe driver doesn't support device tree yet. This logic is now enabled
by CONFIG_TEGRA_PCI rather than via CONFIG_MACH_TRIMSLICE. The extra
cases where it's enabled (.configs which did not enable TrimSlice
support) shouldn't impact much since the amount of code is tiny.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
|
|
Clockevent's frequency is changed upon cpufreq change
notification. It fetches local timer's rate to update the
clockevent frequency. This patch adds local timer clock
for Tegra20.
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull arm-soc bug fixes from Olof Johansson:
- A set of OMAP fixes, about half of them PM/clock related, the rest
scattered over the platform code but all small and targeted to real
bugs.
- Two small i.MX fixes for SSI device clock setup.
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: clk-imx35: Fix SSI clock registration
ARM: clk-imx25: Fix SSI clock registration
ARM: OMAP4: Fix array size for irq_target_cpu
ARM: OMAP4: hwmod data: temporarily comment out data for the sl2if IP block
ARM: OMAP: hwmod code: Disable module when hwmod enable fails
ARM: OMAP3: hwmod data: fix iva2 reset info
ARM: OMAP3xxx: clockdomain: fix software supervised wakeup/sleep
ARM: OMAP2+: am33xx: Fix the timer fck clock naming convention
ARM: OMAP: Config fix for omap3-touchbook board
ARM: OMAP: sram: skip the first 16K on OMAP3 HS
ARM: OMAP: sram: fix OMAP4 errata handling
ARM: OMAP: timer: obey the !CONFIG_OMAP_32K_TIMER
|
|
ARM: i.MX: Fix SSI clock associations for i.MX25/i.MX35
* tag 'imx-fixes' of git://git.pengutronix.de/git/imx/linux-2.6:
ARM: clk-imx35: Fix SSI clock registration
ARM: clk-imx25: Fix SSI clock registration
+ Linux 3.6-rc5
|
|
Pull ARM fixes from Russell King:
"It's been a while... so there's a little more here than normal.
Mostly updates from Will for the breakpoint stuff, and plugging a few
holes in the user access functions which crept in when domain support
was disabled for ARMv7 CPUs."
* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
ARM: 7529/1: delay: set loops_per_jiffy when moving to timer-based loop
ARM: 7528/1: uaccess: annotate [__]{get,put}_user functions with might_fault()
ARM: 7527/1: uaccess: explicitly check __user pointer when !CPU_USE_DOMAINS
ARM: 7526/1: traps: send SIGILL if get_user fails on undef handling path
ARM: 7521/1: Fix semihosting Kconfig text
ARM: 7513/1: Make sure dtc is built before running it
ARM: 7512/1: Fix XIP build due to PHYS_OFFSET definition moving
ARM: 7499/1: mm: Fix vmalloc overlap check for !HIGHMEM
ARM: 7503/1: mm: only flush both pmd entries for classic MMU
ARM: 7502/1: contextidr: avoid using bfi instruction during notifier
ARM: 7501/1: decompressor: reset ttbcr for VMSA ARMv7 cores
ARM: 7497/1: hw_breakpoint: allow single-byte watchpoints on all addresses
ARM: 7496/1: hw_breakpoint: don't rely on dfsr to show watchpoint access type
ARM: Fix ioremap() of address zero
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/lliubbo/blackfin
Pull blackfin updates from Bob Liu:
"One kbuild and a smp build fix."
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lliubbo/blackfin:
kbuild: add symbol prefix arg to kallsyms
blackfin: smp: adapt to generic smp helpers
|
|
When changing a PLL's rate, it must have no active children. The CPU
clock cannot be stopped, and CPU clock's divider is not used. The old
clock driver used to handle this by internally reparenting the CPU clock
onto a different PLL when changing the CPU clock rate. However, the new
common-clock based clock driver does not do this, and probably cannot do
this due to the locking issues it would cause.
To solve this, have the Tegra cpufreq driver explicitly perform the
reparenting operations itself. This is probably reasonable anyway,
since such reparenting is somewhat a matter of policy (e.g. which
alternate clock source to use, whether to leave the CPU clock a child
of the alternate clock source if it's running at the desired rate),
and hence is something more appropriate for the cpufreq driver than
the core clock driver anyway.
Cc: Prashant Gaikwad <pgaikwad@nvidia.com>
Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
|
|
32-bit math isn't enough when e.g. *prate=12000000, and sel->n=1000.
Use 64-bit math to prevent this.
Cc: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
|
|
SSI block has two types of clock:
ipg: bus clock, the clock needed for accessing registers.
per: peripheral clock, the clock needed for generating the bit rate.
Currently SSI driver only supports slave mode and only need to handle
the ipg clock, because the peripheral clock comes from the master codec.
Only register the ipg clock and do not register the peripheral clock for ssi.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: stable@vger.kernel.org
|
|
SSI block has two types of clock:
ipg: bus clock, the clock needed for accessing registers.
per: peripheral clock, the clock needed for generating the bit rate.
Currently SSI driver only supports slave mode and only need to handle
the ipg clock, because the peripheral clock comes from the master codec.
Only register the ipg clock and do not register the peripheral clock for ssi.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: stable@vger.kernel.org
|
|
Commit 1f2bfbd00e466ff3489b2ca5cc75b1cccd14c123 ("kbuild: link of
vmlinux moved to a script") introduced in v3.5-rc1 broke kallsyms on
architectures which have symbol prefixes.
The --symbol-prefix argument used to be added to the KALLSYMS command
line from the architecture Makefile, however this isn't picked up by the
new scripts/link-vmlinux.sh. This resulted in symbols like
kallsyms_addresses being added which weren't correctly overriding the
weak symbols such as _kallsyms_addresses. These could then trigger
BUG_ONs in kallsyms code.
This is fixed by removing the KALLSYMS addition from the architecture
Makefile, and using CONFIG_SYMBOL_PREFIX in the link-vmlinux.sh script
to determine whether to add the --symbol-prefix argument.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Bob Liu <lliubbo@gmail.com>
|
|
Pull KVM updates from Avi Kivity:
"A trio of KVM fixes: incorrect lookup of guest cpuid, an uninitialized
variable fix, and error path cleanup fix."
* tag 'kvm-3.6-2' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
KVM: fix error paths for failed gfn_to_page() calls
KVM: x86: Check INVPCID feature bit in EBX of leaf 7
KVM: PIC: fix use of uninitialised variable.
|
|
The __free_from_pool() function was changed in
e9da6e9905e639b0f842a244bc770b48ad0523e9. Unfortunately, the test that
checks whether the provided (start,size) is within the DMA pool has
been improperly modified. It used to be:
if (start < coherent_head.vm_start || end > coherent_head.vm_end)
Where coherent_head.vm_end was non-inclusive (i.e, it did not include
the first byte after the pool). The test has been changed to:
if (start < pool->vaddr || start > pool->vaddr + pool->size)
So now pool->vaddr + pool->size is inclusive (i.e, it includes the
first byte after the pool), so the test should be >= instead of >.
This bug causes the following message when freeing the *first* DMA
coherent buffer that has been allocated, because its virtual address
is exactly equal to pool->vaddr + pool->size :
WARNING: at /home/thomas/projets/linux-2.6/arch/arm/mm/dma-mapping.c:463 __free_from_pool+0xa4/0xc0()
freeing wrong coherent size from pool
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Marek Szyprowski <m.szyprowski@samsung.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Lior Amsalem <alior@marvell.com>
Cc: Maen Suleiman <maen@marvell.com>
Cc: Tawfik Bayouk <tawfik@marvell.com>
Cc: Shadi Ammouri <shadi@marvell.com>
Cc: Eran Ben-Avi <benavi@marvell.com>
Cc: Yehuda Yitschak <yehuday@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
[m.szyprowski: rebased onto v3.6-rc5 and resolved conflict]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
|
|
This bug was triggered:
[ 4220.198458] BUG: unable to handle kernel paging request at fffffffffffffffe
[ 4220.203907] IP: [<ffffffff81104d85>] put_page+0xf/0x34
......
[ 4220.237326] Call Trace:
[ 4220.237361] [<ffffffffa03830d0>] kvm_arch_destroy_vm+0xf9/0x101 [kvm]
[ 4220.237382] [<ffffffffa036fe53>] kvm_put_kvm+0xcc/0x127 [kvm]
[ 4220.237401] [<ffffffffa03702bc>] kvm_vcpu_release+0x18/0x1c [kvm]
[ 4220.237407] [<ffffffff81145425>] __fput+0x111/0x1ed
[ 4220.237411] [<ffffffff8114550f>] ____fput+0xe/0x10
[ 4220.237418] [<ffffffff81063511>] task_work_run+0x5d/0x88
[ 4220.237424] [<ffffffff8104c3f7>] do_exit+0x2bf/0x7ca
The test case:
printf(fmt, ##args); \
exit(-1);} while (0)
static int create_vm(void)
{
int sys_fd, vm_fd;
sys_fd = open("/dev/kvm", O_RDWR);
if (sys_fd < 0)
die("open /dev/kvm fail.\n");
vm_fd = ioctl(sys_fd, KVM_CREATE_VM, 0);
if (vm_fd < 0)
die("KVM_CREATE_VM fail.\n");
return vm_fd;
}
static int create_vcpu(int vm_fd)
{
int vcpu_fd;
vcpu_fd = ioctl(vm_fd, KVM_CREATE_VCPU, 0);
if (vcpu_fd < 0)
die("KVM_CREATE_VCPU ioctl.\n");
printf("Create vcpu.\n");
return vcpu_fd;
}
static void *vcpu_thread(void *arg)
{
int vm_fd = (int)(long)arg;
create_vcpu(vm_fd);
return NULL;
}
int main(int argc, char *argv[])
{
pthread_t thread;
int vm_fd;
(void)argc;
(void)argv;
vm_fd = create_vm();
pthread_create(&thread, NULL, vcpu_thread, (void *)(long)vm_fd);
printf("Exit.\n");
return 0;
}
It caused by release kvm->arch.ept_identity_map_addr which is the
error page.
The parent thread can send KILL signal to the vcpu thread when it was
exiting which stops faulting pages and potentially allocating memory.
So gfn_to_pfn/gfn_to_page may fail at this time
Fixed by checking the page before it is used
Signed-off-by: Xiao Guangrong <xiaoguangrong@linux.vnet.ibm.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
|
|
The delay functions may be called by some platforms between switching to
the timer-based delay loop but before calibration. In this case, the
initial loops_per_jiffy may not be suitable for the timer (although a
compromise may be achievable) and delay times may be considered too
inaccurate.
This patch updates loops_per_jiffy when switching to the timer-based
delay loop so that delays are consistent prior to calibration.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
|
The user access functions may generate a fault, resulting in invocation
of a handler that may sleep.
This patch annotates the accessors with might_fault() so that we print a
warning if they are invoked from atomic context and help lockdep keep
track of mmap_sem.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
|
The {get,put}_user macros don't perform range checking on the provided
__user address when !CPU_HAS_DOMAINS.
This patch reworks the out-of-line assembly accessors to check the user
address against a specified limit, returning -EFAULT if is is out of
range.
[will: changed get_user register allocation to match put_user]
[rmk: fixed building on older ARM architectures]
Reported-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Cc: stable@vger.kernel.org
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
|
Checks and operations on the INVPCID feature bit should use EBX
of CPUID leaf 7 instead of ECX.
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Signed-off-by: Yongjie Ren <yongjien.ren@intel.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
|
|
git://git.linaro.org/people/mszyprowski/linux-dma-mapping
Pull DMA-mapping fixes from Marek Szyprowski:
"Another set of fixes for ARM dma-mapping subsystem.
Commit e9da6e9905e6 replaced custom consistent buffer remapping code
with generic vmalloc areas. It however introduced some regressions
caused by limited support for allocations in atomic context. This
series contains fixes for those regressions.
For some subplatforms the default, pre-allocated pool for atomic
allocations turned out to be too small, so a function for setting its
size has been added.
Another set of patches adds support for atomic allocations to
IOMMU-aware DMA-mapping implementation.
The last part of this pull request contains two fixes for Contiguous
Memory Allocator, which relax too strict requirements."
* 'fixes-for-3.6' of git://git.linaro.org/people/mszyprowski/linux-dma-mapping:
ARM: dma-mapping: IOMMU allocates pages from atomic_pool with GFP_ATOMIC
ARM: dma-mapping: Introduce __atomic_get_pages() for __iommu_get_pages()
ARM: dma-mapping: Refactor out to introduce __in_atomic_pool
ARM: dma-mapping: atomic_pool with struct page **pages
ARM: Kirkwood: increase atomic coherent pool size
ARM: DMA-Mapping: print warning when atomic coherent allocation fails
ARM: DMA-Mapping: add function for setting coherent pool size from platform code
ARM: relax conditions required for enabling Contiguous Memory Allocator
mm: cma: fix alignment requirements for contiguous regions
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Fixes for timer, sram, memory corruption, and one board file that affect
booting on various omaps. Then some PM related fixes for reset, sleep
and wakeup.
* tag 'omap-fixes-for-v3.6-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP4: Fix array size for irq_target_cpu
ARM: OMAP4: hwmod data: temporarily comment out data for the sl2if IP block
ARM: OMAP: hwmod code: Disable module when hwmod enable fails
ARM: OMAP3: hwmod data: fix iva2 reset info
ARM: OMAP3xxx: clockdomain: fix software supervised wakeup/sleep
ARM: OMAP2+: am33xx: Fix the timer fck clock naming convention
ARM: OMAP: Config fix for omap3-touchbook board
ARM: OMAP: sram: skip the first 16K on OMAP3 HS
ARM: OMAP: sram: fix OMAP4 errata handling
ARM: OMAP: timer: obey the !CONFIG_OMAP_32K_TIMER
|
|
get_user may fail to load from the provided __user address due to an
unhandled fault generated by the access.
In the case of the undefined instruction trap, this results in failure
to load the faulting instruction, in which case we should send SIGILL to
the task rather than continue with potentially uninitialised data.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Cc: stable@vger.kernel.org
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
|
It seems we were missing some text in the title for the
semihosting DEBUG_LL option. Add in the "/O" and fix up some
minor typos in the help text.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
|
'make dtbs' in a clean tree will try running the dtc before actually
building it. Make these rules depend upon the scripts to build it.
Cc: <stable@vger.kernel.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
|
During the p2v changes, the PHYS_OFFSET #define moved into a
!__ASSEMBLY__ section. This causes a XIP build to fail with
arch/arm/kernel/head.o: In function 'stext':
arch/arm/kernel/head.S:146: undefined reference to 'PHYS_OFFSET'
Momentarily leave the #ifndef __ASSEMBLY__ section so we can
define PHYS_OFFSET for all compilation units.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
|
Warnings were generated because following commit changed data type for
address pointer
195bbca ARM: 7500/1: io: avoid writeback addressing modes for __raw_ accessors
arch/arm/mach-tegra/tegra30_clocks.c: In function 'clk_measure_input_freq':
arch/arm/mach-tegra/tegra30_clocks.c:418:2: warning: passing argument 2 of '__raw_writel' makes pointer from integer without a cast
.../arch/arm/include/asm/io.h:88:20: note: expected 'volatile void *' but argument is of type 'unsigned int
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
|
|
Replace blackfin ipi message queue with generic smp helper function.
Signed-off-by: Steven Miao <realmz6@gmail.com>
Signed-off-by: Bob Liu <lliubbo@gmail.com>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen
Pull Xen bug-fixes from Konrad Rzeszutek Wilk:
* Fix for TLB flushing introduced in v3.6
* Fix Xen-SWIOTLB not using proper DMA mask - device had 64bit but
in a 32-bit kernel we need to allocate for coherent pages from a
32-bit pool.
* When trying to re-use P2M nodes we had a one-off error and triggered
a BUG_ON check with specific CONFIG_ option.
* When doing FLR in Xen-PCI-backend we would first do FLR then save the
PCI configuration space. We needed to do it the other way around.
* tag 'stable/for-linus-3.6-rc4-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen:
xen/pciback: Fix proper FLR steps.
xen: Use correct masking in xen_swiotlb_alloc_coherent.
xen: fix logical error in tlb flushing
xen/p2m: Fix one-off error in checking the P2M tree directory.
|