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2016-05-10Merge branch 'renesas/fixes-2' into next/dt64Arnd Bergmann4-34/+14
This merges fixes from linux-4.6 into the next/dt64 tree to avoid a later merge conflict. * renesas/fixes-2: arm64: dts: r8a7795: Don't disable referenced optional scif clock ARM: shmobile: timer: Fix preset_lpj leading to too short delays Revert "ARM: dts: porter: Enable SCIF_CLK frequency and pins" ARM: dts: r8a7791: Don't disable referenced optional clocks
2016-04-28Merge tag 'hip0x-dt-for-4.7' of git://github.com/hisilicon/linux-hisi into ↵Arnd Bergmann5-1/+388
next/dt64 Merge "ARM64: DT: Hisilicon hip05 and hip06 updates for 4.7" Wei Xu: - Fix its node without msi-cells for hip05 - Add nor flash node for hip05 D02 board - Add initial dts for hip06 D03 board - Reorder and add the hip06 D03 binding in the binding document * tag 'hip0x-dt-for-4.7' of git://github.com/hisilicon/linux-hisi: Documentation: arm64: Add Hisilicon Hip06 D03 dts binding arm64: dts: Add initial dts for Hisilicon Hip06 D03 board arm64: dts: hip05: Add nor flash support arm64: dts: hip05: fix its node without msi-cells
2016-04-28Merge tag 'renesas-arm64-dt2-for-v4.7' of ↵Arnd Bergmann2-3/+112
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt64 Merge "Second Round of Renesas ARM64 Based SoC DT Updates for v4.7" from Simon Horman: * Don't disable referenced optional clocks in DT of r8a7795 SoC * Populate EXTALR in DT of salvator-x board * Enable PCIe in DT of salvator-x board * tag 'renesas-arm64-dt2-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: arm64: dts: r8a7795: Don't disable referenced optional clocks arm64: dts: salvator-x: populate EXTALR arm64: dts: r8a7795: enable PCIe on Salvator-X arm64: dts: r8a7795: Add PCIe nodes arm64: dts: r8a7795: Use USB3.0 fallback compatibility string arm64: dts: r8a7795: Add CAN support arm64: dts: r8a7795: Add CAN external clock support
2016-04-27arm64: dts: Add initial dts for Hisilicon Hip06 D03 boardKefeng Wang3-1/+344
The Hip06 soc has same cpu topology compared with Hip05, four clusters and each cluster has quard Cortex-A57, but with different IO part, like HNS, SAS and PCI, they are all upgraded. There are also not same in ITS, MBIGEN and SMMU, etc. This patch adds the initial dts for hip06 d03 board. Note, there is no serial, because the soc use LPC uart, the serial node is not needed. Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-04-27arm64: dts: hip05: Add nor flash supportKefeng Wang2-0/+40
This patch is to add support nor-flash. Notice, the pre-defined partitions may not be used. Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-04-27arm64: dts: hip05: fix its node without msi-cellsKefeng Wang1-0/+4
Fix commit abf9c25d55e8 ("arm64: dts: hip05: Append all gicv3 ITS entries"), it forgets the property msi-cell, see arm,gic-v3.txt. Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-04-27arm64: dts: r8a7795: Don't disable referenced optional clocksGeert Uytterhoeven2-4/+2
clk_get() on a disabled clock node will return -EPROBE_DEFER, which can cause drivers to be deferred forever if such clocks are referenced in their devices' clocks properties. Update the various disabled external clock nodes to default to a frequency of 0, but don't disable them, to prevent this. Reported-by: Jürg Billeter <j@bitron.ch> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-27arm64: dts: salvator-x: populate EXTALRWolfram Sang1-0/+4
It can be used for the watchdog. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-27arm64: dts: r8a7795: enable PCIe on Salvator-XPhil Edworthy1-0/+12
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-27arm64: dts: r8a7795: Add PCIe nodesPhil Edworthy1-0/+57
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-26arm64: dts: r8a7795: Don't disable referenced optional scif clockGeert Uytterhoeven1-1/+0
clk_get() on a disabled clock node will return -EPROBE_DEFER, which can cause drivers to be deferred forever if such clocks are referenced in their devices' clocks properties. Update the disabled external scif clock node so that it is not disabled to prevent this. Reported-by: Jürg Billeter <j@bitron.ch> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> [simon: fix for v4.6 extracted from a larger patch targeted at v4.7] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-25arm64: dts: uniphier: add reference clock node for PH1-LD20Masahiro Yamada1-0/+6
Add a master clock node generated by a 25MHz crystal oscillator. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2016-04-25arm64: dts: uniphier: use Daughter board on PH1-LD20 reference boardMasahiro Yamada2-0/+2
Include the development base board, which is equipped with some devices such as EEPROM. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2016-04-25Merge tag 'arm-soc/for-4.7/devicetree-arm64' of ↵Arnd Bergmann3-100/+205
http://github.com/Broadcom/stblinux into next/dt64 Pull "Broadcom ARM64-based SoC Device Tree changes" from Florian Fainelli: - Anup enables a bunch of standard peripherals in the Northstar 2 DTS: PL330 DMA, GIC maintenance interrupt, PL022 SPI controller - Anup also re-orgnanizes the clock Device Tree fragments into a separate file for consistency with how other Broadcom SoCs are doing this - Luke switches the SMP enable-method and reboot from a spin-table + syscon to the standard PSCI 1.0 firmware interface * tag 'arm-soc/for-4.7/devicetree-arm64' of http://github.com/Broadcom/stblinux: arm64: dts: NS2 secondary core enablement via PSCI arm64: dts: Add ARM PL022 SPI DT nodes for NS2 arm64: dts: Move NS2 clock DT nodes to separate DT file arm64: dts: Add maintenance interrupt for GIC in NS2 DT arm64: dts: Add ARM PL330 DMA DT node for NS2
2016-04-25Merge tag 'xgene-dts-for-v4.7-part1' of ↵Arnd Bergmann1-3/+3
https://github.com/AppliedMicro/xgene-next into next/dt64 Merge "First part of X-Gene DTS changes queued for v4.7" from Duc Dang: This patch set only includes a single change to fix the compatible string for SATA controllers on X-Gene v2 SOC platforms. * tag 'xgene-dts-for-v4.7-part1' of https://github.com/AppliedMicro/xgene-next: arm64: dts: apm: Fix compatible string for X-Gene 2 SATA controller DTS node
2016-04-25Merge tag 'hi6220-dt-for-4.7' of git://github.com/hisilicon/linux-hisi into ↵Arnd Bergmann3-5/+1523
next/dt64 Pull "ARM64: DT: Hisilicon Hi6220 soc and hikey board updates for 4.7" from Wei Xu - Reserve memory regions for Hi6220 - Add sp804 timer node for Hi6220 - Add cpu and cluster level's low power state for Hi6220 - Add gpio configuration nodes for Hi6220 - Add pinctrl configuration nodes for Hi6220 - Add spi related nodes for Hi6220 - Add i2c nodes for Hi6220 - Add i2c nodes to work with mezzanine boards - Add usb nodes for Hi6220 - Add mailobx node for Hi6220 - Add SRAM node and stub clock node for Hi6220 - Add pinctrl nodes for uarts and enable them - Add LED nodes for hi6220-hikey board - Add hi655x pmic node for Hi6220 - Add dwmmc nodes for Hi6220 - Add wifi nodes support for Hi6220-Hikey board - Register thermal sensor for Hi6220 - Register Hi6220's thermal zone for power allocator - Add L2 cache topology for Hi6220 * tag 'hi6220-dt-for-4.7' of git://github.com/hisilicon/linux-hisi: arm64: dts: Add L2 cache topology to Hi6220 arm64: dts: register Hi6220's thermal zone for power allocator arm64: dts: register Hi6220's thermal sensor arm64: dts: add wifi nodes support for hi6220-hikey arm64: dts: add dwmmc nodes for hi6220 arm64: dts: hikey: Add hi655x pmic dts node arm64: dts: add LED nodes for hi6220-hikey arm64: dts: hi6220: add pinctrl for uarts and enable them arm64: dts: add Hi6220's stub clock node arm64: dts: add mailbox node for Hi6220 arm64: dts: Add hi6220 usb node arm64: dts: hikey: enable i2c0 and i2c1 for working with mezzanine boards arm64: dts: add all hi6220 i2c nodes arm64: dts: add Hi6220 spi configuration nodes arm64: dts: add Hi6220 pinctrl configuration nodes arm64: dts: Add Hi6220 gpio configuration nodes arm64: dts: enable idle states for Hi6220 arm64: dts: add sp804 timer node for Hi6220 arm64: dts: Reserve memory regions for hi6220
2016-04-25Merge tag 'juno-for-v4.7/dt-updates' of ↵Arnd Bergmann1-0/+10
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt64 Pull "ARMv8 Juno DT updates for v4.7" from Sudeep Holla: Just one update: Support for external expansion bus useful for additional hardware e.g.LogicTile Express daughterboards (Brian Starkey) * tag 'juno-for-v4.7/dt-updates' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: arm64: dts: juno: Add external expansion bus to DT
2016-04-25Merge tag 'tegra-for-4.7-arm64' of ↵Arnd Bergmann10-161/+1617
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt64 Merge "arm64: tegra: Changes for v4.7-rc1" from Thierry Reding A couple of cleanups and fixes to various device trees, enable power and volume keys on Jetson TX1, use stdout-path to define the serial port (so it doesn't have to be specified on the kernel command-line) and add Google Pixel C (a.k.a. Smaug) support. * tag 'tegra-for-4.7-arm64' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: tegra: Enable cros-ec and charger on Smaug arm64: tegra: Add pinmux for Smaug board arm64: tegra: Add stdout-path for various boards arm64: tegra: Remove unused #power-domain-cells property arm64: tegra: Add gpio-keys nodes for Smaug arm64: tegra: Enable power and volume keys on Jetson TX1 arm64: tegra: Add support for Google Pixel C arm64: tegra: Replace legacy *,wakeup property with wakeup-source arm64: tegra: Fix copy/paste typo in several DTS includes arm64: tegra: Remove 0, prefix from unit-addresses
2016-04-25Merge tag 'samsung-dt64-4.7' of ↵Arnd Bergmann3-0/+128
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt64 Merge "Samsung Device Tree ARM64 updates and improvements for v4.7" from Krzysztof Kozlowski: 1. Add PL330 DMA controller and Thermal Management Unit to Exynos 7. * tag 'samsung-dt64-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: Add nodes for pdma0 and pdma1 for exynos7 arm64: dts: exynos: Add TMU node for exynos7
2016-04-22arm64: dts: NS2 secondary core enablement via PSCILuke Starrett1-22/+9
Declare PSCI-1.0 node and enable CPU_ON method via PSCI. Spin-table memreserve has been removed as well as syscon based reset, as PSCI-1.0 expects reset implementation in firmware. Signed-off-by: Luke Starrett <luke.starrett@broadcom.com> Acked-by: Scott Branden <scott.branden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-04-20ARM: shmobile: timer: Fix preset_lpj leading to too short delaysGeert Uytterhoeven1-17/+11
On all shmobile ARM SoCs, loop-based delays may complete early, which can be after only 1/3 (Cortex A9) or 1/2 (Cortex A7 or A15) of the minimum required time. This is caused by calculating preset_lpj based on incorrect assumptions about the number of clock cycles per loop: - All of Cortex A7, A9, and A15 run __loop_delay() at 1 loop per CPU clock cycle, - As of commit 11d4bb1bd067f9d0 ("ARM: 7907/1: lib: delay-loop: Add align directive to fix BogoMIPS calculation"), Cortex A8 runs __loop_delay() at 1 loop per 2 instead of 3 CPU clock cycles. On SoCs with Cortex A7 and/or A15 CPU cores, this went unnoticed, as delays use the ARM arch timer if available. R-Car Gen2 doesn't work if the arch timer is disabled. However, APE6 can be used without the arch timer. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-20Revert "ARM: dts: porter: Enable SCIF_CLK frequency and pins"Sjoerd Simons1-13/+0
This reverts commit 19417bd9c511 ("ARM: dts: porter: Enable SCIF_CLK frequency and pins") as according to http://elinux.org/File:R-CarM2-KOELSCH_PORTER-B_PORTER_C_Comparison.pdf the external oscillator for SCIF_CLK is not mounted on the porter boards. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-20ARM: dts: r8a7791: Don't disable referenced optional clocksSjoerd Simons3-4/+3
clk_get on a disabled clock node will return EPROBE_DEFER, which can cause drivers to be deferred forever if such clocks are referenced in their clocks property. Update the various disabled external clock nodes to default to a frequency of 0, but don't disable them to prevent this. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-15arm64: dts: Add L2 cache topology to Hi6220Leo Yan1-0/+16
This patch adds the L2 cache topology on Hi6220. Hi6220 has two clusters, every cluster has 512KiB L2 cache (32KiB x 16 ways). Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-04-15arm64: dts: register Hi6220's thermal zone for power allocatorLeo Yan1-0/+35
With profiling Hi6220's power modeling so get dynamic coefficient and sustainable power. So pass these parameters from DT. Now enable power allocator with only one actor for CPU part, so directly use cluster0's thermal sensor for monitoring temperature. Reviewed-by: Javi Merino <javi.merino@arm.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-04-15arm64: dts: register Hi6220's thermal sensorLeo Yan1-0/+9
Bind thermal sensor driver for Hi6220. Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-04-15arm64: dts: add wifi nodes support for hi6220-hikeyGuodong Xu1-0/+29
Add wifi nodes support for hi6220-hikey Signed-off-by: Guodong Xu <guodong.xu@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-04-15arm64: dts: add dwmmc nodes for hi6220Xinwei Kong1-0/+52
Add all three dwmmc nodes description for hi6220 Signed-off-by: Guodong Xu <guodong.xu@linaro.org> Signed-off-by: Xinwei Kong <kong.kongxinwei@hisilicon.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-04-15arm64: dts: hikey: Add hi655x pmic dts nodeChen Feng1-1/+86
Add the mfd hi655x dts node and regulator support on hi6220 platform. Signed-off-by: Chen Feng <puck.chen@hisilicon.com> Signed-off-by: Fei Wang <w.f@huawei.com> Signed-off-by: Xinwei Kong <kong.kongxinwei@hisilicon.com> Signed-off-by: Guodong Xu <guodong.xu@linaro.org> Reviewed-by: Haojian Zhuang <haojian.zhuang@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-04-15arm64: dts: add LED nodes for hi6220-hikeyGuodong Xu1-0/+41
Add LED nodes for hi6220-hikey. There are total 6 LEDs on HiKey. Four general purposed, one for WiFi activity, and one for Bluetooth activity. Signed-off-by: Guodong Xu <guodong.xu@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-04-15arm64: dts: hi6220: add pinctrl for uarts and enable themGuodong Xu2-0/+21
Add pinctrl for uart2 uart3 and uart4. Enable uart1 uart2 and uart3. Signed-off-by: Guodong Xu <guodong.xu@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-04-15arm64: dts: add Hi6220's stub clock nodeLeo Yan1-0/+56
Enable SRAM node and stub clock node for Hi6220, which uses mailbox channel 1 for CPU's frequency change. Furthermore, add the CPU clock phandle in CPU's node and using operating-points-v2 to register operating points. So can be used by cpufreq-dt driver. Signed-off-by: Leo Yan <leo.yan@linaro.org> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-04-15arm64: dts: add mailbox node for Hi6220Leo Yan1-0/+8
This patch add device mailbox node for Hi6220 in DT. Signed-off-by: Leo Yan <leo.yan@linaro.org> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-04-15arm64: dts: Add hi6220 usb nodeZhangfei Gao1-0/+32
Add USB nodes for Hi6220 Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-04-15arm64: dts: hikey: enable i2c0 and i2c1 for working with mezzanine boardsGuodong Xu1-0/+8
In HiKey board dts file, enable i2c0 and i2c1 for working with 96boards' LS mezzanine. Signed-off-by: Guodong Xu <guodong.xu@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-04-15arm64: dts: add all hi6220 i2c nodesXinwei Kong1-0/+33
This patch adds all I2C nodes for the Hi6220 SoC. This hi6220 Soc use this I2C IP of Synopsys Designware for HiKey board. Signed-off-by: Xinwei Kong <kong.kongxinwei@hisilicon.com> Signed-off-by: Chen Feng <puck.chen@hisilicon.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-04-15arm64: dts: add Hi6220 spi configuration nodesZhong Kaihua3-0/+42
Add Hi6220 spi configuration nodes. Disable by default in hi6220.dtsi and enable it in board dts for usage of 96boards LS mezzanine board. Signed-off-by: Zhong Kaihua <zhongkaihua@huawei.com> Signed-off-by: Guodong Xu <guodong.xu@linaro.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-04-15arm64: dts: add Hi6220 pinctrl configuration nodesZhong Kaihua3-0/+762
Add Hi6220 pinctrl configuration nodes Signed-off-by: Zhong Kaihua <zhongkaihua@huawei.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-04-15arm64: dts: Add Hi6220 gpio configuration nodesZhong Kaihua1-0/+239
Add Hi6220 gpio configuration nodes Signed-off-by: Zhong Kaihua <zhongkaihua@huawei.com> Signed-off-by: Kong Xinwei <kong.kongxinwei@hisilicon.com> Signed-off-by: Guodong Xu <guodong.xu@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-04-15arm64: dts: enable idle states for Hi6220Leo Yan1-0/+31
Add cpu and cluster level's low power state for Hi6220. Acked-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-04-15arm64: dts: add sp804 timer node for Hi6220Leo Yan1-0/+11
Add sp804 timer for hi6220, so it can be used as broadcast timer. Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-04-15arm64: dts: Reserve memory regions for hi6220Leo Yan1-4/+12
On Hi6220, below memory regions in DDR have specific purpose: 0x05e0,0000 - 0x05ef,ffff: For MCU firmware using at runtime; 0x06df,f000 - 0x06df,ffff: For mailbox message data; 0x0740,f000 - 0x0740,ffff: For MCU firmware's section; 0x3e00,0000 - 0x3fff,ffff: For OP-TEE. This patch reserves these memory regions in DT. Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-04-15arm64: tegra: Enable cros-ec and charger on SmaugRhyland Klein1-0/+27
Add nodes for the ChromeOS Embedded Controller and for the gas gauge connected to the I2C bus that it controls. Signed-off-by: Rhyland Klein <rklein@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-04-15arm64: dts: juno: Add external expansion bus to DTBrian Starkey1-0/+10
The Juno development platform has an external expansion bus which can be used for additional hardware (e.g. LogicTile Express daughterboards). Add this bus to the Juno base device-tree. Acked-by: Liviu Dudau <Liviu.Dudau@arm.com> Signed-off-by: Brian Starkey <brian.starkey@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2016-04-15arm64: dts: apm: Fix compatible string for X-Gene 2 SATA controller DTS nodeRameshwar Prasad Sahu1-3/+3
Fix X-Gene SATA controller compatible string for Merlin board. Signed-off-by: Rameshwar Prasad Sahu <rsahu@apm.com> Acked-by: Suman Tripathi <stripathi@apm.com>
2016-04-14Merge tag 'v4.7-rockchip-dts64-1' of ↵Olof Johansson5-12/+340
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64 This contains the rk3368-geekbox as new board, mailbox device nodes for the core rk3368 and some cleanups for gpio-keys, mmc and tsadc. * tag 'v4.7-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: Documentation: devicetree: rockchip: Document rk3368-GeekBox arm64: dts: rockchip: Add rk3368 GeekBox dts arm64: dts: rockchip: Clean up gpio-keys nodes dt-bindings: Add vendor prefix for GeekBuying.com arm64: dts: rockchip: Add rk3368 mailbox device nodes arm64: dts: rockchip: remove broken-cd from emmc and sdio arm64: dts: rockchip: fix the incorrect otp-out pin on rk3368 Signed-off-by: Olof Johansson <olof@lixom.net>
2016-04-14arm64: dts: Add dts files for LG Electronics's lg1312 SoCChanho Min4-0/+393
Add initial dtsi file to support lg1312 SoC which based on Cortex-A53. Also add dts file to support lg1312 reference board which based on lg1312 SoC. Signed-off-by: Chanho Min <chanho.min@lge.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2016-04-13Merge tag 'renesas-arm64-cleanup-for-v4.7' of ↵Olof Johansson1-23/+23
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt64 Renesas ARM64 Based SoC Cleanup for v4.7 * Use generic pinctrl properties in DT for salvator-x board * tag 'renesas-arm64-cleanup-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: arm64: dts: salvator-x: use generic pinctrl properties Signed-off-by: Olof Johansson <olof@lixom.net>
2016-04-13arm64: dts: Add ARM PL022 SPI DT nodes for NS2Anup Patel2-0/+67
We have two ARM PL022 SPI instances in NS2 SoC. On NS2 SVK, one of the ARM PL022 SPI host has Silabs si3226x slic connected to chip-select #0 whereas second ARM PL022 SPI host has Atmel AT25 EEPROM connected to chip-select #0. This patch adds ARM PL022, Silabs si3226x, and Atmel AT25 DT nodes in NS2 DT and NS2 SVK DT respectively. Signed-off-by: Anup Patel <anup.patel@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-04-13arm64: dts: Move NS2 clock DT nodes to separate DT fileAnup Patel2-78/+108
For more readabilty and consistency with other Broadcom SoCs, we move all NS2 clock DT nodes from main SoC DT file to a separate DT file. We also update the license header in ns2.dtsi as-per new Broadcom convention. Signed-off-by: Anup Patel <anup.patel@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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