summaryrefslogtreecommitdiff
path: root/arch
AgeCommit message (Collapse)AuthorFilesLines
2013-08-22ARM: dtsi: enable ahci sata on imx6q platformsRichard Zhu4-0/+21
Only imx6q has the ahci sata controller, enable it on imx6q platforms. Signed-off-by: Richard Zhu <r65037@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx27: Add core voltagesAlexander Shiyan1-3/+4
This patch adds core voltages for i.MX27 CPUs. Only 266 and 400 MHz modes is documented in the datasheet, so we add a 266 MHz frequency for conform this. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: i.MX51: Add WEIM nodeAlexander Shiyan1-0/+17
This patch adds the missing (Wireless External Interface Module) WEIM devicetree node for i.MX51 CPUs. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx6dl-wandboard: Add support for UART3Fabio Estevam1-0/+7
Wandboard has a bluetooth device connected to UART3, so add support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx6dl-wandboard: Add SDHC1 and SDHC2 portsFabio Estevam1-1/+18
Wandboard has a SD card slot on the baseboard connected to SDHC1 and a BCM4329 (Wifi + Bluetooth chip) connected to SDHC2. Add support for these ports. While at it, provide the card detect gpio on SDHC3 and also fix indentation on MX6QDL_PAD_GPIO_0__CCM_CLKO1 hog pin. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx6qdl.dtsi: Add another uart3 pin groupFabio Estevam1-0/+9
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx6qdl.dtsi: Add usdhc1 pin groupsFabio Estevam1-0/+28
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx6qdl/imx6sl: add the dma property for uartHuang Shijie3-2/+20
Add the dma property for all the uart. Note: Add the dma property does not mean we enable the dma for this uart. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx25: Make lcdc compatible to imx21 fbMatthias Weisser1-1/+2
Make lcdc compatible to imx21 fb. Signed-off-by: Matthias Weisser <weisserm@arcor.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx6qdl: add a new pinctrl for uart3Huang Shijie1-0/+11
Add the a new pinctrl for uart3. In the imx6q{dl}-sabreauto boards, the uart3 is used for Bluetooth. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: add more imx6q/dl pin groupsShawn Guo2-0/+321
Add more imx6q/dl pin groups for those supported boards, e.g. sabresd, sabreauto, arm2. IPU2 pin groups are added into imx6q.dtsi, since the block is only available on imx6q. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx: share pad macro names between imx6q and imx6dlShawn Guo15-2931/+2530
The imx6q and imx6dl are two pin-to-pin compatible SoCs. The same board design can work with either chip plugged into the socket, e.g. sabresd and sabreauto boards. We currently define pin groups in imx6q.dtsi and imx6dl.dtsi respectively because the pad macro names are different between two chips. This brings a maintenance burden on having the same label point to the same pin group defined in two places. The patch replaces prefix MX6Q_ and MX6DL_ with MX6QDL_ for both SoCs pad macro names. Then the pin groups becomes completely common between imx6q and imx6dl and can just be moved into imx6qdl.dtsi, so that the long term maintenance of imx6q/dt pin settings becomes easier. Unfortunately, the change brings some dramatic diff stat, but it's all about DTS file, and the ultimate net diff stat is good. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: enable the uart2 for imx6q-arm2Huang Shijie1-0/+10
enable the uart2 for imx6q-arm2 board. The uart2 works in the DTE mode, with the RTS/CTS and DMA enabled. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx6q{dl}: add a DTE uart pinctrl for uart2Huang Shijie2-0/+18
In the arm2 board, the UART2 works in the dte mode. So add a pinctrl for both the imx6q{dl} boards. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx6q{dl}: add DTE pads for uartHuang Shijie2-0/+8
The uart2 in the imx6q-arm2 board is used as a DTE uart, this patch adds the necessary DTE pads for uart2. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx6sl: add "fsl,imx6q-uart" for uart compatibleHuang Shijie1-5/+10
In order to enable the DMA for some uart port in imx6sl, we add the "fsl,imx6q-uart" to the uart's compatible property. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx27 phyCARD-S, i2c ADC device nodeMarkus Pargmann1-0/+18
Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx27 phyCARD-S, move i2c1 and owire to rdkMarkus Pargmann2-18/+13
Both buses are not used on the phyCARD-S module. This patch moves them to the rdk file. Remove ioexpander. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx27 phyCARD-S SOM remove wrong i2c sensorMarkus Pargmann1-5/+0
This sensor was introduced in the original pca100 board file, but phyCARD-S SOM and RDK do not have a temperature sensor. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx: Add the missing cpus nodeFabio Estevam3-0/+30
To make it consistent with the other i.mx SoCs, let's add the cpus nodes. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx6dl-wandboard: Add audio supportFabio Estevam2-0/+80
Wandboard has a sgtl5000 codec. Add audio support. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx27 phyCARD-S remove wrong I2C RTCMarkus Pargmann1-5/+0
Fixup of commit "ARM: dts: Add device tree support for phycard pca100". Remove wrong I2C RTC node. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx27-phytec-phycore-som: Using labels for reusing UART, I2C and FECAlexander Shiyan1-33/+30
Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx27-phytec-phycore-rdk: Add CAN nodeAlexander Shiyan1-0/+13
This patch adds CAN (NXP SJA1000) node for Phytec PCM-970 RDK. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx27-phytec-phycore-som: Add SRAM nodeAlexander Shiyan1-0/+10
This patch adds SRAM node for Phytec PCM-038 module. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx27-phytec-phycore-som: Add WEIM nodeAlexander Shiyan1-9/+14
This patch adds WEIM node for Phytec PCM-038 module. Migrate existing on-module NOR-flash as children of WEIM CS0. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: i.MX27: Add WEIM nodeAlexander Shiyan1-0/+17
This patch adds the missing (Wireless External Interface Module) WEIM devicetree node for i.MX27 CPUs. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: i.MX27: Move IIM node under AIPI2 busAlexander Shiyan1-7/+7
This patch moves IIM node under AIPI2 bus, since this is proper location for this module. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx: add #dma-cells property for sdmaHuang Shijie5-0/+5
Add the #dma-cells property for all the sdma in all the imx platforms. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM i.MX6DL: dts: add clock and mux configuration for LDBPhilipp Zabel2-2/+17
i.MX6DL does not have the second IPU, but the LVDS multiplexers can connect either LVDS channel of the LDB to IPU1 DI0 or IPU1 DI1. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> [shawn.guo: remove "crtcs" property from imx6qdl.dtsi] Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: mx53qsb: Enable VPU supportFabio Estevam2-0/+14
Enable Video Processing Unit (VPU) support. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: add sram for imx53 and imx6qPhilipp Zabel2-0/+11
This patch enables the On-Chip SRAM (OCRAM) on i.MX53 and i.MX6 SoCs. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: Add device tree support for phycard pca100Markus Pargmann3-0/+136
Board files for Phytec phyCARD-S "System on Module" and "Rapid Development Kit". Based on patches from: Steffen Trumtrar <s.trumtrar@pengutronix.de>: - Original patch - ARM: dts: Set partition offsets for phycard - ARM: dts: Use CSPI1 instead of CSPI2 on phycard pca100 - ARM: imx27-phytec-phycard-S.dts: resize nand partitions Jan Luebbe <jlu@pengutronix.de>: - ARM: dts: Enable bad block table in NAND Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de> Cc: Jan Luebbe <jlu@pengutronix.de> Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx27 cpufreq-cpu0 frequenciesMarkus Pargmann1-0/+18
Set operating-points for imx27. There is no regulator support, so the voltages are 0. The frequencies should be the same for all imx27 boards, so it is defined here and can be overwritten if necessary. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx27: Add 1-wireMarkus Pargmann1-0/+7
Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: imx27: Add imx framebuffer deviceMarkus Pargmann1-0/+9
Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: imx27: Use 'AITC' for the interrupt controller nameFabio Estevam1-3/+3
On the MX27 Reference Manual the interrupt controller is named AITC: ARM926EJ-S Interrupt Controller So use the AITC term instead of AVIC. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Origin: id:1334193132-18944-2-git-send-email-festevam@gmail.com Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: i.MX51: Add USB host1/2 pinmux entriesSascha Hauer1-0/+38
This adds pinmux entries for USBH1/2 in ULPI mode. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: i.MX51 babbage: Add spi-cs-high property to pmicSascha Hauer1-0/+1
The mc13892 driver knows that it needs spi-cs-high, so the mc13892 will work. The dataflash also connected to this bus though can only be probed when the mc13892 is inactive. Due to driver potential differences in the probe order we can only make sure the mc13892 is inactive when we put the information into the devicetree. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: i.MX51: move kpp pinmux entrySascha Hauer1-15/+15
For keeping the alphabetical order in the pinmux nodes. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: i.MX6: Add i2c and spi aliasesSascha Hauer1-5/+12
This allows to order the i2c and spi devices correctly. While at it reorder the aliases entries alphabetically. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: i.MX53: Add i2c and spi aliasesSascha Hauer1-5/+8
This allows to order the i2c and spi devices correctly. While at it reorder the aliases entries alphabetically. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: i.MX51: Add i2c and spi aliasesSascha Hauer1-3/+8
This allows to order the i2c and spi devices correctly. While at it reorder the aliases entries alphabetically. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: i.MX27: Add i2c aliasesSascha Hauer1-6/+8
This allows to order the i2c devices correctly. While at it reorder the aliases entries alphabetically. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: i.MX25: Add i2c and spi aliasesSascha Hauer1-4/+10
This allows to order the i2c and spi devices correctly. While at it reorder the aliases entries alphabetically. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: i.MX53: Add iim nodeSascha Hauer1-0/+7
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: i.MX51: Add iim nodeSascha Hauer1-0/+7
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: i.MX25: Add iim nodeSascha Hauer1-0/+7
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: i.MX31: Add iim nodeSascha Hauer1-0/+7
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-08-22ARM: dts: i.MX27: Add iim nodeSascha Hauer1-0/+7
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
generated by cgit v1.2.3 (git 2.39.0) at 2025-01-23 20:21:28 +0300