Age | Commit message (Expand) | Author | Files | Lines |
2017-07-25 | x86/platform/intel-mid: Make IRQ allocation a bit more flexible | Andy Shevchenko | 1 | -2/+10 |
2016-07-13 | x86/pci: Use MRFLD abbreviation for Merrifield | Andy Shevchenko | 1 | -4/+4 |
2016-07-08 | x86/pci, x86/platform/intel_mid_pci: Remove duplicate power off code | Andy Shevchenko | 1 | -9/+4 |
2016-06-15 | x86/platform/intel-mid: Add Power Management Unit driver | Andy Shevchenko | 1 | -5/+35 |
2016-06-14 | x86/platform/intel_mid_pci: Rework IRQ0 workaround | Andy Shevchenko | 1 | -2/+10 |
2016-02-27 | Revert "PCI, x86: Implement pcibios_alloc_irq() and pcibios_free_irq()" | Bjorn Helgaas | 1 | -5/+2 |
2016-02-18 | Revert "PCI: Add helpers to manage pci_dev->irq and pci_dev->irq_managed" | Bjorn Helgaas | 1 | -2/+2 |
2015-09-01 | Merge branch 'x86-platform-for-linus' of git://git.kernel.org/pub/scm/linux/k... | Linus Torvalds | 1 | -7/+29 |
2015-07-30 | PCI: Add helpers to manage pci_dev->irq and pci_dev->irq_managed | Jiang Liu | 1 | -2/+2 |
2015-07-30 | PCI, x86: Implement pcibios_alloc_irq() and pcibios_free_irq() | Jiang Liu | 1 | -2/+5 |
2015-07-29 | x86/pci/intel_mid_pci: Use proper constants for irq polarity | Thomas Gleixner | 1 | -2/+2 |
2015-07-29 | x86/pci/intel_mid_pci: Make intel_mid_pci_ops static | Andy Shevchenko | 1 | -1/+1 |
2015-07-29 | x86/pci/intel_mid_pci: Propagate actual return code | Andy Shevchenko | 1 | -2/+4 |
2015-07-29 | x86/pci/intel_mid_pci: Work around for IRQ0 assignment | Andy Shevchenko | 1 | -2/+22 |
2015-04-24 | x86/irq: Convert IOAPIC to use hierarchical irqdomain interfaces | Jiang Liu | 1 | -2/+0 |
2015-04-24 | x86/irq: Prepare IOAPIC interfaces to support hierarchical irqdomains | Jiang Liu | 1 | -1/+3 |
2015-03-20 | Revert "x86/PCI: Refine the way to release PCI IRQ resources" | Rafael J. Wysocki | 1 | -2/+2 |
2015-02-11 | Merge tag 'pm+acpi-3.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git... | Linus Torvalds | 1 | -2/+2 |
2015-02-05 | x86/PCI: Refine the way to release PCI IRQ resources | Jiang Liu | 1 | -2/+2 |
2015-01-07 | spi: dw-pci: describe Intel MID controllers better | Andy Shevchenko | 1 | -1/+0 |
2014-12-16 | x86, irq: Keep balance of IOAPIC pin reference count | Jiang Liu | 1 | -1/+9 |
2014-08-29 | x86, irq, PCI: Keep IRQ assignment for runtime power management | Jiang Liu | 1 | -1/+1 |
2014-08-08 | x86, irq, PCI: Keep IRQ assignment for PCI devices during suspend/hibernation | Jiang Liu | 1 | -1/+1 |
2014-06-22 | x86, irq, SFI: Release IOAPIC pin when PCI device is disabled | Jiang Liu | 1 | -0/+7 |
2014-06-22 | x86, irq, SFI: Use common irqdomain map interface to program IOAPIC pins | Jiang Liu | 1 | -12/+7 |
2014-06-22 | x86, SFI, irq: Provide basic irqdomain support | Jiang Liu | 1 | -0/+3 |
2014-01-16 | x86, intel-mid: Add Merrifield platform support | David Cohen | 1 | -1/+5 |
2013-10-18 | intel_mid: Renamed *mrst* to *intel_mid* | Kuppuswamy Sathyanarayanan | 1 | -6/+6 |
2013-10-18 | pci: intel_mid: Return true/false in function returning bool | Fengguang Wu | 1 | -3/+3 |
2013-10-18 | intel_mid: Renamed *mrst* to *intel_mid* | Kuppuswamy Sathyanarayanan | 1 | -0/+310 |